The present invention relates to a semiconductor device for transmitting signals.
In recent years, SiP (System in Package) systems for performing sophisticated signal processing, each comprising a plurality of integrated semiconductor circuits (hereinafter referred to as “chips”) encapsulated in a single package, have been used in a wide range of applications. To meet the growing demand for higher SiP functionality, the number of chips encapsulated in one package is on the increase. However, the large number of chips encapsulated in one package have posed problems in that it is difficult to ensure signal transmission between the chips and the package tends to have an increased volume.
In view of the above problems, there has been developed a packaging apparatus which vertically stacks chips having signal transmission paths perpendicular to the upper surfaces thereof in the form of an electrically conductive material that fills through holes defined in the chips, thereby making packaging means such as wire bonding means unnecessary.
Since the above configuration makes it possible to perform direct signal transmission between the stacked chips, a wider bandwidth can be achieved and the SiP can be reduced in volume.
To carry out another packaging method, there has been developed a semiconductor device comprising chips having electromagnetic induction coils disposed thereon and stacked in a direction perpendicular to the upper surfaces of the chips, for performing signal transmission based on an electromagnetic coupling of the electromagnetic induction coils (see, for example, JP No. 1995-221260 A, JP No. 1996-236696 A, and document: Noriyuki Miura, et al., “Analysis and Design of Transceiver Circuit and Inductor Layout for Inductive Inter-chip Wireless Super-connect”, IEEE 2004 Symposium on VLSI Circuits Digest of Technical Papers, pp. 246-249 (2004)).
The semiconductor device shown in
The semiconductor device shown in
Transmitter S on chip layer Ln has input terminal 201 and output terminals 202, 202′, and voltage U201 is applied to input terminal 201. Receiver E on chip layer Ln+x has input terminals 203, 203′ and output terminal 202, and voltage U204 is applied to output terminal 204.
The semiconductor device shown in
The semiconductor devices shown in
It is assumed that a coil and a signal device which are disposed in a lower position are used to transmit a signal and a coil and a signal device which are disposed in an upper position are used to receive a signal. The transmission coil is supplied with a current from the signal device in a direction depending on the transmission signal. For example, if a current signal directed clockwise is representative of “1”, then the transmission coil generates magnetic fluxes in a downward direction through the reception coil. The reception coil induces a current due to the magnetic fluxes directed therethrough. At this time, the induced current has the same direction as the current supplied to the transmission coil. The induced current or an electric signal such as a voltage converted therefrom is observed by the signal device, thereby performing signal transmission.
If a current signal representative of “0” is to be sent, a current is supplied counter-clockwise, a direction opposite to the direction of the current representative of “1” is supplied, thereby performing signal transmission.
Generally, the signal transmission based on an electromagnetic coupling of electromagnetic induction coils results in a smaller area being occupied by I/O parts than a packaging configuration with area bumps, and makes it possible to produce more highly integrated circuits.
However, the above signal transmission structure is only able to perform signal transmission between chips that are stacked perpendicularly to the upper surfaces of the chips, and is unable to perform signal transmission parallel to the upper surfaces of the chips. Consequently, the above technology is not available in applications where chips cannot be stacked perpendicularly to the upper surfaces thereof due to the heat generated by the chips operation.
Devices other than SiP systems also require signal transmission between chips arrayed parallel to the upper surfaces thereof. For example, one such device is used in a process of inspecting a wafer before it is diced into chips in the fabrication of LSI circuits (wafer level inspection process). Chips on a wafer are made independent of each other by scribe lines that are grounded. When the wafer is diced into the chips, the wafer is cut along the scribe lines. If there are connections extending across the scribe lines, then a problem such as short circuits will arise when the wafer is diced. Consequently, the chips cannot be interconnected by connections extending across the scribe lines. In the wafer level inspection process, therefore, inspection data between the chips cannot be shared by the single wafer, but have to be shared by an external device such as a probe card or the like. As a result, the necessary connections tend to occupy a large area.
In order to solve the above problems, it is an object of the present invention to provide a semiconductor device which is capable of realizing signal transmission between a plurality of chips arrayed parallel to the upper surfaces thereof, using a signal transmission device which occupies a small area.
To achieve the above object, there is provided in accordance with the present invention a semiconductor device comprising a plurality of juxtaposed semiconductor chips each having an electromagnetic induction coil disposed thereon, wherein
a signal is transmitted by way of electromagnetic induction between the electromagnetic induction coils disposed on a pair of adjacent semiconductor chips.
According to the present invention, as described above, since a plurality of semiconductor chips are juxtaposed, each having an electromagnetic induction coil disposed thereon, and since a signal is transmitted by way of electromagnetic induction between the electromagnetic induction coils on a pair of adjacent ones of the semiconductor chips, consequently, signal transmission can be realized between a plurality of chips arrayed parallel to upper surfaces thereof, using a signal transmission device which occupies a small area.
Exemplary embodiments of the present invention will be described below with reference to the drawings.
The exemplary embodiments to be described below are illustrated by way of example, and the present invention is not to be interpreted as being limited to the description and drawings of the exemplary embodiments. For illustrative purposes, the cross-sectional views are shown without hatching.
As shown in
According to the present exemplary embodiment, as shown in
As shown in
Semiconductor chip 1 shown in
Semiconductor chip 2 shown in
The semiconductor device shown in
For transmitting a signal from semiconductor chip 1 to semiconductor chip 2, input voltage Vi is input to transmission circuit 3. Transmission circuit 3 on semiconductor chip 1 then inputs transmission current depending on transmission data to transmission coil 4. When the current is input to transmission coil 4, transmission coil 4 produces magnetic fluxes. At this time, reception coil 5 on semiconductor chip 2 induces a current by way of electromagnetic induction. A signal that appears across reception coil 5 is sampled by reception circuit 6, which outputs output voltage Vo, thereby realizing signal transmission.
Transmission circuit 3 shown in
Reception circuit 6 shown in
The intensity of the signal induced by reception coil 5 is proportional to a coefficient of coupling between transmission coil 4 and reception coil 5. For increasing the coefficient of coupling, it is effective to reduce the distance between transmission coil 4 and reception coil 5. It is thus effective to position transmission coil 4 and reception coil 5 near the end faces of respective semiconductor chips 1, 2 and also to position semiconductor chips 1, 2 such that transmission coil 4 and reception coil 5 are positioned adjacent to each other.
Shapes of transmission coil 4 will be described below.
It is the general practice to use square coils for signal transmission between stacked semiconductor chips according to the background art. When a signal is transmitted between semiconductor chips 1, 2 disposed in one plane in the present exemplary embodiment, a magnetic flux generated by side A shown in
As shown in
As shown in
D>B/2×tan(θ/2)+R/2×tan(θ/2)
Stated otherwise, distance D should preferably be of a value greater than the sum of the product of the tangent of half of vertex angle θ and half of bottom B and the product of the tangent of half of vertex angle θ and half of side R.
As shown in
According to the above configurations described thus far, the magnetic fluxes running through the reception coil are maximized by controlling the shape of the transmission coil. However, the transmission coil may be of the same shape as with the background art, and a portion of the coil except side B may be covered with a metal surface.
As shown in
An exemplary embodiment of semiconductor devices on a wafer before it is diced into chips will be described below.
As with different chips encapsulated in packages for signal transmission therebetween, transmission coil 4, transmission circuit 3, reception coil 5, and reception circuit 6 are disposed on each semiconductor chip 1 near its end faces, as shown in
The figures referred to in the description of the exemplary embodiments show an arrangement in which transmission coil 4 and reception coil 5 are disposed on the upper surfaces of semiconductor chips 1, 2. However, transmission coil 4 and reception coil 5 may be disposed on side surfaces of semiconductor chips 1, 2.
According to the present invention, as described above, since contactless signal transmission can be performed by way of electromagnetic induction between semiconductor chips that are not stacked one on the other, the package volume can be reduced, and the manufacturing cost can be reduced. Since signal transmission can be performed across scribe lines between semiconductor chips on a wafer before the wafer is diced, test signals can be input to and output from the semiconductor chips. The time required to carry out the wafer level inspection process is greatly shortened, and hence the cost of the test is reduced.
The present invention has been described above in reference to the exemplary embodiments. However, the present invention is not limited to the above exemplary embodiments. Rather, various changes that can be understood by those skilled in the art within the scope of the invention may be made to the arrangements and details of the present invention.
The present application is based upon and claims the benefit of priority from Japanese patent application No. 2008-064165, filed on Mar. 13, 2008, the disclosure of which is incorporated herein in its entirety by reference.
Number | Date | Country | Kind |
---|---|---|---|
2008-064165 | Mar 2008 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/JP2009/052993 | 2/20/2009 | WO | 00 | 8/31/2010 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2009/113373 | 9/17/2009 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
20070085202 | Shionoiri | Apr 2007 | A1 |
Number | Date | Country |
---|---|---|
07-221260 | Aug 1995 | JP |
08-236696 | Sep 1996 | JP |
10-303367 | Nov 1998 | JP |
2000-124406 | Apr 2000 | JP |
2004-327568 | Nov 2004 | JP |
2005-203657 | Jul 2005 | JP |
2006-165287 | Jun 2006 | JP |
2007-073812 | Mar 2007 | JP |
2007-134694 | May 2007 | JP |
2007-165459 | Jun 2007 | JP |
2007029435 | Mar 2007 | WO |
Entry |
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Noriyuki Miura et al., “Analysis and Design of Transceiver Circuit and Inductor Layout for Inductive Inter-chip Wireless Superconnect”, IEEE, Symposium on VLSI Circuits Digest of Technical Papers, 2004, pp. 246-249. |
Number | Date | Country | |
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20110012228 A1 | Jan 2011 | US |