Claims
- 1. A mounting substrate assembly comprising:
a substrate having a first surface and a second surface, at least one of said first surface and said second surface including a plurality of pretested die sites, each of said pretested die sites categorized as at least one of a defective die site and a good die site; and at least one pretested defective die and at least one pretested good die configured to attach to said pretested die sites, said at least one pretested defective die attached to each of said defective die sites and said at least one pretested good die attached to each of said good die sites.
- 2. The assembly of claim 1, wherein said substrate includes a designator having encoded information on a peripheral portion of said substrate.
- 3. The assembly of claim 1, wherein each of said at least one pretested defective die and said at least one pretested good die attached to said substrate include an encapsulation material formed thereon.
- 4. The assembly of claim 2, further comprising an encapsulation material encapsulating each of said at least one pretested defective die and each of said at least one pretested good die and at least partially encapsulating said substrate.
- 5. The assembly of claim 4, wherein said encapsulation material is prevented from forming over said designator.
- 6. The assembly of claim 2, wherein said designator includes identification information.
- 7. The assembly of claim 2, wherein said designator includes mapped information of said substrate.
- 8. The assembly of claim 2, wherein said designator is configured to access mapped information of said substrate.
- 9. The assembly of claim 2, wherein said encoded information of said designator comprises information configured as a bar code.
- 10. The assembly of claim 9, wherein said bar code is inscribed on said peripheral off-site portion of said substrate by directed optical energy.
- 11. The assembly of claim 2, wherein said encoded information comprises information configured on a strip of magnetic tape.
- 12. The assembly of claim 2, wherein said encoded information further comprises information uniquely identifying said substrate.
- 13. The assembly of claim 12, wherein said encoded information further comprises information which chronicles a manufacturing process history for said substrate.
- 14. The assembly of claim 2, wherein said encoded information further comprises instructions for orientation of a pin one of a semiconductor die relative to each of said pretested defective die sites and each of said pretested good die sites.
- 15. The assembly of claim 2, wherein said encoded information comprises at least one identifying mark selected from at least one of alphanumeric characters, symbols, colors, binary sequences, and combinations of any thereof.
- 16. The assembly of claim 2, wherein said encoded information further comprises information relating to testing and inspection of said substrate.
- 17. The assembly of claim 1, wherein said substrate is a carrier substrate.
- 18. The assembly of claim 1, wherein said substrate is a lead frame array.
- 19. A substrate assembly comprising:
a substrate having a first surface and a second surface, at least one of said first surface and said second surface including a plurality of pretested die sites, each of said pretested die sites determined to be one of a defective die site and a good die site; and at least one pretested defective die and at least one pretested good die for attaching to said pretested die sites, said at least one pretested defective die attached to each of said defective die sites and said at least one pretested good die attached to each of said good die sites.
- 20. The assembly of claim 19, wherein said substrate includes a designator having encoded information on a peripheral portion of said substrate.
- 21. The assembly of claim 19, wherein each of said at least one pretested defective die and said at least one pretested good die attached to said substrate include an encapsulation material formed thereon.
- 22. The assembly of claim 20, further comprising an encapsulation material encapsulating each of said at least one pretested defective die and each of said at least one pretested good die and at least partially encapsulating said substrate.
- 23. The assembly of claim 22, wherein said encapsulation material is prevented from substantially forming over said designator.
- 24. The assembly of claim 20, wherein said designator includes identification information.
- 25. The assembly of claim 20, wherein said designator includes mapped information of said substrate.
- 26. The assembly of claim 20, wherein said designator is configured to access mapped information of said substrate.
- 27. The assembly of claim 20, wherein said encoded information of said designator comprises information configured as a bar code.
- 28. The assembly of claim 27, wherein said bar code is inscribed on said peripheral off-site portion of said substrate by directed optical energy.
- 29. The assembly of claim 20, wherein said encoded information comprises information for storage on a strip of magnetic tape.
- 30. The assembly of claim 20, wherein said encoded information further comprises information uniquely identifying said substrate.
- 31. The assembly of claim 30, wherein said encoded information further comprises information for a manufacturing process history for said substrate.
- 32. The assembly of claim 20, wherein said encoded information further comprises at least one instruction for orientation of a pin one of a semiconductor die relative to each of said pretested defective die sites and each of said pretested good die sites.
- 33. The assembly of claim 20, wherein said encoded information comprises at least one identifying mark selected from at least one of alphanumeric characters, symbols, colors, binary sequences, and combinations of any thereof.
- 34. The assembly of claim 20, wherein said encoded information further comprises information relating to at least one of testing and inspection of said substrate.
- 35. The assembly of claim 19, wherein said substrate is a carrier substrate.
- 36. The assembly of claim 19, wherein said substrate is a lead frame array.
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a divisional of U.S. patent application Ser. No. 09/934,620, filed Aug. 22, 2001, pending.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09934620 |
Aug 2001 |
US |
Child |
10280415 |
Oct 2002 |
US |