Component Carrier with Surface Mounted Components Connected By High Density Connection Region

Abstract

A component carrier includes a stack with electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures have a higher density connection region and a lower density connection region, and a first component and a second component which are surface-mounted on the stack. The first component and the second component are electrically coupled with each other by the higher density connection region.

Description

Claims

1. A component carrier, comprising: a stack comprising electrically conductive layer structures and at least one electrically insulating layer structure, wherein the electrically conductive layer structures comprise a higher density connection region and a lower density connection region; anda first component and a second component which are surface-mounted on the stack;wherein the first component and the second component are electrically coupled with each other by the higher density connection region.

2. The component carrier according to claim 1, wherein a higher connection density of the higher density connection region compared with a lower connection density of the lower density connection region corresponds to a smaller line space ratio and/or a smaller line pitch of the higher density connection region compared to a higher line space ratio and/or a higher line pitch of the lower density connection region.

3. The component carrier according to claim 1, wherein a line pitch of the higher density connection region is in a range from 0.4 µm to 10 µm.

4. The component carrier according to claim 1, wherein a line pitch of the lower density connection region is in a range from 10 µm to 40 µm.

5. The component carrier according to claim 1, comprising at least one of the following features: wherein a ratio between an average line width in the higher density connection region and in the lower density connection region is in a range from 1/50 to ⅕, in particular in a range from 1/15 to ⅕;wherein a ratio between an average line space in the higher density connection region and in the lower density connection region is in a range from 1/50 to ⅕, in particular in a range from 1/15 to ⅕;wherein at least one of the first component and the second component comprises a processor chip;wherein at least one of the first component and the second component comprises a memory chip;wherein the higher density connection region and the lower density connection region are homogeneously integrated within the same at least one electrically insulating layer structure of the stack;wherein the lower density connection region and the higher density connection region are free of a dielectric interface in between;comprising a first set of first alignment marks assigned to the lower density connection region;comprising a second set of second alignment marks assigned to the higher density connection region.

6. The component carrier according to claim 1, wherein the electrically conductive layer structures comprise connection elements in the higher density connection region and further connection elements in the lower density connection region, said connection elements being smaller than said further connection elements.

7. The component carrier according to claim 6, wherein at least part of said connection elements and/or at least part of said further connection elements extend up to an exterior main surface of the stack.

8. The component carrier according to claim 1, wherein said higher density connection region extends up to an exterior main surface of the stack.

9. The component carrier according to claim 1, wherein the electrically conductive layer structures comprise parallel planar layer sections in the higher density connection region and parallel planar further layer sections in the lower density connection region, wherein at least one of said layer sections extends between two adjacent ones of said further layer sections in a stack thickness direction.

10. The component carrier according to claim 9, wherein at least two of said layer sections extend between two adjacent ones of said further layer sections in the stack thickness direction.

11. The component carrier according to claim 9, wherein at least one of said layer sections extends, with respect to the stack thickness direction, at the same level as or below an exterior one of said further layer sections.

12. The component carrier according to claim 1, wherein the higher density connection region comprises a redistribution structure.

13. The component carrier according to claim 1, comprising one of the following features: the higher density connection region has a substantially rectangular shape in a cross-sectional view and/or in a top view;the higher density connection region has a substantially T-shape in a cross-sectional view.

14. The component carrier according to claim 1, further comprising: a further higher density connection region being spatially separated from the higher density connection region.

15. The component carrier according to claim 14, comprising at least one of the following features: wherein the further higher density connection region is spatially separated from the higher density connection region in a stack thickness direction;wherein the further higher density connection region is electrically coupled with the higher density connection region;wherein the further higher density connection region is electrically decoupled from the higher density connection region.

16. The component carrier according to claim 1, wherein the electrically conductive layer structures in one or both of the higher density connection region and the lower density connection region comprise: at least two electrically conductive elements spaced with respect to each other in a stack thickness direction;at least two electrically conductive elements spaced with respect to each other in a first lateral direction perpendicular to the stack thickness direction; andat least two electrically conductive elements spaced with respect to each other in a second lateral direction perpendicular to the stack thickness direction and perpendicular to the first lateral direction.

17. The component carrier according to claim 16, wherein at least part of said electrically conductive elements is electrically connected with a respective other part of said electrically conductive elements in the stack thickness direction and/or in at least one of the first lateral direction and the second lateral direction.

18. The component carrier according to claim 16, comprising at least one of the following features: an average distance between adjacent ones of said electrically conductive elements in the first lateral direction is different from an average distance between adjacent ones of said electrically conductive elements in the second lateral direction and/or in the stack thickness direction;an average distance between adjacent ones of said electrically conductive elements in the second lateral direction is different from an average distance between adjacent ones of said electrically conductive elements in the stack thickness direction.

19. The component carrier according to claim 1, wherein an average distance between adjacent ones of said electrically conductive elements in the higher density connection region is smaller than an average distance between adjacent ones of said electrically conductive elements in the lower density connection region.

20. A method of manufacturing a component carrier, the method comprising: providing a stack comprising electrically conductive layer structures and at least one electrically insulating layer structure, wherein the electrically conductive layer structures comprise a higher density connection region and a lower density connection region;surface-mounting a first component and a second component on the stack; andelectrically coupling the first component and the second component with each other by the higher density connection region.