1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to semiconductor chip packaging and to methods of making the same.
2. Description of the Related Art
One form of conventional packaged semiconductor chip devices has involved the mounting of a single semiconductor chip on a package substrate composed of a ceramic or laminate or organic materials, such as epoxy resins. More recently, designers have begun to turn to multi-chip systems in which one or more semiconductor chips are positioned on a single package substrate. In some of these systems, one or more of the semiconductor chips may be high powered devices, such as microprocessors, and others may be relatively lower powered devices, such as memory devices. Thermal management of systems involving a hybrid of high power and low power semiconductor chips may still require thermal management through the use of a heat spreader in thermal contact with the semiconductor chips by way of thermal interface material layers. The usage of a solder-based thermal interface material has certain advantages for high powered devices due to the ability of solder to withstand higher temperatures and the greater thermal conductivity thereof. Organic thermal interface materials can sometimes yield the requisite thermal properties to transfer heat away from high power dissipating devices. However, under certain circumstances, organic thermal interface materials may not be sufficiently thermally conductive. Solder-based thermal interface materials may be problematic for usage with stacked semiconductor chips since it is sometimes difficult to prevent the solder from cascading down the sides of the stack of semiconductor chips and potentially invading the conductor structures in between such chips.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.
In accordance with one aspect of an embodiment of the present invention, a method of manufacturing is provided that includes forming a heat spreader that has a surface adapted to establish thermal contact with a first semiconductor chip and a second semiconductor chip on a substrate. The surface includes a first portion adapted to thermally contact a solder-based thermal interface material and a second portion having an opening adapted to hold an organic thermal interface material.
In accordance with another aspect of an embodiment of the present invention, a method of conveying heat from a first semiconductor chip and a second semiconductor chip on a substrate is provided. The method includes placing a solder-based thermal interface material in thermal contact with the first semiconductor chip and an organic thermal interface in thermal contact with the second semiconductor chip. A surface of a heat spreader is placed in thermal contact with the first semiconductor chip and the second semiconductor chip. The surface includes a first portion thermally contacting the solder-based thermal interface material and a second portion having an opening to hold at least a portion of the organic thermal interface material.
In accordance with another aspect of an embodiment of the present invention, an apparatus for conveying heat from a first semiconductor chip and a second semiconductor chip on a substrate is provided. The apparatus includes a heat spreader that has a surface adapted to establish thermal contact with the first semiconductor chip and the second semiconductor chip. The surface includes a first portion adapted to thermally contact a solder-based thermal interface material and a second portion having an opening adapted to hold an organic thermal interface material.
In accordance with another aspect of an embodiment of the present invention, an apparatus is provided that includes a substrate and a first semiconductor chip and a second semiconductor chip mounted in spaced apart relation on the substrate. A heat spreader is provided that has a surface adapted to establish thermal contact with the first semiconductor chip and the second semiconductor chip. The surface includes a first portion adapted to thermally contact a solder-based thermal interface material and a second portion having an opening adapted to hold an organic thermal interface material. A solder-based thermal interface material is in thermal contact with the first portion and the first semiconductor chip and an organic thermal interface material is positioned at least partially in the opening and in thermal contact with the second portion and the second semiconductor chip.
The foregoing and other advantages of the invention will become apparent upon reading the following detailed description and upon reference to the drawings in which:
Various heat spreaders useful with, for example, stacked semiconductor chips on a substrate are disclosed. In one aspect, a heat spreader functional as a lid is mounted in thermal contact with two semiconductor chips spaced apart on the substrate. The heat spreader has a surface that includes a first portion adapted to thermally contact a solder-based thermal interface material and a second portion that has an opening adapted to hold an organic thermal interface material. Additional details will now be described.
In the drawings described below, reference numerals are generally repeated where identical elements appear in more than one figure. Turning now to the drawings, and in particular to
Functionally speaking, the semiconductor chips 20, 25, 30 and 35 may be any of a large number of different types of circuit devices used in electronics, such as, for example, microprocessors, graphics processors, combined microprocessor/graphics processors, application specific integrated circuits, interposers, memory devices or the like, and may be single or multi-core or even stacked with or accompanied by additional dice. The semiconductor chips 20, 25, 30 and 35 may be constructed of bulk semiconductor, such as silicon or germanium, or semiconductor-on-insulator materials, such as silicon-on-insulator materials. Even insulating materials are contemplated. The semiconductor chip 20 is provided with a backside metallization structure 45 that facilitates metallurgical bonding with a solder-based thermal interface material (not visible in
The substrate 15 may be a semiconductor chip package substrate, a semiconductor interposer, a circuit card, a pinned socket adapter, or virtually any other type of printed circuit board. Although a monolithic structure could be used for the substrate 15, a more typical configuration will utilize a build-up design. In this regard, the substrate 15 may consist of a central core upon which one or more build-up layers are formed and below which an additional one or more build-up layers are formed. The core itself may consist of a stack of one or more layers. If implemented as a semiconductor chip package substrate, the number of layers in the substrate 15 can vary from four to sixteen or more, although less than four may be used. So-called “coreless” designs may be used as well. The layers of the substrate 15 may consist of an insulating material, such as various well-known epoxies, interspersed with metal interconnects. A multi-layer configuration other than buildup could be used. Optionally, the substrate 15 may be composed of well-known ceramics or other materials suitable for package substrates or other printed circuit boards. The substrate 15 may be provided with a number of conductor traces and vias and other structures (not visible) in order to provide power, ground and signals transfers between the semiconductor chips 20, 25, 30 and 35 and another device (not shown). In this illustrative embodiment, the substrate 15 is configured as a semiconductor chip package substrate. To interface electrically with other devices, such as a system board or electronic device (not shown), the substrate 15 may be provided with an interconnect structure such as the depicted land grid array 45. However, the skilled artisan will appreciate that other interconnect schemes, such as pin grid arrays, ball grid arrays, or other interconnect schemes may be used as desired.
The semiconductor chip device 10 includes a heat spreader 40 that functions as a heat spreader. In this illustrative embodiment, the heat spreader 40 is a top hat design. However, the skilled artisan will appreciate that bathtub designs, pure block designs or other configurations may be used as well. Indeed, the heat spreader 40 may take on virtually a limitless number of configurations and be composed of a variety of thermally conductive materials such as well-known ceramics or metallic materials as desired. Some exemplary materials include copper, nickel jacketed copper, anodized aluminum, aluminum-silicon-carbon, aluminum nitride, boron nitride or the like. In this illustrative embodiment where a top hat design is utilized, the heat spreader 40 includes a top portion 55 that is circumscribed laterally by a flange 60. The top portion 55 and the flange 60 may be integrally formed or joined by adhesives, metallurgical processes or fasteners.
The heat spreader 40 may be designed to seat on a stiffener frame 65 that is secured to the substrate 15. The stiffener frame 65 may be composed of a variety of materials, such as epoxies, plastics or even metals, such as copper, aluminum, stainless steel or the like. The stiffener frame 65 may be secured to the substrate 15 by an adhesive 67. The adhesive 67 may be a variety of materials, such as epoxies or a silicone-based thixotropic adhesive. Optionally, a metallic bond using lead-free or lead-based solder may be used if the frame 65 can withstand the melting temperature of the solder. The heat spreader 40 and in particular the flange 60 is secured to the stiffener frame 65 by way of an adhesive 70, which may be composed of the same materials as the adhesive 67.
Additional details of the heat spreader 40 may be understood by referring now also to
To establish thermal contact between the heat spreader 40 and the semiconductor chip 35 shown in
The organic thermal interface material 90 is shown exploded from the opening 95. Here, the opening 95 and thus the thermal interface material 90 normally disposed therein may have circular footprints. However, the skilled artisan will appreciate that other shapes may be used for the opening and the thermal interface material 90 as desired. To inhibit the movement of the thermal interface material 90 out of the opening 95, the various contours may be applied to the opening 95. In this regard, the bottom 100 of the opening 95 may be dished to form a concave surface that terminates peripherally in a recessed trench 105. The combination of the concave bottom 100 and the trench 105 produces a convex lower surface 110 of the thermal interface material 90 as well as a peripherally positioned bead 115 that enhances adhesion between the thermal interface material 90 and the opening 95.
The thicknesses of the thermal interface materials 80 and 90 contacting the semiconductor chips 20 and 35, respectively, is termed the bond line thickness. Better thermal conductivity is achieved where the bond line thickness is maintained within some range during thermal cycling. The adhesive 70 acts like a spring to help keep the bond line thickness fairly uniform.
The opening 95 may be formed in the surface 75 of the heat spreader 40 in a variety of ways. Examples include machining, forging, casting or the like. If, as in this illustrative embodiment, the heat spreader 40 is a clad structure in which a copper core is surrounded by a nickel jacket then the exposed surfaces of the opening 95 may be nickel plated as well.
In the illustrative embodiment depicted in
As noted above, an opening to accommodate an organic thermal interface material may take on other than a circular footprint. In this regard, attention is now turned to
An exemplary method for assembling the semiconductor chip device 10 may be understood by referring now to
While the invention may be susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and have been described in detail herein. However, it should be understood that the invention is not intended to be limited to the particular forms disclosed. Rather, the invention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the invention as defined by the following appended claims.