Integrated assemblies having structures along a first pitch coupled with structures along a second pitch different from the first pitch, and methods of forming integrated assemblies.
Integrated circuitry may include highly-integrated structures formed along a relatively tight (i.e., small) pitch in order to achieve a high packing density. For instance, memory cells may be arranged in a configuration having a high packing density. The memory cells may be addressed utilizing wordlines and digit lines; with the wordlines extending along a first direction and the digit lines extending along a second direction which intersects the first direction. The wordlines and digit lines may be formed along a tight pitch in order to enable suitable addressing of the tightly-packed memory cells.
The integrated circuitry may also include structures formed along a relatively loose (i.e., large) pitch. Such structures may include logic, wordline drivers, sense amplifiers, sensors, etc. The terms “relatively loose” and “relatively tight” are utilized in relation to one another, with the relatively loose pitch being larger than the relatively tight pitch.
It may be desired to couple the structures formed along the relatively loose pitch with the structures formed along the relatively tight pitch. For instance, it may be desired to couple wordline drivers with wordlines, sense amplifiers with digit lines, etc. It can be difficult to achieve such coupling, and accordingly it is desired to develop methods and architectures suitable for coupling structures formed along a relatively loose pitch with structures formed along a relatively tight pitch.
Integrated circuitry may include connections between features formed at a relatively tight pitch and features formed at a relatively loose pitch. Embodiments described herein may provide methods and architectures for achieving such connections.
The wordlines WL and digit lines DL are provided at a relatively tight pitch in order to extend across the rows and columns of the densely-packed memory cells within the memory array 302. The wordlines WL and the digit lines DL extend to circuitry external of the memory array, and such circuitry may be provided at a relatively-loose pitch. For instance, the wordlines WL are shown extending to wordline drivers, and the digit lines DL are shown extending to sense amplifiers.
The actual connections between the tightly-pitched structures and the loosely-pitched structures may utilize a repeating pattern of conductive structures. For instance,
In the illustrated embodiment of
A bar of repeating numbers 0, 1, 2, 3 is provided over the lines 10 to assist the reader in recognizing a repeating pattern formed between the lines 10 and the conductive structures 12. In other embodiments, the relationship between the pitches P1 and P2 may be different than the illustrated 4:1 relationship, and accordingly the repeating pattern may be different. Generally, the pitch P1 will be at least about three-times as large as the pitch P2.
In some embodiments, the lines 10 may be considered to extend along a direction represented by an axis 7. The conductive structures 12 may be considered to be formed along rows 14a-14d which extend along another direction represented by an axis 5. The term “row” as utilized relative to
The axes 5 and 7 are substantially orthogonal to one another in the embodiment of
Although the axes 5 and 7 are shown to be substantially orthogonal to one another, in other embodiments the rows (e.g., 14a-14d) may extend along an axis which is at an angle other than 90° relative to the direction of lines 10. Such angle may be any suitable angle, such as, for example, about 30°, about 45°, about 60°, etc. In some embodiments, the ratio of the change in the x direction (the direction along axis 5) relative to the change in the y-direction (the direction along axis 7) as pertaining to the locations of conductive structures 12 may be 1:4; 1:3, 1:2, etc.
Each of the conductive lines 10 within the configuration of
The bar of repeating numbers 0, 1, 2, 3 is provided over the lines 10 of
More than one of the second conductive structures 10 is directly over each of the first conductive structures 12 (for instance, the conductive structures 10 at positions 1, 2 and 3 are all directly over the underlying conductive structures 12). The conductive interconnects 22 extend upwardly from each of the first conductive structures 12 to couple the first conductive structures 12 with only one of the second conductive structures 10 which is directly over each of the first conductive structures 12 (for instance, in the shown application it is only the second conductive structures 10 at positions 2 which are electrically coupled with the underlying first conductive structures 12 through the interconnects 22). The second conductive structures 10 which are over the first conductive structures 12 and not electrically coupled to the first conductive structures 12 (i.e., the second conductive structures 10 at positions 1 and 3 in the shown application of
In the illustrated application of
The construction 500 of
The construction 500 of
Referring to
The conductive structures 12 are electrically coupled with the circuitry 18 described above. The conductive structures may be arranged in the rows 14a-14d described above with reference to
The insulative support material 20 may comprise any suitable composition or combination of compositions; and in some embodiments may comprise, consist essentially of, or consist of silicon dioxide. The insulative support material 20 may be provided over an underlying base (not shown) corresponding to a semiconductor substrate. The term “semiconductor substrate” means any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductor substrates described above.
The first conductive structures 12 comprise conductive material 13. The conductive material 13 may comprise any suitable electrically conductive composition(s), such as, for example, one or more of various metals (e.g., titanium, tungsten, cobalt, nickel, platinum, etc.), metal-containing compositions (e.g., metal silicide, metal nitride, metal carbide, etc.), and/or conductively-doped semiconductor materials (e.g., conductively-doped silicon, conductively-doped germanium, etc.).
The conductive structures 12 may be considered to be formed within openings 15 that extend into the insulative support material 20. In the illustrated embodiment, the conductive structures 12 have angled sidewalls 17 which commonly result as openings are etched into an underlying support material. In other embodiments, the sidewalls 17 may be vertical, or may have other configurations.
The construction 500a is shown to have a planarized upper surface 19 extending across the insulative support material and the conductive structures 12. Such planarized surface 19 may result from chemical-mechanical polishing (CMP) or any other suitable polishing process.
Referring to
Referring to
The spacer material 30 may comprise any suitable composition or combination of compositions; including, for example, one or both of silicon nitride and silicon dioxide. In some embodiments, the spacer material 30 may comprise a same composition as the insulative support material 20; and in other embodiments the spacer material 30 may comprise a different composition relative to the insulative support material 20.
Referring to
The spacer material 30 may be considered to line outer lateral peripheries of the first openings 24 at the processing stage of
Referring to
Referring to
Referring to
The second conductive structures 10 are along the row 14c of
The conductive structures 10 may comprise any suitable electrically conductive composition(s), such as, for example, one or more of various metals (e.g., titanium, tungsten, cobalt, nickel, platinum, etc.), metal-containing compositions (e.g., metal silicide, metal nitride, metal carbide, etc.), and/or conductively-doped semiconductor materials (e.g., conductively-doped silicon, conductively-doped germanium, etc.).
The second conductive structures 10 shown in
The constructions discussed above may be incorporated into electronic systems. Such electronic systems may be used in, for example, memory modules, device drivers, power modules, communication modems, processor modules, and application-specific modules, and may include multilayer, multichip modules. The electronic systems may be any of a broad range of systems, such as, for example, cameras, wireless devices, displays, chip sets, set top boxes, games, lighting, vehicles, clocks, televisions, cell phones, personal computers, automobiles, industrial control systems, aircraft, etc.
Unless specified otherwise, the various materials, substances, compositions, etc. described herein may be formed with any suitable methodologies, either now known or yet to be developed, including, for example, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etc.
The terms “dielectric” and “insulative” may be utilized to describe materials having insulative electrical properties. The terms are considered synonymous in this disclosure. The utilization of the term “dielectric” in some instances, and the term “insulative” (or “electrically insulative”) in other instances, may be to provide language variation within this disclosure to simplify antecedent basis within the claims that follow, and is not utilized to indicate any significant chemical or electrical differences.
The particular orientation of the various embodiments in the drawings is for illustrative purposes only, and the embodiments may be rotated relative to the shown orientations in some applications. The descriptions provided herein, and the claims that follow, pertain to any structures that have the described relationships between various features, regardless of whether the structures are in the particular orientation of the drawings, or are rotated relative to such orientation.
The cross-sectional views of the accompanying illustrations only show features within the planes of the cross-sections, and do not show materials behind the planes of the cross-sections, unless indicated otherwise, in order to simplify the drawings.
When a structure is referred to above as being “on” or “against” another structure, it can be directly on the other structure or intervening structures may also be present. In contrast, when a structure is referred to as being “directly on” or “directly against” another structure, there are no intervening structures present.
Structures (e.g., layers, materials, etc.) may be referred to as “extending vertically” to indicate that the structures generally extend upwardly from an underlying base (e.g., substrate). The vertically-extending structures may extend substantially orthogonally relative to an upper surface of the base, or not.
Some embodiments include an integrated assembly which includes first conductive structures spaced along a first pitch along a cross-section, with the first conductive structures having a first width along the cross-section; and which includes second conductive structures over the first conductive structures and spaced along a second pitch along the cross-section, with the second pitch being less than or equal to about one-half of the first pitch. The second conductive structures have a second width along the cross-section which is less than the first width. More than one of the second conductive structures is directly over each of the first conductive structures along the cross-section. Conductive interconnects extend upwardly from each of the first conductive structures to couple each of the first conductive structures with only one of the second conductive structures directly over each of the first conductive structures. Some of the second conductive structures are directly over the first conductive structures and are not coupled to the first conductive structures through the conductive interconnects. Said some of the second conductive structures are vertically spaced from the first conductive structures by intervening insulative material.
Some embodiments include a method of forming an integrated assembly. First conductive structures are formed within an insulative support material and are spaced along a first pitch along a cross-section. Upper regions of the first conductive structures are removed to form first openings extending through the insulative support material and over remaining lower regions of the first conductive structures. Outer lateral peripheries of the first openings are lined with spacer material. The spacer material is configured as tubes having second openings extending therethrough to the remaining lower regions of the first conductive structures. Conductive interconnects are formed within the second openings. Second conductive structures are formed over the spacer material and the conductive interconnects. The second conductive structures are spaced along a second pitch along the cross-section, with the second pitch being less than or equal to about one-half of the first pitch. Some of the second conductive structures are electrically coupled to the first conductive structures through the conductive interconnects along the cross-section, and some of the second conductive structures are directly over the first conductive structures along the cross-section and are spaced from the first conductive structures by the spacer material.
Some embodiments include a method of forming an integrated assembly. Conductive structures are formed within an insulative support material and are arranged in rows. The rows extend along a first direction. The conductive structures within each row are spaced along a first pitch along a cross-section. Adjacent rows are offset relative to one another along the first direction by an increment which is a fraction of the first pitch. Upper regions of the conductive structures are removed to form first openings extending through the insulative support material and over remaining lower regions of the conductive structures. Outer lateral peripheries of the first openings are lined with spacer material. The spacer material is configured as tubes having second openings extending therethrough to the remaining lower regions of the conductive structures. Conductive interconnects are formed within the second openings. Conductive lines are formed to extend along a second direction which is substantially orthogonal to the first direction. The conductive lines are spaced from one another along the first direction by a second pitch corresponding to the increment. The conductive lines are electrically coupled to the conductive structures through the conductive interconnects, with each of the conductive lines being uniquely coupled to only one of the conductive structures relative to all others of the conductive lines.
In compliance with the statute, the subject matter disclosed herein has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the claims are not limited to the specific features shown and described, since the means herein disclosed comprise example embodiments. The claims are thus to be afforded full scope as literally worded, and to be appropriately interpreted in accordance with the doctrine of equivalents.
This patent resulted from a divisional of U.S. patent application Ser. No. 16/443,414, filed Jun. 17, 2019, which resulted from a divisional of U.S. patent application Ser. No. 15/690,200, which was filed Aug. 29, 2017, now issued as U.S. Pat. No. 10,361,158, the disclosures of which are hereby incorporated herein by reference.
Number | Name | Date | Kind |
---|---|---|---|
5627406 | Pace | May 1997 | A |
5864064 | Kano | Jan 1999 | A |
6476505 | Nakamura | Nov 2002 | B2 |
6727174 | Kotecki | Apr 2004 | B1 |
6911389 | Brennan | Jun 2005 | B2 |
6970362 | Chakravorty | Nov 2005 | B1 |
8288083 | Zhang | Oct 2012 | B2 |
8780576 | Haba | Jul 2014 | B2 |
9263501 | Asao | Feb 2016 | B1 |
9343463 | Zhong | May 2016 | B2 |
9379133 | Jung | Jun 2016 | B1 |
9431343 | Lee | Aug 2016 | B1 |
9543490 | Seo | Jan 2017 | B2 |
9853027 | Juengling | Dec 2017 | B1 |
9934970 | Burns | Apr 2018 | B1 |
10008504 | Juengling | Jun 2018 | B1 |
10134677 | Chang Chien | Nov 2018 | B1 |
10236215 | Xie | Mar 2019 | B1 |
10381305 | Juengling | Aug 2019 | B2 |
10388606 | Juengling | Aug 2019 | B2 |
10403639 | Orimoto | Sep 2019 | B2 |
11133463 | Pirovano | Sep 2021 | B2 |
20020074660 | Fukasawa | Jun 2002 | A1 |
20020185671 | Kim | Dec 2002 | A1 |
20030185086 | Hoya | Oct 2003 | A1 |
20050127519 | Scheuerlein | Jun 2005 | A1 |
20050277249 | Juengling | Dec 2005 | A1 |
20060038234 | Liaw | Feb 2006 | A1 |
20060044211 | Ramprasad | Mar 2006 | A1 |
20060289914 | Juengling | Dec 2006 | A1 |
20070045815 | Urashima | Mar 2007 | A1 |
20080054483 | Lee | Mar 2008 | A1 |
20080200046 | Knoefler | Aug 2008 | A1 |
20080265399 | Chao | Oct 2008 | A1 |
20080315348 | Xu | Dec 2008 | A1 |
20090075428 | Tang | Mar 2009 | A1 |
20090102016 | Gebreselasie | Apr 2009 | A1 |
20090166872 | Chung | Jul 2009 | A1 |
20100181613 | Kim | Jul 2010 | A1 |
20110037175 | Bangsaruntip | Feb 2011 | A1 |
20110073917 | Zhong | Mar 2011 | A1 |
20120045896 | Sipani | Feb 2012 | A1 |
20120126338 | Juengling | May 2012 | A1 |
20120153445 | Son | Jun 2012 | A1 |
20120267751 | Haba | Oct 2012 | A1 |
20120326270 | Thompson | Dec 2012 | A1 |
20130147048 | Kuh | Jun 2013 | A1 |
20130256902 | Lu | Oct 2013 | A1 |
20140176966 | Kuno | Jun 2014 | A1 |
20140252464 | Sell | Sep 2014 | A1 |
20140349476 | Chen | Nov 2014 | A1 |
20150028280 | Sciarrillo | Jan 2015 | A1 |
20150143319 | Lee | May 2015 | A1 |
20150228659 | Vu | Aug 2015 | A1 |
20150318267 | Yu | Nov 2015 | A1 |
20150364413 | Peng | Dec 2015 | A1 |
20160043047 | Shim | Feb 2016 | A1 |
20160086885 | Inagaki | Mar 2016 | A1 |
20160148903 | Su | May 2016 | A1 |
20170047260 | Huang | Feb 2017 | A1 |
20170062338 | Liu | Mar 2017 | A1 |
20170092693 | Tan | Mar 2017 | A1 |
20170092851 | Han | Mar 2017 | A1 |
20170098606 | Lu | Apr 2017 | A1 |
20170110405 | Peng | Apr 2017 | A1 |
20170154848 | Fan | Jun 2017 | A1 |
20170243922 | Eun | Aug 2017 | A1 |
20170263519 | Yu | Sep 2017 | A1 |
20180076157 | Hsu | Mar 2018 | A1 |
20180114878 | Danesh | Apr 2018 | A1 |
20180182762 | Juengling | Jun 2018 | A1 |
20180269254 | Sugioka | Sep 2018 | A1 |
20180285005 | Torng | Oct 2018 | A1 |
20180364567 | Chou | Dec 2018 | A1 |
20180366482 | Zhou | Dec 2018 | A1 |
20190027434 | Jung | Jan 2019 | A1 |
20190027489 | Orimoto | Jan 2019 | A1 |
20190051621 | Liu | Feb 2019 | A1 |
20190067183 | Liu | Feb 2019 | A1 |
20190067193 | Juengling | Feb 2019 | A1 |
20190067195 | Juengling | Feb 2019 | A1 |
20190120830 | Hoffman | Apr 2019 | A1 |
20190157240 | Tsai | May 2019 | A1 |
20190267391 | Imai | Aug 2019 | A1 |
20190267423 | Lee | Aug 2019 | A1 |
20190287905 | Lee | Sep 2019 | A1 |
20190287972 | Hafez | Sep 2019 | A1 |
20200161245 | Yang | May 2020 | A1 |
20200168511 | Cheng | May 2020 | A1 |
20200321283 | Smith | Oct 2020 | A1 |
20200365654 | Takahashi | Nov 2020 | A1 |
20210005617 | Kai | Jan 2021 | A1 |
20210043596 | Teh | Feb 2021 | A1 |
20210043655 | Liaw | Feb 2021 | A1 |
20210217812 | Hsiao | Jul 2021 | A1 |
Number | Date | Country |
---|---|---|
101252116 | Aug 2008 | CN |
Number | Date | Country | |
---|---|---|---|
20200152571 A1 | May 2020 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 16443414 | Jun 2019 | US |
Child | 16742305 | US | |
Parent | 15690200 | Aug 2017 | US |
Child | 16443414 | US |