Embodiments of the present principles generally relate to semiconductor processing of semiconductor substrates.
During bonding processes, dies are diced or separated from a substrate. The individual die then undergo a pick and place process that exerts compression forces and tension forces on the die as the die is picked up by a bonding head and placed on a substrate for bonding. The forces exerted on the die can cause the die to fracture if the die has a low die break strength, leading to reduced yields. The inventors have observed that the dicing process can have a direct impact on the die break strength.
Accordingly, the inventors have provided methods for dicing to improve die break strength performance, allowing for increased bonding yields.
Methods for dicing substrates that increase die break strength are provided herein.
In some embodiments, a method for dicing a die from a substrate may comprise performing a laser cutting process with a laser beam to form a cut that removes a first portion of a dicing street in the substrate without encroaching on silicon material layers and where a laser kerf width of the cut is less than a dicing street width of the dicing street, performing a first plasma etch process to increase the laser kerf width to a first plasma etch width that is less than the dicing street width and to remove any non-silicon dielectric material from a bottom of the cut and where the first plasma etch process is configured to remove a mix of dielectric materials and metal materials from the dicing street, and performing a second plasma etch process to increase the first plasma etch width to the dicing street width and to remove any remaining portion of the dicing street to completely separate the die from the substrate and where the second plasma etch process is configured to remove silicon material and smooth a sidewall of the die.
In some embodiments, the method further includes a substrate that includes a mask layer, an interlayer dielectric (ILD) layer, a silicon layer, and a passivation layer, a laser cutting process that removes a portion of the mask layer and the ILD layer in the dicing street, a second plasma etch process that removes a portion of the silicon layer and the passivation layer in the dicing street, a first plasma etch process and a second plasma etch process that are performed in an integrated tool without a vacuum break, a laser cutting process, a first plasma etch process, and a second plasma etch process that are performed in an integrated tool, a first plasma etch process that removes thermal damage caused by the laser cutting process, a first plasma etch process reduces particles generated by the laser cutting process, and/or a second plasma etch process that increases die break strength of the die by reducing die sidewall cracking.
In some embodiments, an integrated tool for dicing a die from a component substrate may comprise a laser chamber configured to cut non-silicon materials, at least one first plasma etching chamber configured to etch non-silicon materials, at least one second plasma etching chamber configured to etch silicon materials, and a controller configured to perform a method that includes performing a laser cutting process with a laser beam of the laser chamber to form a cut that removes a first portion of a dicing street in the component substrate without encroaching on silicon material layers and where a laser kerf width of the cut is less than a dicing street width of the dicing street, moving the component substrate in vacuum to one of the at least one first plasma etching chamber, performing a first plasma etch process to increase the laser kerf width to a first plasma etch width that is less than the dicing street width and to remove any non-silicon dielectric material from a bottom of the cut and where the first plasma etch process is configured to remove a mix of dielectric materials and metal materials from the dicing street, moving the component substrate in vacuum to one of the at least one second plasma etching chamber, and performing a second plasma etch process to increase the first plasma etch width to the dicing street width and to remove any remaining portion of the dicing street to completely separate the die from the substrate and where the second plasma etch process is configured to remove silicon material and smooth a sidewall of the die.
In some embodiments, the integrated tool may further include a mainframe configured to transport substrates between chambers in a vacuum and an equipment front end module configured to allow insertion and removal of substrates from the mainframe, a first plasma etch process that removes thermal damage caused by the laser cutting process, a first plasma etch process that reduces particles generated by the laser cutting process, and/or a second plasma etch process that increases die break strength of the die by reducing die sidewall cracking.
In some embodiments, a non-transitory, computer readable medium having instructions stored thereon that, when executed, cause a method for dicing a die from a substrate to be performed, the method may comprise performing a laser cutting process with a laser beam to form a cut that removes a first portion of a dicing street in the substrate without encroaching on silicon material layers of the substrate and where a laser kerf width of the cut is less than a dicing street width of the dicing street, performing a first plasma etch process to increase the laser kerf width to a first plasma etch width that is less than the dicing street width and to remove any non-silicon dielectric material from a bottom of the cut and where the first plasma etch process is configured to remove a mix of dielectric materials and metal materials from the dicing street, and performing a second plasma etch process to increase the first plasma etch width to the dicing street width and to remove any remaining portion of the dicing street to completely separate the die from the substrate and where the second plasma etch process is configured to remove silicon material and smooth a sidewall of the die.
In some embodiments, the method of the non-transitory, computer readable medium may further include performing on a substrate that includes a mask layer, an interlayer dielectric (ILD) layer, a silicon layer, and a passivation layer, a laser cutting process that removes a portion of the mask layer and the ILD layer in the dicing street, a second plasma etch process that removes a portion of the silicon layer and the passivation layer in the dicing street, performing a first plasma etch process and a second plasma etch process in an integrated tool without a vacuum break, performing the laser cutting process, the first plasma etch process, and the second plasma etch process in an integrated tool, performing the first plasma etch process to remove thermal damage caused by the laser cutting process, performing the first plasma etch process to reduce particles generated by the laser cutting process, and/or performing the second plasma etch process to increase die break strength of the die by reducing die sidewall cracking.
Other and further embodiments are disclosed below.
Embodiments of the present principles, briefly summarized above and discussed in greater detail below, can be understood by reference to the illustrative embodiments of the principles depicted in the appended drawings. However, the appended drawings illustrate only typical embodiments of the principles and are thus not to be considered limiting of scope, for the principles may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.
The methods provide an enhanced process for dicing (separating) of dies from a component substrate. The integration of a laser, a back-end-of-the-line (BEOL) plasma etch, and a silicon plasma etch produces a superior process for separation of the dies with lower defects. The process advantageously increases the die break strength of the die by reducing particle contamination and smoothing sidewalls of the die during the dicing process. The enhanced quality of the dicing process increases die yield during bonding by preventing cracking of the die during handling and also after interdie gapfilling procedures by reducing delamination caused by particle contamination and cracks in the die sidewalls.
Current plasma dicing strategies cause contamination and rough die sidewalls due to the use of lasers which can melt and reform removal material onto the sidewalls of the die. The methods of the present principles use a laser to only remove thicker top metal and/or dielectric material BEOL layers of an interlayer dielectric (ILD) layer. A first stage plasma etch is then used to remove thinner metal BEOL and/or mixed dielectric material of the ILD layer. The first stage plasma etch process will remove any damaged sidewall and laser induced debris from the laser process, leaving behind a smoother sidewall which is debris-free. A second stage plasma etch is then performed to remove thicker silicon layers to increase the etching rate and also to further smooth the die sidewalls. A smooth, debris-free sidewall is needed to achieve high die break strength and higher yields for interdie gapfill after bonding.
In traditional processes that use a laser beam 202 to remove the bulk of the dicing street 104, defects that impact bonding and interdie gapfilling are formed as depicted in a cross-sectional view 200 of the component substrate 102 of
In block 402 of the method 400, a laser cutting process is performed on the dicing street 516 as depicted in view 500B of
Recasting of material is a major concern when laser cutting silicon material. In addition, another concern is that plasma etching of mixed materials (e.g., metals and/or dielectrics) is difficult. By using the laser cutting process to remove the bulk of the mixed materials (e.g., mix of metals and dielectrics or mix of dielectric materials) while stopping short of lasing into silicon material (silicon layer 504), the speed of the dicing process is improved without creating silicon recast material in the laser kerf or on the mask. In other words, the laser cutting process can be used to quickly remove metals that plasma etching can not easily perform, or the laser cutting process can be used for clearing the bulk of the ILD layer 506 so that the subsequent plasma etch process is of a shorter duration to increase speed of the integrated dicing process (laser removal is much faster than plasma etching). Despite the advantages of faster material removal, the laser cutting process can also produce more recast material on the mask 508 which is difficult to remove. Thus, a balance between the fast removal rate and increased mask defects may be taken into consideration to determine the extent (e.g., laser kerf width and/or laser cutting depth, etc.) of the laser cutting process for the integrated dicing process.
In block 404, a first plasma etch process is performed on the dicing street 516 as depicted in view 500C of
The primary removal of material occurs at the bottom 532 of the cut 530 as the first plasma etch process is an anisotropic etch process. With the bulk of the metal material and/or dielectric material removed by the previous laser cutting process, the first plasma etch process can efficiently etch through the thinner remaining metals and/or dielectric materials down to at least an underlying layer of bulk silicon (silicon layer 504). The first plasma etch process may etch into the underlying silicon layer 504. However, since the subsequent plasma etch process is more proficient at removing silicon material, speed of the integrated dicing process is increased if the first plasma etch process does not encroach substantially into the silicon layer 504. The depth and width of the first plasma etch process can be controlled with process tuning.
In block 406 of the method 400, a second plasma etch process is performed on the dicing street 516 as depicted in view 500D of
The method 400 may be performed with a standalone laser chamber. The first plasma etch process and the second plasma etch process may be performed in individual chambers that are linked via a vacuum transport system such as in an integrated tool (e.g., see
A controller 680 may also be used to control the integrated processing tool 600. The controller 680 may use a direct control of the integrated processing tool 600, or alternatively, by controlling the computers (or controllers) associated with the integrated processing tool 600. In operation, the controller 680 enables data collection and feedback from the integrated processing tool 600 to optimize performance of the integrated processing tool 600 and to control the processing flow according to methods described herein. The controller 680 generally includes a central processing unit (CPU) 682, a memory 684, and a support circuit 686. The CPU 682 may be any form of a general-purpose computer processor that can be used in an industrial setting. The support circuit 686 is conventionally coupled to the CPU 682 and may comprise a cache, clock circuits, input/output subsystems, power supplies, and the like. Software routines, such as methods as described above may be stored in the memory 684 and, when executed by the CPU 682, transform the CPU 682 into a specific purpose computer (controller 680). The software routines may also be stored and/or executed by a second controller (not shown) that is located remotely from the integrated processing tool 600.
The memory 684 is in the form of computer-readable storage media that contains instructions, when executed by the CPU 682, to facilitate the operation of the semiconductor processes and equipment. The instructions in the memory 684 are in the form of a program product such as a program that implements methods of the present principles. The program code may conform to any one of a number of different programming languages. In one example, the disclosure may be implemented as a program product stored on a computer-readable storage media for use with a computer system. The program(s) of the program product define functions of the aspects (including the methods described herein). Illustrative computer-readable storage media include, but are not limited to: non-writable storage media (e.g., read-only memory devices within a computer such as CD-ROM disks readable by a CD-ROM drive, flash memory, ROM chips, or any type of solid-state non-volatile semiconductor memory) on which information is permanently stored; and writable storage media (e.g., floppy disks within a diskette drive or hard-disk drive or any type of solid-state random access semiconductor memory) on which alterable information is stored. Such computer-readable storage media, when carrying computer-readable instructions that direct the functions of the methods described herein, are aspects of the present principles.
The primary purpose of linking the two plasma etch chambers via a vacuum transport is to maintain the cleanliness of the component substrate between etch processes. In some embodiments, the removal amounts and/or rates of the method 400 may be adjusted between the three integrated processes based on a desired throughput versus die sidewall quality. For example, in non-hybrid bonding processes, a slightly lower quality sidewall may be traded for higher throughput (e.g., increased laser bulk material removal, etc.). While for hybrid bonding processes, a higher quality sidewall may be more beneficial than a slightly slower throughput rate (e.g., decreased laser bulk material removal to reduce thermal damage and/or contaminants, etc.).
In block 706, an anneal process is performed on the bonding substrate to allow metallic portions of the die and bonding substrate to join together. The anneal process may or may not be required in some bonding sequences. In block 608, an interdie gapfill process is performed on the bonding substrate as depicted in a view 800 of
Embodiments in accordance with the present principles may be implemented in hardware, firmware, software, or any combination thereof. Embodiments may also be implemented as instructions stored using one or more computer readable media, which may be read and executed by one or more processors. A computer readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing platform or a “virtual machine” running on one or more computing platforms). For example, a computer readable medium may include any suitable form of volatile or non-volatile memory. In some embodiments, the computer readable media may include a non-transitory computer readable medium.
While the foregoing is directed to embodiments of the present principles, other and further embodiments of the principles may be devised without departing from the basic scope thereof.