METHOD FOR FABRICATING LAST LEVEL COPPER-TO-C4 CONNECTION WITH INTERFACIAL CAP STRUCTURE

Abstract

The present invention relates to a method for fabricating a semiconductor device with a last level copper-to-C4 connection that is essentially free of aluminum. Specifically, the last level copper-to-C4 connection comprises an interfacial cap structure containing CoWP, NiMoP, NiMoB, NiReP, NiWP, and combinations thereof. Preferably, the interfacial cap structure comprises at least one CoWP layer. Such a CoWP layer can be readily formed over a last level copper interconnect by a selective electroless plating process.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1-9 are cross-sectional views that illustrate the processing steps for forming an exemplary copper-to-C4 connection having the aluminum-free interfacial conductive cap structure, according to one embodiment of the present invention.

Claims

1. A method comprising: providing a semiconductor device that comprises a last level copper interconnect embedded in a last level dielectric layer;forming an interfacial conductive cap structure that selectively covers the last level copper interconnect, wherein said interfacial conductive cap structure comprises CoWP, NiMoP, NiMoB, NiReP, NiWP, or combinations thereof;forming a first dielectric cap layer over the interfacial conductive cap structure and the last level dielectric layer;forming at least one additional dielectric cap layer over the first dielectric cap layer;forming a via through the first dielectric cap layer and the at least one additional dielectric cap layer to expose the interfacial conductive cap structure;forming at least one ball-limiting metallurgy (BLM) layer in the via over the interfacial conductive cap structure; andforming at least one controlled-collapse chip connection (C4) over the at least one BLM layer.

2. The method of claim 1, wherein the interfacial conductive cap structure is essentially free of aluminum.

3. The method of claim 1, wherein the interfacial conductive cap structure comprises a CoWP layer having a thickness ranging from about 200 Å to about 1000 Å.

4. The method of claim 1, wherein the interfacial conductive cap structure is embedded in the first dielectric cap layer.

5. The method of claim 1, wherein the first dielectric cap layer comprises silicon nitride and has a thickness ranging from about 100 Å to about 300 Å.

6. The method of claim 1, wherein the last level copper interconnect, the interfacial conductive cap structure, the at least one BLM layer, and the at least one C4 connection form an electrically conductive path that extends through the first dielectric cap layer and the at least one additional dielectric cap layer.

7. The method of claim 1, wherein at least three additional dielectric cap layers are formed over the first dielectric cap layer, which include a silicon dioxide layer, a silicon nitride layer, and a photosensitive polyimide layer.

8. The method of claim 1, wherein the last level copper interconnect comprises a fat wire.

9. The method of claim 1, wherein the last level dielectric layer comprises fluorinated silica glass.

10. The method of claim 1, wherein the interfacial conductive cap structure is formed by selective electroless plating.

11. The method of claim 1, wherein the via is formed by first selectively removing a portion of the at least one additional dielectric cap layer to expose the first dielectric cap layer, and then selectively removing the exposed portion of the first dielectric cap layer, stopping at the interfacial conductive cap structure.

12. The method of claim 11, wherein the portion of the first dielectric cap layer is selectively removed by a pre-BLM sputter clean process.

13. A method comprising: providing a semiconductor device that comprises a last level copper interconnect embedded in a last level dielectric layer;forming an interfacial conductive cap structure that selectively covers the last level copper interconnect;forming a first dielectric cap layer over the interfacial conductive cap structure and the last level dielectric layer;forming at least one additional dielectric cap layer over the first dielectric cap layer;selectively removing a portion of said at least one additional dielectric cap layer to expose the first dielectric cap layer;conducting in situ sputter cleaning, which selectively removes the exposed portion of the first dielectric cap layer, stopping at the at least one additional dielectric cap layer;forming at least one ball-limiting metallurgy (BLM) layer over the interfacial conductive cap structure; andforming at least one controlled-collapse chip connection (C4) over the at least one BLM layer.

14. The method of claim 13, wherein the interfacial conductive cap structure is formed by selective electroless plating.

15. The method of claim 13, wherein the interfacial conductive cap structure is essentially free of aluminum.

16. The method of claim 13, wherein the interfacial conductive cap structure comprises a CoWP layer having a thickness ranging from about 200 Å to about 1000 Å.

17. The method of claim 13, wherein the first dielectric cap layer comprises silicon nitride and has a thickness ranging from about 100 Å to about 300 Å.

18. The method of claim 13, wherein the last level copper interconnect, the interfacial conductive cap structure, the at least one BLM layer, and the at least one C4 connection form an electrically conductive path that extends through the first dielectric cap layer and the at least one additional dielectric cap layer.

19. The method of claim 13, wherein at least three additional dielectric cap layers are formed over the first dielectric cap layer, which include a silicon dioxide layer, a silicon nitride layer, and a photosensitive polyimide layer.