Claims
- 1. A method for making at least one semiconductor device comprising:
providing a sacrificial growth substrate comprising Lithium Aluminate (LiAlO2); forming at least one semiconductor layer comprising a Group III nitride adjacent the sacrificial growth substrate; attaching a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate; and removing the sacrificial growth substrate.
- 2. A method according to claim 1 further comprising adding at least one contact onto a surface of the at least one semiconductor layer opposite the mounting substrate.
- 3. A method according to claim 2 further comprising dividing the mounting substrate and at least one semiconductor layer into a plurality of individual semiconductor devices.
- 4. A method according to claim 3 further comprising bonding the mounting substrate of each individual semiconductor device to a heat sink.
- 5. A method according to claim 4 wherein the heat sink comprises copper (Cu) block.
- 6. A method according to claim 1 wherein removing comprises mechanical grinding and wet etching the sacrificial growth substrate.
- 7. A method according to claim 6 wherein the mounting substrate is resistant to the wet etching.
- 8. A method according to claim 6 further comprising protecting at least portions of the mounting substrate during wet etching.
- 9. A method according to claim 1 wherein the sacrificial growth substrate comprises single crystal LiAlO2.
- 10. A method according to claim 1 wherein the at least one semiconductor layer comprises at least one single crystal gallium nitride (GaN) layer.
- 11. A method according to claim 1 wherein attaching the mounting substrate comprises:
forming an adhesion layer on the at least one semiconductor layer; and bonding the adhesion layer to the mounting substrate.
- 12. A method according to claim 11 wherein the adhesion layer comprises at least one of nickel (Ni) and gold (Au).
- 13. A method according to claim 11 wherein the mounting substrate comprises at least one of copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium (Ti), molybdenum (Mo), tungsten (W), zirconium (Zr), platinum (Pt), palladium (Pd), and silicon (Si).
- 14. A method according to claim 1 wherein forming the at least one semiconductor layer comprises doping the at least one semiconductor layer.
- 15. A method according to claim 1 further comprising forming a buffer layer between the sacrificial growth substrate and the at least one semiconductor layer; and wherein removing the sacrificial growth substrate further comprises removing the buffer layer.
- 16. A method according to claim 1 wherein the at least one semiconductor layer has an m-plane (1010) orientation.
- 17. A method according to claim 1 wherein the at least one semiconductor layer has a thickness of less than about 10 μm.
- 18. A method according to claim 1 wherein the at least one semiconductor layer emits light upon being electrically biased.
- 19. A method for making a plurality of semiconductor devices comprising:
providing a sacrificial growth substrate comprising Lithium Aluminate (LiAlO2); forming at least one semiconductor layer comprising a Group III nitride adjacent the sacrificial growth substrate; attaching a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate, the mounting substrate comprising at least one of a metal and silicon; removing the sacrificial growth substrate using mechanical grinding and wet chemical etch; forming a plurality of contacts on the at least one semiconductor layer opposite the mounting substrate; and dividing the mounting substrate and at least one semiconductor layer into a plurality of individual semiconductor devices.
- 20. A method according to claim 19 further comprising bonding the mounting substrate of each individual semiconductor device to a heat sink.
- 21. A method according to claim 19 wherein the mounting substrate is resistant to the wet etching.
- 22. A method according to claim 19 further comprising protecting at least portions of the mounting substrate during wet etching.
- 23. A method according to claim 19 wherein the sacrificial growth substrate comprises single crystal LiAlO2.
- 24. A method according to claim 19 wherein the at least one semiconductor layer comprises at least one single crystal gallium nitride (GaN) layer.
- 25. A method according to claim 19 wherein attaching the mounting substrate comprises:
forming an adhesion layer on the at least one semiconductor layer; and bonding the adhesion layer to the mounting substrate.
- 26. A method according to claim 19 wherein forming the at least one semiconductor layer comprises doping the at least one semiconductor layer.
- 27. A method according to claim 19 further comprising forming a buffer layer between the sacrificial growth substrate and the at least one semiconductor layer; and wherein removing the sacrificial growth substrate further comprises removing the buffer layer.
- 28. A method according to claim 19 wherein the at least one semiconductor layer has an m-plane (1010) orientation.
- 29. A method according to claim 1 wherein the at least one semiconductor layer emits light upon being electrically biased.
- 30. A method for making at least one semiconductor device comprising:
providing a sacrificial growth substrate comprising single crystal Lithium Aluminate (LiAlO2); forming at least one semiconductor layer comprising a Group III nitride having an m-plane (1010) orientation adjacent the sacrificial growth substrate; attaching a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate, the mounting substrate comprising at least one of metal and silicon; and removing the sacrificial growth substrate.
- 31. A method according to claim 30 further comprising:
adding at least one contact onto a surface of the at least one semiconductor layer opposite the mounting substrate; dividing the mounting substrate and at least one semiconductor layer into a plurality of individual semiconductor devices; and bonding the mounting substrate of each individual semiconductor device to a heat sink.
- 32. A method according to claim 31 wherein removing comprises mechanical grinding and wet etching the sacrificial growth substrate; and wherein the mounting substrate is resistant to the wet etching.
- 33. A method according to claim 31 wherein removing comprises mechanical grinding and wet etching the sacrificial growth substrate; and further comprising protecting at least portions of the mounting substrate during wet etching.
- 34. A method according to claim 31 wherein the at least one semiconductor layer comprises at least one single crystal gallium nitride (GaN) layer.
- 35. A method according to claim 31 wherein attaching the mounting substrate comprises:
forming an adhesion layer on the at least one semiconductor layer; and bonding the adhesion layer to the mounting substrate.
- 36. A method according to claim 31 further comprising forming a buffer layer between the sacrificial growth substrate and the at least one semiconductor layer; and wherein removing the sacrificial growth substrate further comprises removing the buffer layer.
- 37. A method according to claim 31 wherein the at least one semiconductor layer emits light upon being electrically biased.
- 38. A semiconductor device comprising:
a heat sink; a mounting substrate adjacent said heat sink, said mounting substrate comprising at least one of metal and silicon; a plurality of semiconductor layers on said mounting substrate opposite said heat sink and defining at least one p-n junction, said semiconductor layers comprising a single crystal Group III nitride layer having an m-plane (1010) orientation; and at least one contact on an uppermost one of said semiconductor layers opposite said mounting substrate.
- 39. A semiconductor device according to claim 38 wherein said Group III nitride comprises gallium nitride.
- 40. A semiconductor device according to claim 38 further comprising an adhesion layer between said mounting substrate and said semiconductor layers.
- 41. A semiconductor device according to claim 40 wherein said adhesion layer comprises at least one of nickel (Ni) and gold (Au).
- 42. A semiconductor device according to claim 38 wherein said heat sink comprises copper (Cu).
- 43. A semiconductor device according to claim 38 wherein said mounting substrate comprises at least one of copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium (Ti), molybdenum (Mo), tungsten (W), zirconium (Zr), platinum (Pt), palladium (Pd), and silicon (Si).
- 44. A semiconductor device according to claim 38 wherein said semiconductor layers emit light responsive to an electrical bias applied to said metal substrate and said heat sink.
- 45. A light emitting semiconductor device comprising:
a heat sink; a metal substrate adjacent said heat sink; a plurality of semiconductor layers on said metal substrate opposite said heat sink and defining at least one p-n junction, said semiconductor layers comprising a single crystal gallium nitride nitride layer having an m-plane (1010) orientation; and at least one contact on an uppermost one of said semiconductor layers opposite said metal substrate; said semiconductor layers emitting light responsive to an electrical bias applied to said substrate and said at least one contact.
- 46. A light emitting semiconductor device according to claim 45 further comprising an adhesion layer between said metal substrate and said semiconductor layers.
- 47. A light emitting semiconductor device according to claim 46 wherein said adhesion layer comprises at least one of nickel (Ni) and gold (Au).
- 48. A light emitting semiconductor device according to claim 45 wherein said heat sink comprises copper (Cu).
- 49. A light emitting semiconductor device according to claim 45 wherein said metal substrate comprises at least one of copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium (Ti), molybdenum (Mo), tungsten (W), zirconium (Zr), platinum (Pt), palladium (Pd)and silicon (Si).
RELATED APPLICATION
[0001] This application is based upon prior filed copending provisional application Serial Nos. 60/455,495 filed Mar. 18, 2003 and 60/470,814 filed May 15, 2003, both of which are hereby incorporated herein in their entireties by reference.
Provisional Applications (2)
|
Number |
Date |
Country |
|
60455495 |
Mar 2003 |
US |
|
60470814 |
May 2003 |
US |