Claims
- 1. A method of forming a multi-layer semiconductor structure, comprising:
(a) providing, to a first predetermined thickness, a first patterned bond film onto a first surface of a first semiconductor structure; (b) providing, to a second predetermined thickness, a second patterned bond film onto a first surface of a second semiconductor structure; (c) aligning the first patterned bond film of the first semiconductor structure and the second patterned bond film of the second semiconductor structure using a fixture; and (d) forming a bond between the first and second patterned bond films to provide the first and second semiconductor structures as the multi-layer semiconductor structure.
- 2. The method of claim 1, wherein forming the bond includes:
heating the first and second patterned bond films to a predetermined temperature; and applying a force to at least one of the first and the second semiconductor structures for a predetermined period of time to maintain contact between the first and second patterned bond films for the predetermined period of time.
- 3. The method of claim 1, wherein aligning the first and second semiconductor structures using the fixture includes:
disposing the first and second semiconductor structures on the fixture; and maintaining a predetermined space between the first and second semiconductor structures using a plurality of spacers disposed between the first and second semiconductor structures.
- 4. The method of claim 3, wherein forming the bond includes:
disposing the fixture and the first and second semiconductor structures in a bonding chamber; purging undesired impurities from the bonding chamber; applying a first predetermined force to the first and the second semiconductor structures for a first predetermined time interval; removing the spacers from the first and second semiconductor structures while the first and second semiconductors are under the first predetermined force; heating the first and second semiconductor structures at a first predetermined rate to a predetermined bonding temperature; applying a second predetermined force to the first and the second semiconductor structures for a second predetermined time interval while heating the first and second semiconductor structures at the first predetermined rate; and applying a third predetermined force to the first and second semiconductor structures for a third predetermined time interval after reaching the predetermined bonding temperature.
- 5. The method of claim 4, further including evacuating the bonding chamber to a predetermined pressure.
- 6. The method of claim 4, further including forming a non-oxidizing ambient in the bonding chamber.
- 7. The method of claim 4, further including forming a non-oxidizing ambient in the bonding chamber and including hydrogen.
- 8. The method of claim 4, further comprising cooling the first and second semiconductor structures.
- 9. The method of claim 8, further comprising heating the multi-layer semiconductor structure at a predetermined temperature for a fourth predetermined time interval.
- 10. The method of claim 9, wherein heating the multi-layer semiconductor structure further includes annealing the multi-layer semiconductor structure.
- 11. The method of claim 1, wherein providing the first patterned bond film includes providing at least one of a metallic bond film or an alloy bond film.
- 12. The method of claim 11, wherein the metallic bond film includes copper.
- 13. The method of claim 1, wherein providing the second patterned bond film includes providing at least one of a metallic bond film or an alloy bond film.
- 14. The method of claim 13, wherein the metallic bond film includes copper.
- 15 The method of claim 1, wherein providing the first patterned bond film onto the first surface of the first semiconductor structure includes providing the first patterned bond film onto a first surface of a first semiconductor wafer structure.
- 16. The method of claim 1, wherein providing the second patterned bond film onto the first surface of the second semiconductor structure includes providing the second patterned bond film onto a first surface of a second semiconductor wafer structure.
- 17. The method of claim 1, wherein providing the first patterned bond film onto the first surface of the first semiconductor structure includes providing the first patterned bond film onto a first surface of a first semiconductor die structure.
- 18. The method of claim 1, wherein providing the second patterned bond film onto the first surface of the second semiconductor structure includes providing the second patterned bond film onto a first surface of a second semiconductor die structure.
- 19. The method of claim 1, wherein providing the first patterned bond film onto the first surface of the first semiconductor structure includes providing the first patterned bond film onto a first surface of a first semiconductor die structure and providing the second patterned bond film onto the first surface of the second semiconductor structure includes providing the second patterned bond film onto at least a portion of a first surface of a semiconductor wafer structure.
- 20 A method of forming a multi-layer semiconductor structure, comprising:
(a) retaining a first semiconductor structure to a second semiconductor structure such that the first and second semiconductor structures are separated by a predetermined distance; (b) disposing the fixture in a bonding chamber; (c) purging undesirable impurities from the bonding chamber; (d) applying a first predetermined force to the first and the second semiconductor structures for a first predetermined time interval; (e) removing the spacer flaps from the first and second semiconductor structures while the first and second semiconductor structures are under the first predetermined force; (f) applying a second predetermined force to the first and the second semiconductor structures for a second predetermined time interval while heating the first and second semiconductor structures at a first predetermined rate; and (g) applying a third predetermined force to the first and second semiconductor structures for a third predetermined time interval.
- 21. The method claim 20, further including:
(h) cooling the first and second semiconductor structures.
- 22. The method of claim 20, wherein retaining comprises:
clamping the first semiconductor structure to the second semiconductor structure using a fixture; and inserting one or more spacers between the first and second semiconductor structures to provide the predetermined spacing.
- 23. The method of claim 20 wherein retaining comprises:
providing a force against at least one of the first and second semiconductor structures to maintain the first semiconductor structure the predetermined distance from the second semiconductor structure.
- 24. The method of claim 20, further including:
heating the multi-layer semiconductor structure at a predetermined temperature for a fourth predetermined time interval.
- 25. The method of claim 24, wherein heating the multi-layer semiconductor structure includes annealing the multi-layer semiconductor structure for the fourth predetermined time interval.
- 26. The method of claim 20, further including evacuating the bonding chamber to a predetermined pressure.
- 27. The method of claim 20, further including forming a non-oxidizing ambient in the bonding chamber.
- 28. The method of claim 20, further including forming a non-oxidizing ambient in the bonding chamber and including hydrogen.
- 29. The method of claim 20, wherein retaining the first semiconductor structure to the second semiconductor structure includes retaining a first semiconductor wafer structure to a second semiconductor wafer structure.
- 30. The method of claim 20, wherein retaining the first semiconductor structure to the second semiconductor structure includes retaining a first semiconductor die structure to a second semiconductor die structure.
- 31. A method of forming a multi-layer semiconductor structure, comprising:
(a) providing, to a first predetermined thickness, at least first and second patterned bond films onto a first surface of a first semiconductor structure; (b) providing, to a second predetermined thickness, a third patterned bond film onto a first surface of a second semiconductor structure; (c) providing, to a third predetermined thickness, a fourth patterned bond film onto a first surface of a third semiconductor structure; (d) aligning the first patterned bond film of the first semiconductor structure and the third patterned bond film of the second semiconductor structure; (e) aligning the second patterned bond film of the first semiconductor structure and the fourth patterned bond film of the second semiconductor structure; and (f) forming a bond between the first, second and third semiconductor structures.
- 32. The method of claim 31, wherein step (f) further includes forming the bond using the first, second, third and fourth patterned bond films to provide the multi-layer semiconductor structure.
- 33. The method of claim 31, wherein forming the bond between the first, second and third semiconductor structures includes forming a bond between first, second and third semiconductor die elements to provide the multi-layer semiconductor structure.
- 34. The method of claim 33, wherein forming the bond between the first, second and third semiconductor die elements includes forming a bond between the first semiconductor die element having a first geometry, the second semiconductor die element having a second geometry and the third semiconductor die element having a third geometry.
CROSS REFERENCE TO RELATED APPLICATION
[0001] This application claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Application No. 60,437,549, filed on Dec. 31, 2002, entitled, A Multi-Layer Integrated Semiconductor Structure, which is hereby incorporated by reference in its entirety.
Provisional Applications (1)
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Number |
Date |
Country |
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60437549 |
Dec 2002 |
US |