Patent Application
20100224587
The present disclosure relates to a plasma etching method, a plasma etching apparatus and a computer-readable storage medium for etching a Si-containing antireflection film, which is formed on a processing target substrate, while using an ArF photoresist as a mask.
Conventionally, in a manufacturing process of a semiconductor device, an etching target film such as a silicon oxide film is formed in a predetermined pattern by performing a plasma etching process through a photoresist mask. Further, in such a plasma etching process, along with miniaturization of a circuit pattern, an ArF photoresist, which is exposed to light having a shorter wavelength, has been widely utilized.
However, when the plasma etching process is performed by using an ArF photoresist as a mask, the ArF photoresist is readily damaged by plasma because the ArF photoresist has a low plasma resistance. Thus, various methods to suppress the damage have been proposed. As one of such methods, there is known a technique for performing the plasma etching under a low pressure by using an etching gas including a gaseous mixture containing an O2 gas and a CF-based gas such as CF4, when an antireflection film under the ArF photoresist is etched (see, for example, Patent Document 1).
Patent Document 1: Japanese Patent Laid-open Publication No. 2006-32721
In the plasma etching using an ArF photoresist as a mask, however, a high etching rate and a high selectivity could not be achieved if the damage (roughness) on the ArF photoresist is suppressed. Especially, there has been no conventionally known technique capable of plasma-etching a silicon-containing antireflection coating film (Si-ARC) with a high etching rate and a high selectivity while suppressing damage (roughness) on the ArF photoresist. Thus, development of such a technique has been strongly demanded.
In view of the foregoing, the present disclosure provides a plasma etching method, a plasma etching apparatus and a computer-readable storage medium capable of plasma-etching a silicon-containing antireflection coating film (Si-ARC) with a high etching rate and a high selectivity while suppressing damage (roughness) on an ArF photoresist.
In accordance with one aspect of the present disclosure, there is provided a plasma etching method for etching a Si-containing antireflection film under an ArF photoresist formed on a substrate by using plasma of a processing gas while using the ArF photoresist as a mask. The plasma etching method is performed by a plasma etching apparatus including a lower electrode installed in a processing chamber and configured to mount the substrate; an upper electrode installed in the processing chamber so as to face the lower electrode; a processing gas supply unit configured to supply the processing gas into the processing chamber; and a high frequency power supply configured to apply a high frequency power between the lower electrode and the upper electrode. The plasma etching method includes applying a DC voltage to the upper electrode while using a gaseous mixture containing a CF3I gas, an oxygen gas, and a CF-based gas and/or a CHF-based gas as the processing gas.
Further, the DC voltage applied to the upper electrode may be in a range of about −1000 V to about −300 V.
Furthermore, the processing gas may be a gaseous mixture containing a CF4 gas, a CF3I gas and an oxygen gas, and a ratio of a CF3I gas flow rate to a sum of a CF4 gas flow rate and the CF3I gas flow rate (flow rate of the CF3I gas/(flow rate of the CF4 gas+flow rate of the CF3I gas) may be in a range of about 0.1 to about 0.3.
Further, a high frequency bias power of about 100 W to about 300 W may be applied to the lower electrode.
Furthermore, a treatment process for performing a treatment of the ArF photoresist may be performed prior to etching the Si-containing antireflection film.
Further, the treatment process may be a plasma process in which a H2 gas, a mixture of a H2 gas and a N2 gas or a mixture of a H2 gas and an Ar gas is used as a processing gas. The processing gas may be excited into plasma, and the plasma may act on the ArF photoresist.
In accordance with another aspect of the present disclosure, there is provided a plasma etching apparatus including a lower electrode installed in a processing chamber and configured to mount a substrate; an upper electrode installed in the processing chamber so as to face the lower electrode; a processing gas supply unit configured to supply a processing gas into the processing chamber; a high frequency power supply configured to apply a high frequency power between the lower electrode and the upper electrode; and a controller configured to control a gaseous mixture containing a CF3I gas, an oxygen gas, and a CF-based gas and/or a CHF-based gas to be supplied from the processing gas supply unit as the processing gas, and a DC voltage to be applied to the upper electrode from a DC power supply when a Si-containing antireflection film under an ArF photoresist formed on the substrate is etched by plasma of the processing gas while using the ArF photoresist as a mask.
In accordance with still another aspect of the present disclosure, there is provided a computer-readable storage medium that stores therein a computer-executable control program. When the computer-executable control program is executed, the control program controls a plasma etching apparatus to carry out the plasma etching method.
In accordance with the present disclosure, a plasma etching method, a plasma etching apparatus and a computer-readable storage medium capable of plasma-etching a silicon-containing antireflection coating film (Si-ARC) with a high etching rate and a high selectivity while suppressing damage (roughness) on an ArF photoresist can be provided.
The disclosure may best be understood by reference to the following description taken in conjunction with the following figures:
Hereinafter, an embodiment of the present disclosure will be explained with reference to the accompanying drawings.
The plasma etching apparatus includes a hermetically sealed processing chamber 1 which is electrically grounded. The processing chamber 1 is of a cylindrical shape and is made of, e.g., aluminum. Installed in the processing chamber 1 is a mounting table 2 configured to horizontally hold thereon a semiconductor wafer W as a processing target object. The mounting table 2 is made of, e.g., aluminum and functions as a lower electrode. The mounting table 2 is supported by a conductive support 4 on an insulating plate 3. A focus ring 5 made of, e.g., single-crystalline silicon is installed on a peripheral portion of a top surface of the mounting table 2. Further, a cylindrical inner wall 3a made of, e.g., quartz is configured to surround the mounting table 2 and the support 4.
A first RF power supply 10a and a second RF power supply 10b are connected to the mounting table 2 via a first matching unit 11a and a second matching unit 11b, respectively. The first RF power supply 10a is for plasma generation, and a high frequency power of a preset frequency (equal to or greater than about 27 MHz, e.g., about 40 MHz) is supplied from the first RF power supply 10a to the mounting table 2. Further, the second RF power supply 10b is for ion implantation (bias), and a high frequency power of a predetermined frequency (equal to or less than about 13.56 MHz, e.g., about 2 MHz) lower than that of the first RF power supply 10a is supplied from the second RF power supply 10b to the mounting table 2. Meanwhile, a shower head 16 serving as an upper electrode is installed above the mounting table 2, facing the mounting table 2 in parallel. The mounting table 2 and the shower head 16 are configured to function as a pair of electrodes.
An electrostatic chuck 6 configured to electrostatically attract and hold the semiconductor wafer W thereon is provided on the top surface of the mounting table 2. The electrostatic chuck 6 includes an insulator 6b and an electrode 6a embedded therein, and the electrode 6a is connected to a DC power supply 12. The semiconductor wafer W is attracted and held by a Coulomb force generated by applying a DC voltage to the electrode 6a from the DC power supply 12.
A coolant path 4a is provided within the mounting table 2, and a coolant inlet pipe 4b and a coolant outlet pipe 4c are coupled to the coolant path 4a. By circulating a proper coolant such as cooling water through the coolant path 4a, the support 4 and the mounting table 2 can be controlled to a preset temperature. Further, a backside gas supply pipe 30 for supplying a cold heat transfer gas (backside gas) such as a helium gas to the rear side of the semiconductor wafer W is formed through the mounting table 2 and so forth. This backside gas supply pipe 30 is connected to a non-illustrated backside gas supply source. With such configurations, the semiconductor wafer W held on the top surface of the mounting table 2 by the electrostatic chuck 6 can be controlled to a preset temperature.
The shower head 16 is installed at a ceiling wall of the processing chamber 1. The shower head 16 includes a main body 16a and a top plate 16b serving as an electrode plate. The shower head 16 is supported at a top portion of the processing chamber 1 via an insulating member 45. The main body 16a is made of a conductive material such as aluminum of which surface is anodically oxidized, and the top plate 16b is detachably supported on a bottom portion of the main body 16a.
A gas diffusion space 16c is formed within the main body 16a, and a multiple number of gas through holes 16d are formed in a bottom portion of the main body 16a so as to be located under the gas diffusion space 16c. Further, gas introduction holes 16e are formed through the top plate 16b in its thickness direction so as to be connected with the gas through holes 16d. With this configuration, a processing gas supplied into the gas diffusion space 16c is dispersedly introduced into the processing chamber 1 via the gas through holes 16d and the gas introduction holes 16e, as in a shower device. A non-illustrated pipe or the like for circulating a coolant is installed in the main body 16a and so forth, and, thus, the shower head 16 can be cooled to a predetermined temperature during a plasma etching process.
The main body 16a is provided with a gas inlet 16f through which the processing gas is introduced into the gas diffusion space 16c. The gas inlet 16f is connected to one end of a gas feed pipe 15a, and the other end of the gas feed pipe 15a is connected to a processing gas supply source 15 that supplies a processing gas for etching or treatment. A mass flow controller (MFC) 15b and an opening/closing valve V1 are provided on the gas feed pipe 15a in sequence from the upstream side. For example, a gaseous mixture containing a CF4 gas, a CF3I gas and an oxygen gas is supplied into the gas diffusion space 16c via the gas feed pipe 15a from the processing gas supply source 15 as a processing gas for plasma etching, and then the gaseous mixture is dispersedly supplied into the processing chamber 1 via the gas through holes 16d and the gas introduction holes 16e from the gas diffusion space 16c, as in a shower device.
A variable DC power supply 52 is electrically connected to the shower head 16 serving as the upper electrode via a low pass filter (LPF) 51. The power feed of the variable DC power supply 52 can be on-off controlled by an on/off switch 53. A current and a voltage of the variable DC power supply 52 and an on/off operation of the on/off switch 53 are controlled by a control unit 60 to be described later. When plasma is generated in a processing space by applying the high frequency powers from the first RF power supply 10a and the second RF power supply 10b to the mounting table 2, the on/off switch 53 is turned on by the control unit 60 if necessary, whereby a preset negative DC voltage is applied to the shower head 16 serving as the upper electrode.
A cylindrical ground conductor la is extended upward from a sidewall of the processing chamber 1 to be located at a position higher than the shower head 16. The cylindrical ground conductor la has a ceiling wall at the top thereof.
A gas exhaust port 71 is provided at a bottom portion of the processing chamber 1, and a gas exhaust unit 73 is connected to the gas exhaust port 71 via a gas exhaust pipe 72. By operating a vacuum pump provided in the gas exhaust unit 73, the processing chamber 1 can be depressurized to a preset vacuum level. Further, a loading/unloading port 74 for the wafer W is provided at a sidewall of the processing chamber 1, and a gate valve 75 for opening and closing the loading/unloading port 74 is provided at the loading/unloading port 74.
Reference numerals 76 and 77 in
The overall operation of the plasma etching apparatus configured as described above is controlled by the control unit 60. The control unit 60 includes a process controller 61 having a CPU, for controlling individual parts of the plasma etching apparatus, a user interface 62, and a storage unit 63.
The user interface 62 includes a keyboard with which a process manager inputs a command to operate the plasma etching apparatus, a display for visualizing and displaying an operational status of the plasma etching apparatus, and so forth.
The storage unit 63 stores therein, e.g., control programs (software) for executing various processes performed in the plasma etching apparatus under the control of the process controller 61, and recipes including processing condition data and the like. When a command is received from the user interface 62 or the like, the process controller 61 retrieves a necessary recipe from the storage unit 63 and executes it. Accordingly, a desired process is performed in the plasma etching apparatus under the control of the process controller 61. The control programs and the recipes including the processing condition data can be read out from a computer-readable storage medium (e.g., a hard disk, a CD, a flexible disk, a semiconductor memory, and the like), or can be used on-line by receiving them from another apparatus via a dedicated line, whenever necessary, for example.
Below, a sequence for plasma-etching an organic film or the like, which is formed on a semiconductor wafer W, by the plasma etching apparatus configured as described above will be explained. First, the gate valve 75 is opened, and a semiconductor wafer W is loaded into the processing chamber 1 from a non-illustrated load lock chamber by a non-illustrated transport robot or the like through the loading/unloading port 74, and the semiconductor wafer W is mounted on the mounting table 2. Then, the transport robot is retreated from the processing chamber 1, and the gate valve 75 is closed. Subsequently, the processing chamber 1 is evacuated through the gas exhaust port 71 by the vacuum pump of the gas exhaust unit 73.
When the inside of the processing chamber 1 reaches a preset vacuum level, a processing gas (etching gas) is supplied from the processing gas supply source 15, and the inside of the processing chamber 1 is maintained at a certain pressure, e.g., about 6.7 Pa (about 50 mTorr). While maintaining this pressure level, a high frequency power having a frequency of, e.g., about 40 MHz is supplied to the mounting table 2 from the first RF power supply 10a. Further, from the second RF power supply 10b, a high frequency power (bias) having a frequency of, e.g., 2.0 MHz is supplied to the mounting table 2 so as to implant ions. At this time, a DC voltage is applied from the DC power supply 12 to the electrode 6a of the electrostatic chuck 6, whereby the semiconductor wafer W is attracted by a Coulomb force.
By applying the high frequency powers to the mounting table 2 serving as the lower electrode as described above, an electric field is generated between the shower head 16 serving as the upper electrode and the mounting table 2 serving as the lower electrode. Thus, an electric discharge is generated in the processing space in which the semiconductor wafer W is located, whereby a silicon-containing antireflection coating film (Si-ARC) and the like formed on the semiconductor wafer W is etched by plasma of the processing gas.
Here, since a DC voltage can be applied to the shower head 16 during the plasma process as described above, the following effects can be obtained. Depending on a process involved, plasma having high electron density and low ion energy may be required. If the DC voltage is used in such a case, energy of ions which is implanted to the semiconductor wafer W would be decreased, and electron density of the plasma would be increased. As a consequence, an etching rate of an etching target film formed on the semiconductor wafer W would be increased, while a sputtering rate of a film serving as a mask formed on the etching target film would be reduced, resulting in improvement of selectivity.
Upon the completion of the above-described etching process, the supplies of the high frequency powers, the DC voltage and the processing gas are stopped, and the semiconductor wafer W is unloaded from the processing chamber 1 in a reverse sequence to the above-described sequence.
Now, the plasma etching method in accordance with the embodiment of the present disclosure will be described with reference to
The semiconductor wafer W having the above-described structure is loaded into the processing chamber 1 of the plasma etching apparatus shown in
In the present embodiment, when the plasma etching of the silicon-containing antireflection coating film (Si-ARC) 102 is performed, a gaseous mixture containing a CF3I gas, an oxygen gas, and a CF-based gas and/or a CHF-based gas is used as the processing gas, and a preset negative DC voltage is applied to the shower head 16 as the upper electrode from the variable DC power supply 52.
The value of the negative DC voltage applied to the shower head 16 is desirably in the range of about −1000 V to about −300 V and, more desirably, in the range of about −900 V to about −600 V.
For example, a gaseous mixture containing a CF4 gas, a CF3I gas and an O2 gas may be appropriately used as the processing gas. In this case, a ratio of a CF3I gas flow rate to the sum of a CF4 gas flow rate and the CF3I gas flow rate (flow rate of the CF3I gas/(flow rate of the CF4 gas+flow rate of the CF3I gas) is desirably set to be in the range of about 0.1 to about 0.3. Further, a flow rate of the O2 gas is desirably set to range from about 1% to about 3% of the total flow rate of the processing gas, more desirably, to be about 2%.
Further, in the above-discussed plasma etching, it is desirable to supply a high frequency power for ion implantation (bias) to the mounting table 2 serving as the lower electrode from the second RF power supply 10b. The high frequency power for ion implantation (bias) is desirably in the range of about 100 W to about 300 W.
As an experimental example 1, a plasma etching process for a silicon-containing antireflection coating film (Si-ARC) 102 was performed on a semiconductor wafer having the same structure as shown in
The processing recipes for the experiment example 1 described below are read out from the storage unit 63 of the control unit 60 and sent to the process controller 61. The process controller 61 controls respective parts of the plasma etching apparatus based on a control program, whereby the plasma etching process is performed according to the read out processing recipes.
Processing gas: CF4/CF3I/O2=225/25/5 sccm
Pressure: 6.7 Pa (50 mTorr)
High frequency power (HF/LF): 400/100 W
DC voltage: −900 V
In this experimental example 1, an etching rate of an ArF photoresist and an etching rate of the silicon-containing antireflection coating film (Si-ARC) were 48.5 nm/min and 120.0 nm/min, respectively, and a selectivity (etching rate of the silicon-containing antireflection coating film (Si-ARC)/etching rate of the ArF photoresist) was about 2.5. Further, a state of the ArF photoresist after the etching was observed by a SEM (Scanning Electron Microscope), and, consequently, it was found out that the ArF photoresist has a reduced roughness. Further, a CD (line width) was 71.7 nm, and a LWR (Line Width Roughness) was 3.8 nm.
As a comparative example, a plasma etching process for a silicon-containing antireflection coating film (Si-ARC) 102 was conducted under the following conditions.
Processing gas: CF4/O2=250/5 sccm
Pressure: 10 Pa (75 mTorr)
High frequency power (HF/LF): 400/0 W
DC voltage: 0 V
In the above comparative example 1, an etching rate of an ArF photoresist was 65.0 nm/min; an etching rate of the silicon-containing antireflection coating film (Si-ARC) was 50.5 nm/min; and a selectivity (the etching rate of the silicon-containing antireflection coating film (Si-ARC)/the etching rate of the ArF photoresist) was about 0.8. Further, a state of the ArF photoresist after the etching was observed by the SEM, and, consequently, it was found out that a CD (line width) was 47.9 nm and a LWR (Line Width Roughness) was 4.3 nm although the ArF photoresist was not roughened so much. That is, since the ArF photoresist was etched in a large amount, a remaining film amount was small.
As stated above, in the experiment example, the etching rate of the silicon-containing antireflection coating film (Si-ARC) and the selectivity were higher than those in the comparative example while the LWR of the ArF photoresist was smaller. Further, the CD (line width) of the ArF photoresist was also larger in the experiment example.
In addition, there was conducted a plasma etching of an experiment example 2 in which treatment process of the ArF photoresist was additionally carried out prior to etching the silicon-containing antireflection coating film (Si-ARC) in the experiment example 1. The treatment process in the experiment example 2 is performed to modify and smooth the surface of the ArF photoresist by allowing plasma of a treatment gas containing, e.g., a hydrogen gas (a H2 gas, a mixture of H2 gas and N2 gas, a mixture of H2 gas and Ar gas, or the like) to act on the ArF photoresist. In the experiment example 2, the treatment process was carried out under the following conditions.
Processing gas: H2/N2=450/450 sccm
Pressure: 13.3 Pa (100 mTorr)
High frequency power (HF/LF): 200/0 W
DC voltage: 0 V
After the treatment process was completed, the same plasma etching process as described in the experiment example 1 was conducted. A state of the ArF photoresist after the etching was observed by the SEM in the experiment example 2, and it was found out that the ArF photoresist has a reduced roughness, and a CD (line width) and a LWR (Line Width Roughness) were 69.4 nm and 3.2 nm, respectively. As compared to the result in the experiment example 1, the LWR was further improved.
In each of the above-described experiment examples, a high frequency power for ion implantation (bias) was applied to the mounting table (lower electrode) 2 from the second RF power supply 10b during the plasma etching process so as to increase an etching rate of the silicon-containing antireflection coating film (Si-ARC).
Processing gas: CF4/CF3I/O2=225/25/5 sccm
Pressure: 10.0 Pa (75 mTorr)
High frequency power (HF/LF): 400/(varied) W
DC voltage: 0 V
Meanwhile, if the high frequency bias power increases, the ArF photoresist is roughened. Further, as can be seen from
A relationship between a negative DC voltage applied to the shower head (upper electrode) 16 and a selectivity was investigated (LF=200 W, and the other etching conditions except the DC voltage were the same as those in the conditions (1)). The result is shown in
Further, the high frequency bias power applied to the mounting table (lower electrode) 2 is desirably set to be equal to or higher than about 100 W so as to obtain a necessary etching rate. To be more specific, to obtain a sufficient selectivity in the above-specified DC voltage range and to suppress roughness of the ArF photoresist, the high frequency bias power is desirably set to be equal to or less than about 300 W. That is, it is desirable that the high frequency bias power is in the range of about 100 W to about 300 W.
Meanwhile, as shown in
From the above, it is desirable that the ratio of the CF3I gas flow rate to the sum of the CF4 gas flow rate and the CF3I gas flow rate (flow rate of the CF3I gas/(flow rate of the CF4 gas+flow rate of the CF3I gas)) is in the range of about 0.1 to about 0.3 (about 10% to about 30%).
As discussed above, in accordance with the present embodiment, the silicon-containing antireflection coating film (Si-ARC) can be plasma-etched with a high etching rate while suppressing damage (roughness) of the ArF photoresist. Further, since the selectivity is high, a process for narrowing a line width (CD) of the ArF photoresist, reducing roughness thereof, or the like can be also employed. Moreover, it should be noted that the above-described embodiment and experiments are nothing more than examples, and various changes and modifications may be made.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2009-050389 | Mar 2009 | JP | national |
This application claims the benefit of Japanese Patent Application No. 2009-050389 filed on Mar. 4, 2009 and U.S. Provisional Application Ser. No. 61/220,634 filed on Jun. 26, 2009, the entire disclosures of which are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| 61220634 | Jun 2009 | US |
