Claims
- 1. A method of manufacturing a semiconductor device, comprising the steps of:providing a lead frame having a front face, a back face opposed of the front face, a tub and a plurality of leads arranged around the tub wherein a back face of the tub is etched off and each of the leads is thicker than the tub; providing a semiconductor chip having a principal face, back face and a plurality of electrodes formed on the principal face; bonding the back face of the semiconductor chip on the front face of the tub; electrically connecting the plurality of electrodes with the plurality of leads via a plurality of wires, respectively; providing a molding die having an upper part and a lower part wherein the lower part has a cavity; arranging the lead frame between the upper part and the lower part as the bonded semiconductor chip is positioned in the cavity of the lower part and the back face of the tub is facing the upper part; and after the arranging step, injecting a resin in the cavity for sealing the semiconductor chip, the tub, the plurality of wires, and a part of each of the plurality of leads in the resin, wherein the back face of the tub is entirely sealed by the resin.
- 2. A method of manufacturing a semiconductor device according to claim 1, wherein back faces of each of the plurality of leads are exposed from the resin.
- 3. A method of manufacturing a semiconductor device according to claim 2, wherein the front face of the tub is smaller than the back face of the semiconductor chip and a part of the back face of the semiconductor chip is in contact with the resin.
- 4. A method of manufacturing a semiconductor device according to claim 3, wherein a position of the tub of the provided lead frame is not an elevated position.
Priority Claims (1)
Number |
Date |
Country |
Kind |
11-371260 |
Dec 1999 |
JP |
|
Parent Case Info
This is a continuation of application Ser. No. 09/733,929 filed on Dec. 12, 2000, now U.S. Pat. No. 6,399,423.
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Number |
Date |
Country |
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Sep 1990 |
JP |
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JP |
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Entry |
“Semiconductor Assembling/Testing Technique of '99”, Extra Issue of Monthly Semiconductor World, Jul. 27, 1998. |
Continuations (1)
|
Number |
Date |
Country |
Parent |
09/733929 |
Dec 2000 |
US |
Child |
10/108439 |
|
US |