Semiconductor device and manufacture method thereof

Abstract

A joint board is arranged between an upper package and a lower package. The arrangement of the joint board makes it possible to reduce the size of solder balls and to arrange them with narrower pitch. The joint board has slightly greater dimensions those of the upper package and the lower package. This makes it possible to prevent underfill from leaking and spreading.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a side view of a conventional PoP structure;

FIG. 2 is a side view of a conventional PoP structure with a concave shape;

FIG. 3 is a side view of a PoP structure according to the present invention;

FIG. 4 is a cross-sectional view of the package taken along the line X-X′ of FIG. 3;

FIG. 5 is a side view of the PoP structure having underfill injected according to the present invention;

FIG. 6 is a side view of the lower package according to the present invention;

FIG. 7 is a side view of the upper package according to the present invention;

FIG. 8 is a top plan view of a joint board frame according to the present invention;

FIG. 9 is a rear plan view of the joint board frame according to the present invention;

FIG. 10 is a flowchart illustrating a manufacturing process according to the present invention;

FIG. 11A is a side view illustrating one of principal manufacturing steps according to the present invention;

FIG. 11B is a side view illustrating one of the principal manufacturing steps according to the present invention;

FIG. 11C is a side view illustrating one of the principal manufacturing steps according to the present invention;

FIG. 12A is a side view illustrating one of the principal manufacturing steps according to the present invention;

FIG. 12B is a side view illustrating one of the principal manufacturing steps according to the present invention; and

FIG. 12C is a side view illustrating one of the principal manufacturing steps according to the present invention.

Claims

1. A semiconductor device, comprising: a lower package which has a first semiconductor element portion;an upper package which has a second semiconductor element portion and which is stacked over the lower package; anda joint board which is arranged between the upper package and the lower package and which has a greater size than each of the lower and the upper packages.

2. The semiconductor device according to claim 1, wherein: the joint board has an opening that is greater than the first semiconductor element portion of the lower package, andthe first semiconductor element portion is arranged in the opening.

3. The semiconductor device according to claim 1, wherein: the first semiconductor element portion of the lower package is smaller than the second semiconductor element portion of the upper package.

4. The semiconductor device according to claim 1, wherein: the joint board has a wiring pattern which differs depending on the upper package and the lower package.

5. The semiconductor device according to claim 1, wherein: the joint board is connected to the upper package and the lower package by connection means selected from among solder balls, solder paste, and solder flux.

6. The semiconductor device according to claim 1, wherein: spaces between the joint board and the upper and lower packages are filled with underfill.

7. The semiconductor device according to claim 1, wherein: each side of the joint board is greater than each side of the upper and lower packages by 50 μm or more.

8. A method of manufacturing a stacked semiconductor device, comprising: a first connection step of connecting a first package having a first semiconductor element portion to a first surface of a joint board frame having a plurality of openings;a second connection step of connecting a second package having a second semiconductor element portion to a second surface of the joint board frame; anda step of cutting the joint board frame into separate joint boards, each of the joint boards having a size greater than each of the first and second packages.

9. The method according to claim 8, further comprising: an underfill application step and a baking step after each of the first and second connection steps.

10. The method according to claim 8, further comprising: an underfill application step and a baking step after the second connection step.

11. The method according to claim 8, wherein: the joint board frame is connected to the first and second packages arranged on lower and upper sides of the joint board frame by connection means selected from among solder balls, solder paste, and solder flux.