Patent Grant
7425480
A source/drain region and a gate electrode of a MOS transistor are electrically insulated from each other by a gate insulating film present between the source/drain region and the gate electrode. Since the lower edge of the gate electrode is formed into a sharp shape, electric fields are concentrated on the lower edge of the gate electrode. The enhancement of the electric fields causes dielectric failure in insulating between the source/drain region and the gate electrode.
The gate insulating film adjacent to the lower edge of the gate electrode sustains process damage owing to etching which is performed when the gate electrode is formed or ion implantation which is performed when the source/drain region is formed. The deterioration in the insulation resistance is caused by the process damage. The deterioration in the insulation resistance results in the dielectric failure to becomes more critical.
The foregoing states also applies to the lower edge of a floating gate electrode of a flash memory cell as well as the lower edge of the gate electrode of the MOS transistor. That is, the foregoing fact usually applies to an insulating gate transistor of a type incorporating a gate electrode having a sharp edge and disposed opposite to a semiconductor substrate through a gate insulating film.
As a conventional technique for overcoming the foregoing problem of the dielectric failure, a post-oxidation process is known. As shown in
Birds beak oxidation occurring when the thermal oxidation is performed enlarges the distance between the lower edge of the polycrystalline silicon film 93 and the silicon substrate 91. Thus, the electric field at the lower edge can be weakened. When the distance between the substrate and the lower edge is elongated, the distribution of the electric fields is not changed. The overall intensity of the electric field is, however, weakened, causing the electric field at the lower edge to be moderated.
The silicon oxide film 92 present adjacent to the edge of the polycrystalline silicon film 93 and which has sustained the process damage is permitted to restore its process damage owing to the post oxidation which is additional oxidation. Thus, the film quality of the silicon oxide film 92 can be improved so that the insulation resistance of the silicon oxide film 92 is improved.
The foregoing post oxidation process attains a similar effect when an overetching structure as shown in
As described above, employment of the post oxidation process enables a dielectric failure caused from enhancement of electric fields at the lower edge of the polycrystalline silicon film 93 to be avoided.
As a conventional method for converting a silicon nitride film into silicon oxide film, a thermal oxidation method using steam or oxygen (O2) gas as an oxidizer, or a plasma oxidation method using oxygen gas or ozone gas as a source and arranged to be performed in a plasma atmosphere is known.
The foregoing method has the following problems. When the thermal oxidation method is employed, a great thermal budget is required to be performed at high temperatures for a long time. When the surface of a silicon nitride film formed by an LPCVD method is formed into silicon oxide film having a thickness of 5 nm, great thermal budget must be performed at 950° C. for about one hour even when a steam oxidation method exhibiting a high oxidation rate is employed.
When the thermal budget is too great, dopant in the silicon substrate encounters thermal diffusion. Thus, the concentration profile of the dopant is undesirably changed. Therefore, the thermal oxidation method cannot easily be applied to a process for treating small devices.
When the plasma oxidation method is employed, the body which must be processed is exposed to plasma. Therefore, for example, the gate insulating film sustains plasma damage. The foregoing plasma damage causes deterioration in the reliability of the insulating film and undesirably change in the characteristics of the device.
The conventional techniques and their problems will now be described.
Then, as shown in
Then, as shown in
Then, as shown in
Finally, as shown in
The foregoing conventional method requires the film thickness of the resist which is applied in the step shown in
Therefore, the shape of the resist pattern 105 easily disperses. As a result, there arises a problem in that the shape of the gate electrode 103 dispersed. Another problem arises in that the resist pattern 105 falls.
As an alternative to reduction in the width of the resist pattern 105, a technique is known with which the width of the SiN pattern film 104 is reduced. That is, the conventional method has the arrangement that the SiN pattern 104 having the minimum width which can be realized by the lithography technique is formed, and then the oxidation process is performed to reduce the SiN pattern 104.
However, the width of the SiN pattern 104 cannot easily be reduced to a required width. When the steam oxidation method exhibiting a high oxidation rate is employed, thermal budget at 950° C. for one or more hours must be performed to reduce the width of the SiN pattern 104 by 10 nm. When the foregoing high-temperature and long oxidation process is performed, there arises a problem in that the concentration profile of the dopant in the silicon substrate 101 is considerably changed.
An object of the present invention is to provide a semiconductor device which is capable of preventing dielectric failure from occurring at the edge of a conductive film of a structure in which the conductive film including silicon patterned on an insulating film containing silicon and nitrogen is formed and a manufacturing method therefor.
A semiconductor device according to the present invention comprises: a semiconductor substrate having a main plane which has a first region and a second region having the surface which is lower than the surface of the first region such that the first region and the second region are connected to each other; a first insulating film formed on the first region and containing silicon, nitrogen and oxygen; a conductive film formed on the first insulating film and containing silicon; and a second insulating film formed on the second region, containing silicon and oxygen and arranged to be in contact with the conductive film and the first insulating film.
A method of manufacturing a semiconductor device according to the present invention comprises the steps of: forming an insulating film containing silicon and nitrogen on a semiconductor substrate; forming a film which must be processed and which contains silicon on the insulating film; processing the film which must be processed to cause a portion of the insulating film to expose to the outside; and subjecting a semiconductor structure obtained owing to the steps to an oxidation process using an oxidizing gas containing either of ozone or oxygen radicals.
A method of manufacturing a semiconductor device according to the present invention comprises the steps of: forming an insulating film containing silicon and nitrogen on a semiconductor substrate; forming a film which must be processed and which contains silicon on the insulating film; processing the film which must be processed to cause a portion of the insulating film to expose to the outside; subjecting a semiconductor structure obtained owing to the steps to an oxidation process using an oxidizing gas containing either of ozone or oxygen radicals; and subjecting the semiconductor structure subjected to the oxidation process to at least either of a nitridation process or an additional oxidation process.
The inventors of the present invention has found a fact as a result of studies. That is, when an insulating film containing nitrogen and silicon is oxidized in an atmosphere containing ozone or oxygen radicals, oxidation proceeds while desorption of nitrogen in the insulating film is being performed. Thus, the thickness is enlarged.
Then, the foregoing sample was used to perform two types of oxidation experiments. One of the experiments was performed such that the sample was introduced into a vertical batch oxidizing furnace. Then, oxygen gas was introduced into the vertical batch oxidizing furnace to subject the sample to an oxidation process. The oxidation process was performed at 900° C. for 30 minutes under 13 kPa. Another experiment was performed such that the sample was introduced into the vertical batch oxidizing furnace. Then, mixed gas of ozone and oxygen (ozone was 5%) was introduced into the vertical batch oxidizing furnace so as to subject the sample to the oxidation process. The oxidation process was performed at 900° C., for 30 minutes under 130 Pa.
The samples subjected to the foregoing oxidation processes were examined such that the concentration profile of nitrogen and that of oxygen in the silicon oxinitride film were SIMS-analyzed (the SIMS analysis was performed after the oxidation process has been performed and a polycrystalline silicon film having a thickness of 10 nm was formed on the silicon oxinitride).
As can be understood from the drawings, the oxidation process using ozone permits nitrogen in the surface of the silicon oxinitride film to easily be desorbed as compared with the oxidation process which does not use ozone. Thus, the thickness of the silicon oxinitride film can considerably be enlarged owing to proceeding of the oxidation.
When nitrous oxide (N2O) or nitrogen monoxide (NO) is used to introduce nitrogen into the silicon oxide film instead of ammonia, the concentration of nitrogen in the silicon oxide film is raised at the interface with the silicon substrate. Also in the foregoing case, oxidation in an atmosphere containing ozone results in considerable reduction in the concentration of nitrogen in the silicon oxinitride film adjacent to the substrate. Thus, the thickness can considerably be enlarged owing to proceeding of the oxidation.
Even when the sample incorporating silicon wafer having a surface on which silicon nitride film is formed instead of the silicon oxinitride film, oxidation in the atmosphere containing ozone results in considerable desorption of nitrogen in the surface portion of the silicon nitride film. As a result, oxidation processes in the surface of the silicon nitride film proceed. Thus, the surface of the silicon nitride film is converted into silicon oxide film.
As a results of the experiments, the nitrogen desorption phenomenon in the silicon oxinitride film occurs in the foregoing oxidation method when the ratio [N]/([O]+[N]) of nitrogen in the film is higher than 0% and not higher than 100%.
The foregoing phenomenon as well as occurs when oxidation is performed in an atmosphere containing oxygen radicals.
The oxygen radicals may be generated in an oxidizing furnace similarly to the plasma oxidizing method or generated on the outside of the oxidizing furnace similarly to a remote plasma oxidizing method so as to be introduced into the oxidizing furnace. Alternatively, the oxygen radicals may be generated on the surface of the sample. Oxygen radicals are generated on the surface of the sample by a method with which oxygen gas and hydrogen gas are introduced into the oxidizing furnace. Then, the surface of the sample is heated to dessociate the oxygen gas at the surface of the sample to generate the oxygen radicals.
It has been reported that main species in the ozone oxidizing process are oxygen radicals generated due to desociation of ozone. Therefore, the similar phenomenon occurs with ozone oxidation and oxidation with oxygen radicals.
Therefore, when oxidation is performed in the atmosphere containing ozone or oxygen radicals having the above-mentioned effect as the present invention, oxidation sufficiently proceeds at the edge of the conductive film in the structure having the conductive film containing patterned silicon and formed on the insulating film containing silicon and nitrogen. As a result, the round shape which is effective to moderate the electric field can be formed. As a result, dielectric failure can effectively be prevented.
Oxidation proceeds quickly in the surface (the second region) of the substrate below the portion of the insulating film which is not covered with the conductive film as compared with the surface (the first region) of the surface below a portion of the insulating film covered with the conductive film. Therefore, the second region is lowered as compared with the first region.
Another object of the present invention is to provide a method of manufacturing a semiconductor device which is capable of forming a pattern composed of a silicon nitride film superior to the performance of the lithography such that only a small thermal budget is required and free from any plasma damage.
To achieve the foregoing object, a method of manufacturing a semiconductor device according to the present invention comprises the steps of: forming an insulating film containing a silicon nitride film on a film including a silicon film and arranged to be processed; processing the insulating film by using lithography and etching to form a pattern composed of the insulating film; subjecting the pattern in an atmosphere containing either of oxygen radicals or ozone to convert the exposed surface of the silicon nitride film into a silicon oxide film; fining the pattern by removing the silicon oxide film; and processing the film arranged to be processed by transferring the fined pattern to the film arranged to be processed.
As a result of study performed by the inventors of the present invention, a process of oxidizing the silicon nitride film in the atmosphere containing oxygen radicals or ozone enables the surface of the silicon nitride film to easily be converted into the silicon oxide film at a temperature of 850° C. or lower. When the conditions are adjusted, the conversion can be realized at 800° C. or lower.
The semiconductor structure was formed as follows. That is, the silicon nitride film and a TEOS oxide film are sequentially formed on the silicon substrate. Then, the TEOS oxide film, the silicon nitride film and the silicon substrate were etched to form projections. Then, phosphoric acid was used to fine the TEOS oxide film and the silicon nitride film so that the semiconductor structure was formed. In the drawing, the projections of the silicon substrate, the silicon nitride film and the TEOS oxide film are formed upwards.
The oxidation method using dry oxygen (10%) as the oxidizing species was performed such that the oxidizing temperature was 1000° C. and the oxidizing duration was 69 minutes. In the foregoing case, the thickness of the silicon oxide film formed on the surface of the silicon substrate was 15 nm. The oxidizing method using ozone (partial pressure was 133.322 Pa=1 Torr) as the oxidizing species was performed such that the oxidizing temperature was 850° C. and the oxidizing duration was 240 minutes. In the foregoing case, the thickness of the silicon oxide film formed on the surface of the silicon substrate was 11 nm.
As can be understood from
Therefore, the present invention using the oxidizing atmosphere containing ozone or oxygen radicals can convert the surface of the silicon nitride film into the silicon oxide film such that only a small thermal budget is required and any plasma damage does not occur. Therefore, when the silicon oxide film is removed, a pattern (a SiN pattern) composed of the silicon nitride film exceeding the performance of the lithography can be formed.
When the SiN pattern is employed as the etching mask for the polycrystalline silicon film, the etching rate of the SiN pattern can sufficiently be lowered as that for the polycrystalline silicon film. Therefore, only a small thickness is required for the SiN pattern. As a result, dispersion of the shape of the SiN pattern can sufficiently be reduced.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.
Problems detected by the inventors of the present invention which are motivation of the present invention will now be described prior to describing embodiments of the present invention. The foregoing problem arises when silicon oxinitride film or silicon nitride film is employed instead of the silicon oxide film 92 shown in
The silicon oxinitride film 95 present below a polycrystalline silicon film 93 prevents supply of an oxidizer to the lower edge of the polycrystalline silicon film 93. Therefore, the lower edge of the polycrystalline silicon film 93 owing to the post oxidation becomes insufficient.
When the concentration of nitrogen in the silicon oxinitride film 95 is high, and in particular when the concentration of nitrogen in the silicon oxinitride film 95 adjacent to the polycrystalline silicon film 93 is high, oxidation of the lower edge of the polycrystalline silicon film 93 does not proceed. Therefore, the lower edge of the polycrystalline silicon film 93 is undesirably sharpened as compared with the shape realized before the post oxidation (see
The foregoing problem becomes critical when the concentration of nitrogen in the silicon oxinitride film 95 is 5×1013c−2m or higher in the interface with the polycrystalline silicon film 93 or the ratio of nitrogen [N]/([O]+[N]) in the silicon oxinitride film 95 adjacent to the polycrystalline silicon film 93 is 1% or higher.
The silicon oxinitride film 95 present on the silicon substrate 91 prevents supply of the oxidizer to the surface of the silicon substrate 91. Therefore, bird's beak oxidation owing to the post oxidation becomes insufficient.
When the concentration of nitrogen in the silicon oxinitride film 95 is high, and in particular when the concentration of nitrogen in the silicon oxinitride film 95 adjacent to the silicon substrate 91 is high, the bird's beak oxidation does not proceed. Therefore, the distance between the lower edge of the polycrystalline silicon film 93 and the silicon substrate 91 cannot be elongated (
The foregoing problem becomes critical when the concentration of nitrogen in the silicon oxinitride film 95 is 5×1013 cm−2 or higher in the interface with the silicon substrate 93 or the ratio of nitrogen [N]/([O]+[N]) in the silicon oxinitride film 95 adjacent to the silicon substrate 93 is 1% or higher.
When nitrogen is contained in the surface portion of the silicon oxinitride film 95 exposed after the polycrystalline silicon film 93 has been processed, supply of the oxidizer into the silicon oxinitride film 95 is prevented. Therefore, improvement in the quality of the film owing to recovery of the process damage becomes insufficient (
The foregoing problem also arises with an overetching structure as shown in
As shown in
Then, as shown in
The introduction of the dopant may be performed by the thermal diffusion method. As the dopant, a donor, such as phosphorous (P) or arsenic (As) may be employed. Reference numeral 2′ shown in the drawing is given to describe a third embodiment with reference to
Then, as shown in
Then, as shown in
Then, while introducing mixed gas of ozone and oxygen (ozone was 5%) into the vertical batch oxidizing furnace, heat treatment is performed at 900° C., for 10 minutes at 130 Pa. Thus, the surface (the side and upper surfaces) of the gate electrode 3 and the exposed surface of the silicon oxinitride film (the gate insulating film) 2 are oxidized so that a post oxidation film 5 is formed as shown in
The thickness of the post oxidation film 5 is about 5 nm at the side wall of the gate electrode 3. To improve the desociation efficiency of nitrogen in the silicon oxinitride film 2, to enlarge the radius of curvature of the lower edge of the gate electrode 3 and permit quick recovery of the defect of the silicon oxinitride film 2, it is preferable that the oxidizing temperature in the post oxidation step is a high temperature not lower than 900° C.
It is preferable that the oxidizing pressure is a low pressure not higher than 1 kPa to prevent deactivation of ozone in the atmosphere. The post oxidation step may be performed after the source/drain region 6 has been formed next.
Finally, as shown in
As a result, the shape of the lower edge of the gate electrode 3 can sufficiently be rounded. Moreover, the distance from the lower edge of the gate electrode 3 to the source/drain region 6 can be elongated. Thus, the electric field at the lower edge of the gate electrode 3 and the source/drain region 6 can be moderated. As a result, insulation resistance of the device can be improved.
In the step shown in
The desociation of nitrogen in the silicon oxinitride film (the gate insulating film) 2 adjacent to the lower edge of the gate electrode 3 owing to the oxidation using ozone or the oxygen radicals is sometimes undesirable. That is, sometimes, there is apprehension that the durability of the carrier deteriorates owing to the desociation of nitrogen, that the resistance against high electric field stress deteriorates or that performance for preventing dispersion of dopant such as boron deteriorates. In the foregoing case, a usual nitrogen introducing process is added which is, for example, heat treatment which is performed in a nitrogen gas atmosphere such as nitrogen monoxide after the post oxidation. Thus, nitrogen can be introduced into the silicon oxinitride film (the gate insulating film) 2 adjacent to the lower edge of the gate electrode 3, as shown in
In the step shown in
In a case where the thermal oxide film is subjected to heat treatment which is performed in an ammonia (NH3) atmosphere, nitrogen in the silicon oxinitride film forms a high-concentration layer at the interface with the substrate and that with the gate electrode. Also in the foregoing case, a similar effect can be obtained.
As shown in
Then, as shown in
Then, as shown in
Then, a resist pattern (not shown) is used as a mask to pattern the conductive film 15, the insulating film 14 between electrodes and the polycrystalline silicon film 13 by performing dry etching, as shown in
Then, the silicon substrate is introduced into a remote plasma oxidizing furnace, and then heat treatment is performed at 900° C., for 10 minutes at 130 Pa while introducing oxygen radicals into the furnace. Thus, as shown in
The thickness of the post oxidation film 16 is about 10 nm at the side wall portion of the polycrystalline silicon film (the floating gate electrode) 13. To improve the desociation efficiency of nitrogen in the silicon oxinitride film (the tunnel insulating film) 12, to enlarge the radius of curvature of the lower edge of the floating gate electrode 13 and permit quick recovery of the defect of the tunnel insulating film 12, it is preferable that the oxidizing temperature in the post oxidation step is a high temperature not lower than 900° C.
In a case where the control gate electrode 15 is not a doped silicon film (a low-resistance semiconductor film) and it is a conductive film such as a metal film or a metal silicide film, oxidation of the control gate electrode 15 is not required. In the foregoing case, it is preferable that the post oxidation is performed after the exposed surface of the conductive film is covered with a film, such as a silicon nitride film having a barrier characteristic against the oxidizer.
Then, as shown in
When the nitrogen composition ratio [N]/([O]+[N]) in the silicon oxinitride film 12 adjacent to the floating gate electrode 13 and the silicon substrate 11 is 1% or higher, post oxidation which is performed in the oxygen gas atmosphere (the conventional method) undesirably results in a shape as shown in
As a result, enlargement of the curvature of the lower edge of the floating gate electrode 13 and proceeding of the bird's beak oxidation of the silicon substrate 11 moderate the electric field at the lower edge of the floating gate electrode 13 and that in the source/drain region 17. Moreover, the process damage in the silicon oxinitride film 12 adjacent to the lower edge of the floating gate electrode 13 can be recovered. Thus, the resistance against insulation can be improved.
In the step shown in
When desociation of nitrogen in the silicon oxinitride film (the tunnel insulating film) 12 adjacent to the lower edge of the floating gate electrode 13 owing to the post oxidation using ozone or the oxygen radicals is not required, a usual nitrogen introducing process, such as heat treatment in a nitriding gas atmosphere, such as nitrogen monoxide, may be added after the post oxidation to introduce nitrogen.
As compared with a case shown in
As a result, the electric field at the lower edge of the floating gate electrode 13 and that in the source/drain region 17 are moderated sufficiently. Moreover, the process damage in a portion adjacent to the reverse side (adjacent to the interface with the substrate) and the obverse side can be restored. As a result, resistance against insulation can be improved. Also in a case where a silicon nitride film is employed as the tunnel insulating film, a similar effect can be obtained.
A method of manufacturing a MOS transistor according to the third embodiment will now be described. In this embodiment, a silicon nitride film is employed as the gate insulating film. Since cross sectional views showing steps of the manufacturing method according to this embodiment are the same as those according to the first embodiment, description will now be made with reference to
As shown in
Then, an LPCVD using monosilane as a source is employed to form an undoped polycrystalline silicon film having a thickness of 150 nm on the silicon nitride film 2′. Then, boron (B) ions are, as the dopant, implanted into the undoped polycrystalline silicon film. Thus, as shown in
The introduction of the dopant may be performed by the thermal diffusion method. The dopant may be a donor, such as phosphorous (P) or arsenic (As). The introduction of the dopant may be performed simultaneously with the film formation or after the post oxidation (after the polycrystalline silicon film 3 has been processed).
Then, as shown in
Then as shown in
Then, the silicon substrate 1 is introduced into a lamp heating system oxidizing furnace. Then, while introducing mixed gas of oxygen and hydrogen (oxygen is 50%) into the furnace, heat treatment is performed at 900° C., for 10 seconds at 650 Pa. Thus, as shown in
The thickness of the post oxidation film 5 is 4 nm on the silicon substrate 1 and about 5 nm on the side wall of the gate electrode 3. It is preferable that the oxidizing temperature in the post oxidation step is a high temperature not lower than 900° C. to improve the desociating efficiency of nitrogen in the silicon oxinitride film 2, enlarge the radius of curvature of the lower edge of the gate electrode 3 and quickly recover the defect of the silicon nitride film 2′.
It is preferable that the oxidizing pressure is a low pressure of 1 kPa or lower to prevent deactivation of ozone in the atmosphere owing to the reactions between oxygen and hydrogen. Note that the post oxidation may be performed after the source/drain region 6 has been formed.
Finally, as shown in
Then, oxidation of the gate insulating film (the silicon nitride film) 2′ is continued so that the finished shape of the lower portion of the gate electrode 3 is such that the bird's beaks are formed considerably as compared with the shape (the shape shown in
As a result, the shape of the lower edge of the gate electrode 3 can sufficiently be rounded. Moreover, the distance from the lower edge of the gate electrode 3 to the source/drain region 6 can be elongated. Hence it follows that the electric field at the lower edge of the gate electrode 3 and that in the source/drain region 6 can be moderated. As a result, the resistance of the device against insulation can be improved.
In the step shown in
When desociation of nitrogen in the silicon nitride film (the gate insulating film) 2′ adjacent to the lower edge of the gate electrode 3 owing to the post oxidation is not required, a usual nitrogen introduction process, such as heat treatment in a nitriding gas atmosphere, such as nitrogen monoxide, is added to be performed after the post oxidation. Thus, nitrogen can be introduced into the silicon nitride film (the gate insulating film) 2′ adjacent to the lower edge of the gate electrode 3.
As compared with the conventional technique with which the post oxidation (
In this embodiment, the silicon nitride film (the gate insulating film) 2′ exposed owing to dry etching is completely oxidized. Then, oxidation is continued. When only the surface of the exposed portion of the silicon nitride film (the gate insulating film) 2′ is converted into the oxide film as shown in
As compared with the conventional technique with which the post oxidation is performed in the oxygen gas atmosphere (
The silicon nitride film (the gate insulating film) 2′ according to this embodiment is formed by the LPCVD method using monosilane and ammonia as the sources. Another method may be employed which is, for example, a plasma nitriding method or a JVD (Jet Vapor Deposition) method to obtain a similar effect. Another element except for silicon and nitrogen may be contained in the silicon nitride film (the gate insulating film) 2′. When a film mainly composed of silicon and nitrogen is used, a similar effect can be obtained.
As shown in
Then, as shown in
Then, as shown in
Then, the gate resist pattern is removed, and then the silicon substrate 21 is introduced into a vertical batch oxidizing furnace. While introducing mixed gas of ozone and oxygen (ozone is 10%) into the furnace, an oxidation process is performed at 850° C. for 2 hours at 100 Pa. Thus, as shown in
The oxidizing reaction of the silicon nitride film proceeds while nitrogen in the film is being desociated. Therefore, the position of the surface of the SiN pattern 24 and that of the silicon oxide film 25 are substantially the same. As a result, the width of the SiN pattern 24 is 80 nm in the upper portion. As a result, the SiN pattern 24 having a small size exceeding the performance of the lithography can be obtained. Note that the lower portion of the SiN pattern 24 encounters reduction in the oxidizing rate due to insufficient supply of the oxidizer. Therefore, the width of the lower portion of the SiN pattern 24 is 85 nm.
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, a conventional technique is employed to form an interlayer insulating film and electric wirings. Thus, a small-size MOS transistor having a gate electrode width of 85 nm is manufactured.
In this embodiment, the SiN pattern 24 composed of the silicon nitride film which permits an etching selection ratio with respect to the polycrystalline silicon film 23 is employed as the mask when the polycrystalline silicon film 23 is etched. Therefore, the aspect ratio of the SiN pattern 24 is not raised. Hence it follows that dispersion of the finished shape of the gate electrode 23 can considerably be prevented. Moreover, the problem of falling of the SiN pattern 24 can be prevented.
Since the oxidation of the SiN pattern 24 is performed in the ozone atmosphere, the thermal budget can considerably be reduced. As a result, the problem of change in the concentration profile of boron in the silicon substrate 21 can be prevented.
As distinct from the plasma oxidation, the oxidation in the ozone atmosphere enables the silicon oxinitride film (the gate oxinitride film) 22 to be free from any plasma damage. Therefore, deterioration in the reliability of the silicon oxinitride film 22 and change in the characteristics of the MOS transistor can be prevented.
The foregoing effects can be obtained also in a case where the oxidation is performed in the oxygen radical atmosphere as well as the oxidation in the ozone atmosphere. When change in the characteristics of the MOS transistor owing to the plasma damage is permitted, the plasma oxidation method in the oxygen or ozone atmosphere may simultaneously be employed.
The manufacturing method according to the fourth embodiment has the step for oxidizing the film which is formed into the gate electrode. Therefore, the foregoing manufacturing method cannot be applied to a case where a conductive film, such as a tungsten film, which causes an abnormal oxidation is employed as the overall body or a portion of the gate electrode. In this embodiment, a method of manufacturing a small-size MOS transistor will now be described in a case that the foregoing conductive film is employed.
As shown in
Then, as shown in
Then, as shown in
Then, while introducing oxygen radicals into the remote plasma oxidizing furnace, heat treatment is performed at 900° C. for 10 minutes at 100 Pa. Thus, as shown in
The oxidizing reaction of the silicon nitride film proceeds such that nitrogen is desociated. Therefore, the position of the surface of the silicon nitride film 45 and that of the silicon oxide film 46 are substantially the same. As a result, the width of the silicon nitride film 45 realized after the silicon oxide film 46 has been formed is 80 nm in the upper portion. Thus, a gate electrode pattern having a small size exceeding the performance of the lithography can be obtained. The thickness of the silicon nitride film 45 in the region except for the gate electrode pattern is 40 nm.
Then, as shown in
Then, as shown in
Then, a method similar to that according to the fourth embodiment is employed to form the post oxidation film, the side wall spacer, the extension region and the source/drain region. Thus, the small-size MOS transistor having the polycide structure incorporating the tungsten film which is the metal film and having the gate electrode width of 85 nm can be manufactured.
According to this embodiment, the tungsten film 44 is covered with the silicon nitride film 45 in the step (
The manufacturing methods according to the fourth and fifth embodiments have the structure that the gate electrode having a width larger than the minimum width of the SiN pattern is formed owing to the shape of the SiN pattern. In this embodiment, a method of manufacturing a small-size MOS transistor exceeding the performance of the lithography and overcoming the foregoing problem will now be described.
As shown in
The channel doping step is performed such that boron ions serving as the dopant are introduced into the surface of the substrate by the ion implanting method at 150 keV and 3×1019 cm−2. Then, annealing is performed to activate the dopant at 1050° C. for 20 seconds. The introduction of the dopant to reduce the resistance of the polycrystalline silicon film 53 may be performed simultaneously with formation of the polycrystalline silicon film 53, after the polycrystalline silicon film 53 has been formed and before the polycrystalline silicon film 53 is processed or after the post oxidation (after the polycrystalline silicon film 53 has been processed) has been performed.
Then, as shown in
Then, as shown in
Then, while introducing mixed gas of ozone and oxygen (ozone is 10%) into the vertical batch oxidizing furnace, heat treatment is processed at 850° C. for 2 hours at 100 Pa. Thus, as shown in
The oxidizing reaction of the silicon nitride film proceeds such that nitrogen is desociate. Therefore, the position of the surface of the SiN pattern 55 and that of the silicon oxide film 56 are substantially the same. As a result, the width of the SiN pattern 55 is 80 nm. Thus, the SiN pattern 55 having a small size exceeding the performance of the lithography can be obtained. Moreover, the lower portion of the SiN pattern 55 is formed by the SiO2 pattern 55 composed of the silicon oxide film exhibiting a high diffusion rate of the oxidizer. Therefore, the lower portion is formed into a rounded shape.
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, a conventional technique is employed to form the interlayer insulating film and wirings. Thus, a MOS transistor having a gate electrode width of 85 nm is manufactured.
In this embodiment, the mask for processing the gate electrode is a laminated film of the silicon oxide film 54 (the lower portion)/the silicon nitride film 55 (the upper portion). The silicon oxide film 54 exhibits high diffusion rate of the oxidizer as compared with the silicon nitride film 55. Therefore, enlargement of the lower portion of the mask for processing the gate electrode occurring in the oxidizing step (
Since the cobalt silicide film 63 formed on the gate electrode 53 has a large surface area, the resistance of the gate electrode 53 can effectively be lowered. Thus, a high-speed operation of the MOS transistor can be realized. Moreover, a fact has been confirmed that the MOS transistor according to this embodiment attains a similar effect obtainable from the fourth embodiment.
As shown in
Then, as shown in
The foregoing step for filling the trench is performed by depositing the silicon oxide film 74 by the CVD method and by removing unnecessary silicon oxide film 74 on the outside of the trench by a CMP (Chemical Mechanical Polishing process) method. Since the unnecessary silicon oxide film 74 is removed by the CMP method, flattening of the surface can substantially and easily be performed.
Then, as shown in
The SiN pattern 76 is formed by forming a gate resist pattern (not shown) having minimum width and intervals (100 nm) on the silicon nitride film and by etching the silicon nitride film by the RIE method such that the gate resist pattern is used as a mask. The silicon nitride film is formed by the CVD method.
While introducing mixed gas of ozone and oxygen (ozone is 10%) into the vertical batch oxidizing furnace, heat treatment is performed at 850° C. for 2 hours at 100 Pa. Thus, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
In this embodiment, the mask for use when the phosphorus-doped polycrystalline silicon film 75 is etched is the SiO2 patterns 77 and 78 which permits an etching selection ratio with respect to the phosphorus-doped polycrystalline silicon film 75. Therefore, a necessity for raising the aspect ratio of each of the SiO2 patterns 77 and 78 can be eliminated. Therefore, dispersion of the shape of the finished floating gate electrode can considerably be prevented. Moreover, the problem that the SiO2 patterns 77 and 78 fall can be prevented.
In this embodiment, the interval of the SiO2 patterns 77 and 78 is shorter than the width of the SiN pattern 76. Therefore, the interval of the SiO2 patterns 77 and 78 can be reduced exceeding the performance of the lithography.
Since the oxidation of the SiN pattern 76 is performed in the ozone atmosphere, the thermal budget can considerably be reduced. Thus, change in the concentration profile of the dopant introduced into the silicon substrate 71 and deterioration in the reliability of the tunnel oxinitride film 72 dose not raise a problem.
Since the plasma oxidation is not employed, the tunnel oxinitride film 72 is free from any process damage. Therefore, the characteristics of the memory cell are not changed.
The foregoing effects can be obtained from oxidation in an oxygen radical atmosphere as well as the oxidation in the ozone atmosphere. When change in the characteristics of the memory cell caused from the process damage is permitted, a plasma oxidation method in an oxygen atmosphere or an ozone atmosphere can be employed.
Additional advantages and modification will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 11-121689 | Apr 1999 | JP | national |
| 2000-122018 | Apr 2000 | JP | national |
This is a continuation of application Ser. No. 09/559,757, filed Apr. 27, 2000 now U.S. Pat. No. 7,303,946, which is incorporated in its entirety herein by reference. This application is also based upon and claims the benefit of priority from prior Japanese Patent Applications No. 11-121689, filed Apr. 28, 1999; and No. 2000-122018, filed Apr. 24, 2000, the entire contents of which are incorporated herein by reference.
| Number | Name | Date | Kind |
|---|---|---|---|
| 4398992 | Fang et al. | Aug 1983 | A |
| 4435446 | Marston et al. | Mar 1984 | A |
| 5330935 | Dobuzinsky et al. | Jul 1994 | A |
| 5412246 | Dobuzinsky et al. | May 1995 | A |
| 5602048 | Komori et al. | Feb 1997 | A |
| 5620910 | Teramoto | Apr 1997 | A |
| 5646054 | Rhee | Jul 1997 | A |
| 5693578 | Nakanishi et al. | Dec 1997 | A |
| 5693974 | Hsu et al. | Dec 1997 | A |
| 5880498 | Kinoshita et al. | Mar 1999 | A |
| 5907183 | Takeuchi | May 1999 | A |
| 5917221 | Takemura | Jun 1999 | A |
| 5959329 | Tomita et al. | Sep 1999 | A |
| 6251763 | Inumiya | Jun 2001 | B1 |
| 6414352 | Hisamune | Jul 2002 | B2 |
| 6707120 | Aminzadeh et al. | Mar 2004 | B1 |
| Number | Date | Country |
|---|---|---|
| 2-303022 | Dec 1990 | JP |
| 7-169964 | Jul 1995 | JP |
| 07-183513 | Jul 1995 | JP |
| 08-250720 | Sep 1996 | JP |
| 09-148543 | Jun 1997 | JP |
| 10-32328 | Feb 1998 | JP |
| 10-163197 | Jun 1998 | JP |
| 10-223771 | Oct 1998 | JP |
| Number | Date | Country | |
|---|---|---|---|
| 20070218606 A1 | Sep 2007 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 09559757 | Apr 2000 | US |
| Child | 11790064 | US |
