The strong growth in demand for portable consumer electronics is driving the need for high-capacity storage devices. Non-volatile semiconductor memory devices, such as flash memory storage cards, are widely used to meet the ever-growing demands on digital information storage and exchange. Their portability, versatility and rugged design, along with their high reliability and large capacity, have made such memory devices ideal for use in a wide variety of electronic devices, including for example digital cameras, digital music players, video game consoles, cellular telephones and SSDs (Solid State Drives).
Semiconductor memory may be provided within a semiconductor package, which protects the semiconductor memory and enables communication between the memory and a host device. Examples of semiconductor packages include system-in-a-package (SiP) or multichip modules (MCM), where a plurality of dies are mounted and interconnected on a small footprint substrate.
Semiconductor dies are typically batch processed together in a semiconductor wafer. Once the integrated circuits have been defined on the individual dies, the semiconductor wafer is thinned, typically with a grinding wheel in a so-called backgrind process. While the grinding process is highly controlled, slight variations in the thicknesses of the dies in the wafer occur across the wafer owing to tolerances in the backgrind process. These slight thickness variations can affect die performance. For example, dies having a silicon substrate layer which becomes too thin can have electrical performance issues, including premature degradation in the ability to erase stored data, as well as the leakage of the applied power supply current. A single such die in a die stack can impair performance of the entire package and adversely effect package yields.
It is also important to closely control the overall height of a die stack within a package. Even slight variations in die thickness can compound to significant variations in the overall die stack height, especially in modern day packages having many stacked dies.
The present technology will now be described with reference to the figures, which in embodiments, relate to a semiconductor device, and method of forming same, including a die stack having dies selected into the stack based on their thicknesses. After the dies are formed on the wafer and thinned, a metrology tool is used to determine the thicknesses of the dies in the wafer. These thicknesses are stored in a known thickness die (KTD) map, along with other information such as their standard and average deviations and their classification into a binning class.
After dicing from the wafer, dies may be selected into a die stack of a semiconductor device based on their thickness. In one embodiment, dies which have been classified into bin 1 (having an optimal thickness) are selected to provide a high capacity highly reliable semiconductor device. In a further embodiment, dies of different bins are mixed and matched to provide a uniform, highly controlled overall die stack height.
It is understood that the present invention may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the invention to those skilled in the art. Indeed, the invention is intended to cover alternatives, modifications and equivalents of these embodiments, which are included within the scope and spirit of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be clear to those of ordinary skill in the art that the present invention may be practiced without such specific details.
The terms “top” and “bottom,” “upper” and “lower” and “vertical” and “horizontal,” and forms thereof, as may be used herein are by way of example and illustrative purposes only, and are not meant to limit the description of the technology inasmuch as the referenced item can be exchanged in position and orientation. Also, as used herein, the terms “substantially” and/or “about” mean that the specified dimension or parameter may be varied within an acceptable manufacturing tolerance for a given application. In one embodiment, the acceptable manufacturing tolerance is ±1.5 mm, or alternatively, ±2.5% of a given dimension.
For purposes of this disclosure, a connection may be a direct connection or an indirect connection (e.g., via one or more other parts). In some cases, when a first element is referred to as being connected, affixed, mounted or coupled to a second element, the first and second elements may be directly connected, affixed, mounted or coupled to each other or indirectly connected, affixed, mounted or coupled to each other. When a first element is referred to as being directly connected, affixed, mounted or coupled to a second element, then there are no intervening elements between the first and second elements (other than possibly an adhesive or melted metal used to connect, affix, mount or couple the first and second elements).
An embodiment of the present technology will now be explained with reference to the flowchart of
In step 204, the semiconductor wafer 100 may be cut from an ingot and polished on both the first major surface 102 (
As shown in
The number of semiconductor dies 106 shown on wafer 100 in
After formation of the integrated circuits of each semiconductor die, a layer of tape may be laminated onto the major surface 102 in step 210. The wafer 100 may then be turned over, and diced in step 212. Embodiments of the present technology dice the wafer 100 using a stealth dicing before grind (SDBG) step, as shown in
The laser may be moved along scribe lines 132 in a plane of the wafer and activated at a number of points so that a number of closely situated pinpoint holes 130 are formed at an intermediate depth of the wafer (between the first and second major surfaces 102, 104 of the wafer). The rows and columns of pinpoint holes 130 define the eventual shape and outline of each semiconductor die 106 to be diced from wafer 100 as indicated in
After the stealth lasing step 212, the wafer 100 may be completely diced, or one or more semiconductor die 106 still be affixed together. The wafer may then be thinned in step 214 using a grinding wheel 140 (
While
After completion of the backgrind step 214, a layer of die attach film (DAF) adhered to a flexible dicing tape may be applied to the second major surface 104 of the wafer 100 in step 216. The wafer 100 may then be turned over and supported on a chuck or other support surface, and the lamination tape on the first major surface 102 of the wafer 100 may be removed in step 218.
As noted in the Background section, owing to tolerances in the operation of the backgrind wheel 140, the thicknesses of dies 106 across the wafer 100 may vary. As one example, the thicknesses of the silicon substrate layer on which the integrated circuit layer is formed may vary as much as 4 μm to 5 μm (or more) from die to die, and the overall thicknesses of the dies 106 may vary as much as 4 μm to 5 μm (or more) from die to die. In accordance with aspects of the present technology, a known thickness die (KTD) map of the wafer 100 may be generated in step 220 with data of die thicknesses, and the KTD map may then be used when selecting dies 106 from the wafer 100 for pick and place into a die stack as explained below.
Step 220 of generating a KTD map begins with measuring die thicknesses across wafer 100 using a wafer thickness metrology tool 150 (shown schematically in
In
The computer 152 may store both the thickness of the silicon substrate layers and the binning classification. The computer 152 may also determine and store additional data relating to the silicon substrate layer thickness of dies 106 across wafer 100, including the average and standard deviations of the silicon substrate layer thicknesses of the dies 106 on wafer 100.
The KTD maps of
In the embodiments described above, the metrology tool measures the thickness of the silicon substrate layer and generates the KTD map in step 220 after the wafer has been flipped over and supported with the DAF layer and dicing tape facing the chuck in steps 216 and 218. In further embodiments, the metrology tool may measure the thickness of the silicon substrate layer and generate the KTD map 160 before the DAF layer and dicing tape are applied. So the KTD map can be created by the metrology tool after the DAF mount process, or created just after the wafer 100 is thinned.
After the KTD map 160 is generated and the wafer is supported with the flexible dicing tape facing the support chuck, the flexible dicing tape may be stretched along orthogonal axes to separate the individual semiconductor dies 106 in step 222 to allow the individual semiconductor dies 106 to be removed by a pick and place robot for inclusion in a semiconductor device. It is conceivable that the dies 106 are not fully diced at completion of the backgrind step 214. In this event, stretching of the dicing tape in step 222 will complete dicing of the semiconductor dies along the SDBG separation lines 114.
In accordance with aspects of the present technology, dies 106 may be selected by the pick and place robot and stacked on a substrate in a die stack based on their measured thicknesses and/or binning category, as shown in the KTD maps of
In a further aspect of the present technology, instead of picking dies into a die stack based on their bin classification, dies may be selected into a die stack to provide a uniform overall height of the die stack. As noted, in embodiments, the computer 152 may store the overall thicknesses of the dies in addition to or instead of the thicknesses of the silicon substrate layer, as shown in the KTD map of
In a further embodiment of the present technology, dies may be picked from a wafer and placed into a die stack based on considerations including both bin category and overall height of the die stack. In such embodiments, using the data from the KTD map, the computer 152 may first select dies from bins 1 and 2 for pick and place into a die stack, while at the same time selecting dies from bins 1 and 2 that together provide the desired predefined uniform overall die stack height.
The semiconductor dies 106 are picked from the wafer 100 and placed into a semiconductor device in step 224.
The dies 106 may be electrically connected to each other and the substrate 174 using bond wires 184, though the dies 106 may be electrically connected to each other and the substrate 174 by other schemes in further embodiments including for example through silicon vias (TSVs). In order to leave room for the bond wires 184 to connect to the bond pads 108 on each semiconductor die 106 in stack 172, the dies 106 are stacked in a stepped offset from each other. In the embodiment of
The dies 106, 176 and bond wires 184 may be encapsulated in a molding compound 186, which may for example be epoxy resin, Phenol resin, fused silica, crystalline silica, carbon black and/or metal hydroxide. Other molding compounds are contemplated. In embodiments, the semiconductor device 170 may be used as a BGA (ball grid array) package soldered to a host device such as a printed circuit board. In such embodiments, the semiconductor device 170 may further include solder balls 188 on a bottom surface of the substrate 174 for physically and electrically coupling the semiconductor device 170 to the host device. In further embodiments, the semiconductor device 170 may be used as an LGA (land grid array) package configured for insertion to and removal from a slot of a host device. In such embodiments, the solder balls 188 may be replaced with contact fingers (not shown) on a bottom surface of the substrate 174 for mating with pins in the host device slot.
It is understood that semiconductor device 170 may include other configurations and other numbers of semiconductor dies 106 in further embodiments.
A wire embed film (WEF) layer 190 is shown separating the first and second groups of dies 106 to leave room for the wire bonds to the top die 106 in the first group of dies 106. The semiconductor device 170 may further include a controller die 176 and solder balls 188 as described above with respect to
In accordance with aspects of the present technology, the semiconductor dies 106 are picked from the wafer and placed into the die stack of
As noted, in further embodiments, the KTD map may store actual thicknesses of the silicon substrate layers 164 of the dies 106 on wafer 100. Where dies are selected for inclusion into a die stack 172 by their silicon substrate thickness listed in the KTD map 160, all of the dies in stack 172 may have silicon substrate layer thicknesses above some predefined threshold. In one example, that predefined threshold may be 7.0 μm, but the predefined threshold may be higher or lower than that in further embodiments. Once the dies having the optimal silicon substrate layer thicknesses are exhausted, dies having silicon substrate layer thicknesses below the predefined threshold may be selected for placement into further semiconductor devices 170.
As noted above, dies 106 may alternatively or additionally be selected for placement into a die stack using the data from the KTD map taking into consideration the overall height of the die stack 172. For example, in the embodiment of
Thus, for the embodiment of
The components shown in
Mass storage device 330, which may be implemented with a magnetic disk drive or an optical disk drive, is a non-volatile storage device for storing data and instructions for use by processor unit 310. Mass storage device 330 can store the system software for implementing embodiments of the present technology for purposes of loading that software into main memory 320.
Portable storage medium drive(s) 340 operate in conjunction with a portable non-volatile storage medium, such as a floppy disk, compact disk or digital video disc, to input and output data and code to and from the computing system 300 of
Input devices 360 provide a portion of a user interface. Input devices 360 may include an alpha-numeric keypad, such as a keyboard, for inputting alpha-numeric and other information, or a pointing device, such as a mouse, a trackball, stylus, or cursor direction keys. Additionally, the system 300 as shown in
Display system 370 may include a liquid crystal display (LCD) or other suitable display device. Display system 370 receives textual and graphical information, and processes the information for output to the display device.
Peripheral device(s) 380 may include any type of computer support device to add additional functionality to the computing system. Peripheral device(s) 380 may include a modem or a router.
The components contained in the computing system 300 of
Some of the above-described functions may be composed of instructions that are stored on storage media (e.g., computer-readable medium). The instructions may be retrieved and executed by the processor. Some examples of storage media are memory devices, tapes, disks, and the like. The instructions are operational when executed by the processor to direct the processor to operate in accord with the invention. Those skilled in the art are familiar with instructions, processor(s), and storage media.
It is noteworthy that any hardware platform suitable for performing the processing described herein is suitable for use with the invention. The terms “computer-readable storage medium” and “computer-readable storage media” as used herein refer to any medium or media that participate in providing instructions to a CPU for execution. Such media can take many forms, including, but not limited to, non-volatile media, volatile media and transmission media. Non-volatile media include, for example, optical or magnetic disks, such as a fixed disk. Volatile media include dynamic memory, such as system RAM. Transmission media include coaxial cables, copper wire and fiber optics, among others, including the wires that comprise one embodiment of a bus. Transmission media can also take the form of acoustic or light waves, such as those generated during radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example, a floppy disk, a flexible disk, a hard disk, magnetic tape, any other magnetic medium, a CD-ROM disk, digital video disk (DVD), any other optical medium, any other physical medium with patterns of marks or holes, a RAM, a PROM, an EPROM, an EEPROM, a FLASHEPROM, any other memory chip or cartridge, a carrier wave, or any other medium from which a computer can read.
Various forms of computer-readable media may be involved in carrying one or more sequences of one or more instructions to a CPU for execution. A bus carries the data to system RAM, from which a CPU retrieves and executes the instructions. The instructions received by system RAM can optionally be stored on a fixed disk either before or after execution by a CPU.
In summary, an example of the present technology relates to a semiconductor device, comprising: a substrate; and a die stack mounted on the substrate, the die stack comprising a first plurality of semiconductor dies, the first plurality of semiconductor dies selected from a wafer comprising a second plurality of semiconductor dies, two or more of the second plurality of semiconductor dies having at least portions of differing thicknesses, the first plurality of semiconductor dies selected from the second plurality of semiconductor dies based on dies having thicknesses of the at least portions of the semiconductor dies that provide desired electrical performance to the die stack.
In a further example, the present technology relates to a semiconductor device, comprising: a substrate; and a die stack mounted on the substrate, the die stack comprising a first plurality of semiconductor dies, the first plurality of semiconductor dies selected from a wafer comprising a second plurality of semiconductor dies, two or more of the second plurality of semiconductor dies having differing thicknesses, the first plurality of semiconductor dies selected from the second plurality of semiconductor dies based on an overall desired thickness of the die stack.
In another example, the present technology relates to a method of forming a semiconductor device, comprising: forming a plurality of semiconductor dies on a wafer; measuring thicknesses of the plurality of semiconductor dies on the wafer; storing on a computing system the measured thicknesses of the plurality of semiconductor dies on the wafer; picking a sub-group of the plurality of semiconductor dies for mounting in the semiconductor device, the sub-group picked based on the measured and stored thicknesses of the semiconductor dies in the sub-group.
In a still further example, the present technology relates to a semiconductor device, comprising: a substrate; and a die stack mounted on the substrate, the die stack comprising a first plurality of semiconductor dies, the first plurality of semiconductor dies selected from a wafer comprising a second plurality of semiconductor dies, two or more of the second plurality of semiconductor dies having at least portions of differing thicknesses, the first plurality of semiconductor dies selected from the second plurality of semiconductor dies using means for determining thicknesses of the at least portions of the second plurality of semiconductor dies.
The foregoing detailed description of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. The described embodiments were chosen in order to best explain the principles of the invention and its practical application to thereby enable others skilled in the art to best utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto.