Claims
- 1. A semiconductor package comprising:a substrate; a semiconductor chip mounted on the substrate; conductor circuits patterned on a surface of the substrate; a solder resist formed on the surface of the substrate between the conductor circuits; and an encapsulating resin for encapsulating the semiconductor chip, the conductor circuits and the solder resist.
- 2. The semiconductor package according to claim 1, wherein a thickness of the solder resist between the conductor circuits on the surface of the substrate is not less than ⅓ H nor more than H, where H is a thickness of the conductor circuits.
Priority Claims (1)
Number |
Date |
Country |
Kind |
9-358100 |
Dec 1997 |
JP |
|
Parent Case Info
This application is a divisional of U.S. application Ser. No. 09/215,190, filed Dec. 18, 1998, now U.S. Pat. No. 6,221,690B1, issued on Apr. 24, 2001.
US Referenced Citations (8)