Patent Application
20140166461
The present disclosure relates to microelectromechanical systems (MEMS), and more specifically, to vertical displacement MEMS structure that can be used to make a physical connection between vertically stacked chips.
As three-dimensional chip stacking architectures become more prevalent, the need for a means to connect between the chips without making a permanent solder connection arises. Examples of this are: test, diagnostics, power management, clock management, data flow, ESD, etc. A means needs to be established to create this temporary connection with the least intrusion on the existing chip architectures and layouts.
Currently, the only solution is to make a permanent connection or to use an external probe or structure.
This disclosure describes how a vertical displacement MEMS structure can be used to make a physical connection between vertically stacked chips. This is a circuit-controlled operation that allows connecting and disconnecting between the chips. The current solution of a fixed connection does not allow this flexibility.
According to one apparatus herein, the apparatus comprises a three-dimensional packaging structure. A first integrated circuit chip is physically connected to the three-dimensional packaging structure. A second integrated circuit chip is physically connected to the three-dimensional packaging structure. The second integrated circuit chip comprises a contact pad. The three-dimensional packaging structure maintains a fixed distance between the first integrated circuit chip and the second integrated circuit chip. An electrical conducting microelectromechanical system (MEMS) is physically connected to the first integrated circuit chip. The MEMS comprises a vertical displacement MEMS device. A control circuit is operatively connected to the MEMS. The control circuit directs movement of the MEMS between a first position and a second position. The MEMS makes electrical contact with the contact pad on the second integrated circuit chip when the MEMS is in the second position. The MEMS forms a conductive path and provides electrical communication between the first integrated circuit chip and the second integrated circuit chip when the MEMS is in the second position. The MEMS avoids making electrical contact with the contact pad on the second integrated circuit chip when the MEMS is in the first position.
According to a switch herein, an electrical conducting, vertical displacement microelectromechanical system (MEMS) is formed on a first integrated circuit chip. A control circuit is operatively connected to the vertical displacement MEMS. The control circuit directs movement of the vertical displacement MEMS between a first position and a second position resulting in displacement of the vertical displacement MEMS to make electrical contact with a contact pad on a second integrated circuit chip.
According to another device herein, the device comprises a first integrated circuit chip. An electrical conducting microelectromechanical system (MEMS) is formed on the first integrated circuit chip. The MEMS comprises a vertical displacement MEMS. A second integrated circuit chip comprises a contact pad. A control circuit is operatively connected to the MEMS. The control circuit directs movement of the MEMS between a first position and a second position resulting in contact with the contact pad on the second integrated circuit chip.
According to a method herein, a multi-layer chip is fabricated in a process. In the process, a first integrated circuit chip is selectively formed. A microelectromechanical system (MEMS) device is formed on the first integrated circuit chip. The MEMS device comprises an electrical conducting, vertical displacement MEMS and a control circuit operatively connected to the MEMS device. A second integrated circuit chip is selectively formed. A contact pad is formed on the second integrated circuit chip. The first integrated circuit chip is connected to the second integrated circuit chip using a three-dimensional packaging structure to maintain a fixed distance between the first integrated circuit chip and the second integrated circuit chip. The contact pad is aligned with the MEMS device.
The methods and devices herein will be better understood from the following detailed description with reference to the drawings, which are not necessarily drawn to scale and in which:
For electronic applications, semiconducting substrates, such as silicon wafers, can be used. The substrate enables easy handling of the micro device through the many fabrication steps. Often many individual devices are made together on one substrate and then singulated into separated devices toward the end of fabrication. In order to fabricate a microdevice, many processes are performed, one after the other, many times repeatedly. These processes typically include depositing a film, patterning the film with the desired micro features, and removing (or etching) portions of the film. For example, in memory chip fabrication, there may be several lithography steps, oxidation steps, etching steps, doping steps, and many others are performed. The complexity of microfabrication processes can be described by their mask count.
Flip chip is a method for interconnecting semiconductor devices, such as IC chips and MEMS, to external circuitry with solder bumps that have been deposited onto the chip pads. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external circuitry (e.g., a circuit board or another chip or wafer), it is flipped over so that its top side faces down, and aligned so that its pads align with matching pads on the external circuit, and then the solder is flowed to complete the interconnect. This is in contrast to wire bonding, in which the chip is mounted upright, and wires are used to interconnect the chip pads to external circuitry.
As mentioned above, as three-dimensional packaging becomes more main line, the ability to use these three-dimensional stacks in different ways becomes of concern. Current three-dimensional stacking art is mainly concerned with technological hurdles of making three-dimensional stacks manufacturable. Typically, a circuit chip has an integrated circuit formed on only one side. When stacking wafers, the side of the wafer without the integrated circuit of one chip is placed adjacent to the side of the wafer with the integrated circuit of another chip. The current art for three-dimensional interconnection of chips uses a through-silicon via (TSV), which is a vertical electrical connection passing completely through a silicon wafer that provides an electrical path from the side of the wafer having the integrated circuit to the opposite side of the wafer. Solder balls may be used to connect one chip with another. A TSV or solder ball, however, provides a permanent connection. There is no means to connect/disconnect between the connected chips in a functional mode. The systems and methods herein address these issues by using a vertical displacement MEMS device that allows electrical conduction. According to methods and devices herein, one chip may be connected to either a flipped chip or a chip with a pad on the bottom side using known connection technology. The gap between the chips can be bridged with the vertical displacement MEMS, as described below.
According to methods and devices herein, the MEMS device 140 may be a vertical displacement MEMS.
According to methods and devices herein, the flexible diaphragm 154 is formed of an electrically conductive material. When the flexible diaphragm 154 contacts the contact pad 168, an electrical connection is made through the MEMS device 140 from the first IC chip 118 to the second IC chip 125. The electrical connection is made by contact only; that is, the flexible diaphragm 154 touches the contact pad 168, and remains there only so long as the movable actuator plate 161 maintains a force against the flexible diaphragm 154.
While the examples herein show a flexible diaphragm as an electrically conductive component of the MEMS device, it is contemplated that other appropriate vertical displacement MEMS, such as beams or levers, may be used to provide electrical connection between stacked die.
Referring to
In this fashion, the MEMS device 140 can function as a switch under control of a processor 528 and/or the control circuit 507. The number of cycles of the switch is dependent only on the stress resistance of the components of the MEMS device 140.
In some devices, the contact pad 168 of the second IC chip 125 may be connected to a portion of another vertical displacement MEMS controlled by a second control circuit. A complete electrical connection may be made only when both control circuits direct their respective vertical displacement MEMS to extend, as described above.
Alternatively, or in addition, there may be more than one integrated circuit chip in the three-dimensional stack, in line with the first IC chip. In some devices, the vertically displacement MEMS contacts all of the IC chips in the stack.
Furthermore, the illustrations herein show the second IC chip 125 being above the first IC chip 118. It is contemplated that the IC chips may be in a three dimensional die stack structure and that the MEMS device may extend above or below the chip on which it is formed.
The method as described above may be used in the fabrication of integrated circuit chips. The resulting integrated circuit chips can be distributed by the fabricator in raw wafer form (that is, as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case the chip is mounted in a single chip package (such as a plastic carrier, with leads that are affixed to a motherboard or other higher-level carrier) or in a multichip package (such as a ceramic carrier that has either or both surface interconnections or buried interconnections). In any case, the chip is then integrated with other chips, discrete circuit elements, and/or other signal processing devices as part of either (a) an intermediate product, such as a motherboard, or (b) an end product. The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input device, and a central processor.
For purposes herein, a “semiconductor” is a material or structure that may include an implanted impurity that allows the material to sometimes be a conductor and sometimes be an insulator, based on electron and hole carrier concentration. As used herein, “implantation processes” can take any appropriate form (whether now known or developed in the future) and can comprise, for example, ion implantation, etc.
The conductors mentioned herein can be formed of any conductive material, such as polycrystalline silicon (polysilicon), amorphous silicon, a combination of amorphous silicon and polysilicon, and polysilicon-germanium, rendered conductive by the presence of a suitable dopant. Alternatively, the conductors herein may be one or more metals, such as tungsten, hafnium, tantalum, molybdenum, titanium, or nickel, or a metal silicide, any alloys of such metals, and may be deposited using physical vapor deposition, chemical vapor deposition, or any other technique known in the art.
When patterning any material herein, the material to be patterned can be grown or deposited in any known manner and a patterning layer (such as an organic photoresist) can be formed over the material. The patterning layer (resist) can be exposed to some pattern of light radiation (e.g., patterned exposure, laser exposure, etc.) provided in a light exposure pattern, and then the resist is developed using a chemical agent. This process changes the physical characteristics of the portion of the resist that was exposed to the light. Then one portion of the resist can be rinsed off, leaving the other portion of the resist to protect the material to be patterned. A material removal process is then performed (e.g., plasma etching, etc.) to remove the unprotected portions of the material to be patterned. The resist is subsequently removed to leave the underlying material patterned according to the light exposure pattern.
A hardmask can be formed of any suitable material, whether now known or developed in the future, such as a metal or organic hardmask, that has a hardness greater than the substrate and insulator materials used in the remainder of the structure.
The terminology used herein is for the purpose of describing particular methods and devices only and is not intended to be limiting of this disclosure. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
In addition, terms such as “right”, “left”, “vertical”, “horizontal”, “top”, “bottom”, “upper”, “lower”, “under”, “below”, “underlying”, “over”, “overlying”, “parallel”, “perpendicular”, etc., used herein are understood to be relative locations as they are oriented and illustrated in the drawings (unless otherwise indicated). Terms such as “touching”, “on”, “in direct contact”, “abutting”, “directly adjacent to”, etc., mean that at least one element physically contacts another element (without other elements separating the described elements).
The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The descriptions of the various methods and devices herein have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the methods and devices disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described methods and devices. The terminology used herein was chosen to best explain the principles of the methods and devices herein, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the methods and devices disclosed herein.
