SAIFUN SEMICONDUCTORS LTD.

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Netanya, IL

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Patents Grantslast 30 patents

Information Patent Grant
Forming silicon trench isolation (STI) in semiconductor devices sel...
- Patent number 7,811,887
- Issue date Oct 12, 2010
- Saifun Semiconductors Ltd.
- Rustom Irani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Secondary injection for NROM
- Patent number 7,808,818
- Issue date Oct 5, 2010
- Saifun Semiconductors Ltd.
- Boaz Eitan
- G11 - INFORMATION STORAGE
Information Patent Grant
Dense non-volatile memory array and method of fabrication
- Patent number 7,804,126
- Issue date Sep 28, 2010
- Saifun Semiconductors Ltd.
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dense non-volatile memory array and method of fabrication
- Patent number 7,786,512
- Issue date Aug 31, 2010
- Saifun Semiconductors Ltd.
- Ilan Bloom
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
NROM non-volatile memory and mode of operation
- Patent number 7,760,554
- Issue date Jul 20, 2010
- Saifun Semiconductors Ltd.
- Boaz Eitan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading a memory array with neighbor effect cancellation
- Patent number 7,755,938
- Issue date Jul 13, 2010
- Saifun Semiconductors Ltd.
- Shahar Atir
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array programming circuit and a method for using the circuit
- Patent number 7,743,230
- Issue date Jun 22, 2010
- Saifun Semiconductors Ltd.
- Yan Polansky
- G11 - INFORMATION STORAGE
Information Patent Grant
Rd algorithm improvement for NROM technology
- Patent number 7,742,339
- Issue date Jun 22, 2010
- Saifun Semiconductors Ltd.
- Arik Rizel
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple use memory chip
- Patent number 7,738,304
- Issue date Jun 15, 2010
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, system and circuit for operating a non-volatile memory array
- Patent number 7,715,237
- Issue date May 11, 2010
- Saifun Semiconductors Ltd.
- Guy Cohen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, circuit and device for disturb-control of programming nonvo...
- Patent number 7,692,961
- Issue date Apr 6, 2010
- Saifun Semiconductors Ltd.
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, system and circuit for programming a non-volatile memory array
- Patent number 7,675,782
- Issue date Mar 9, 2010
- Saifun Semiconductors Ltd.
- Guy Cohen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of erasing non-volatile memory cells
- Patent number 7,668,017
- Issue date Feb 23, 2010
- Saifun Semiconductors Ltd.
- Eli Lusky
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, circuit and system for erasing one or more non-volatile mem...
- Patent number 7,652,930
- Issue date Jan 26, 2010
- Saifun Semiconductors Ltd.
- Assaf Shappir
- G11 - INFORMATION STORAGE
Information Patent Grant
Double density NROM with nitride strips (DDNS)
- Patent number 7,638,835
- Issue date Dec 29, 2009
- Saifun Semiconductors Ltd.
- Rustom Irani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory structure and method of fabrication
- Patent number 7,638,850
- Issue date Dec 29, 2009
- Saifun Semiconductors Ltd.
- Eli Lusky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Measuring and controlling current consumption and output current of...
- Patent number 7,605,579
- Issue date Oct 20, 2009
- Saifun Semiconductors Ltd.
- Yoram Betser
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Reduced power programming of non-volatile cells
- Patent number 7,599,227
- Issue date Oct 6, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory with optimized write sector spares
- Patent number 7,590,001
- Issue date Sep 15, 2009
- Saifun Semiconductors Ltd.
- Meir Janai
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple use memory chip
- Patent number 7,573,745
- Issue date Aug 11, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device and method for reading cells
- Patent number 7,535,765
- Issue date May 19, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for multi-level sensing in a memory array
- Patent number 7,532,529
- Issue date May 12, 2009
- Saifun Semiconductors Ltd.
- Oleg Dadashev
- G11 - INFORMATION STORAGE
Information Patent Grant
EEPROM array and method for operation thereof
- Patent number 7,518,908
- Issue date Apr 14, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming a reference cell
- Patent number 7,512,009
- Issue date Mar 31, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple use memory chip
- Patent number 7,489,562
- Issue date Feb 10, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial erase verify
- Patent number 7,468,926
- Issue date Dec 23, 2008
- Saifun Semiconductors Ltd.
- Assaf Shappir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic matching of signal path and reference path for sensing
- Patent number 7,466,594
- Issue date Dec 16, 2008
- Saifun Semiconductors Ltd.
- Yair Sofer
- G11 - INFORMATION STORAGE
Information Patent Grant
Operating array cells with matched reference cells
- Patent number 7,457,183
- Issue date Nov 25, 2008
- Saifun Semiconductors Ltd.
- Eli Lusky
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, system, and circuit for operating a non-volatile memory array
- Patent number 7,420,848
- Issue date Sep 2, 2008
- Saifun Semiconductors Ltd.
- Assaf Shappir
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell and non-volatile memory devices
- Patent number 7,405,969
- Issue date Jul 29, 2008
- Saifun Semiconductors Ltd.
- Boaz Eitan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NROM NON-VOLATILE MEMORY AND MODE OF OPERATION
- Publication number 20070195607
- Publication date Aug 23, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Boaz Eitan
- G11 - INFORMATION STORAGE
Information Patent Application
NROM NON-VOLATILE MODE OF OPERATION
- Publication number 20070196982
- Publication date Aug 23, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Advanced non-volatile memory array and method of fabrication thereof
- Publication number 20070173017
- Publication date Jul 26, 2007
- Saifun Semiconductors, Ltd.
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dynamic matching of signal path and reference path for sensing
- Publication number 20070171717
- Publication date Jul 26, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Yair Sofer
- G11 - INFORMATION STORAGE
Information Patent Application
Method, system, and circuit for operating a non-volatile memory array
- Publication number 20070153575
- Publication date Jul 5, 2007
- Saifun Semiconductors, Ltd.
- Guy Cohen
- G11 - INFORMATION STORAGE
Information Patent Application
Improving NROM device characteristics using adjusted gate work func...
- Publication number 20070087503
- Publication date Apr 19, 2007
- Saifun Semiconductors, Ltd.
- Eli Lusky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MEASURING CHARGE PUMP OUTPUT CURRENT
- Publication number 20070069714
- Publication date Mar 29, 2007
- Saifun Semiconductors, Ltd.
- Oleg Dadashev
- G01 - MEASURING TESTING
Information Patent Application
DIODE STACK HIGH VOLTAGE REGULATOR
- Publication number 20070069711
- Publication date Mar 29, 2007
- Saifun Semiconductors, Ltd.
- Oleg Dadashev
- G05 - CONTROLLING REGULATING
Information Patent Application
Method and circuit for erasing a non-volatile memory cell
- Publication number 20070058444
- Publication date Mar 15, 2007
- Saifun Semiconductors, Ltd.
- Stephan Riedel
- G11 - INFORMATION STORAGE
Information Patent Application
Dense non-volatile memory array and method of fabrication
- Publication number 20070051982
- Publication date Mar 8, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Ilan Bloom
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dense non-volatile memory array and method of fabrication
- Publication number 20070048940
- Publication date Mar 1, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of erasing non-volatile memory cells
- Publication number 20070041249
- Publication date Feb 22, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Eli Lusky
- G11 - INFORMATION STORAGE
Information Patent Application
Sticky bit buffer
- Publication number 20070036007
- Publication date Feb 15, 2007
- Saifun Semiconductors, Ltd.
- Ameet Lann
- G11 - INFORMATION STORAGE
Information Patent Application
Protective layer in memory device and method therefor
- Publication number 20070032016
- Publication date Feb 8, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Ilan Bloom
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Accessing an NROM array
- Publication number 20060285386
- Publication date Dec 21, 2006
- Saifun Semiconductors, Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD CIRCUIT AND SYSTEM FOR COMPENSATING FOR TEMPERATURE INDUCED...
- Publication number 20060285408
- Publication date Dec 21, 2006
- Saifun Semiconductors, Ltd.
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHODS FOR MULTI-LEVEL SENSING IN A MEMORY ARRAY
- Publication number 20060285402
- Publication date Dec 21, 2006
- SAIFUN SEMICONDUCTORS LTD.
- Oleg Dadashev
- G11 - INFORMATION STORAGE
Information Patent Application
Method for programming a reference cell
- Publication number 20060268621
- Publication date Nov 30, 2006
- Saifun Semiconductors, Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Two bit non-volatile electrically erasable and programmable semicon...
- Publication number 20060262598
- Publication date Nov 23, 2006
- SAIFUN SEMICONDUCTORS LTD.
- Boaz Eitan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL WITH DOUBLE BB IMPLANT
- Publication number 20060261418
- Publication date Nov 23, 2006
- SAIFUN SEMICONDUCTORS LTD.
- Boaz Eitan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Threshold voltage shift in NROM cells
- Publication number 20060227608
- Publication date Oct 12, 2006
- Saifun Semiconductors, Ltd.
- Eli Lusky
- G11 - INFORMATION STORAGE
Information Patent Application
Contact in planar NROM technology
- Publication number 20060208281
- Publication date Sep 21, 2006
- Saifun Semiconductors, Ltd.
- Assaf Shappir
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile memory structure and method of fabrication
- Publication number 20060211188
- Publication date Sep 21, 2006
- SAIFUN SEMICONDUCTORS LTD.
- Eli Lusky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for preventing fixed pattern programming
- Publication number 20060181934
- Publication date Aug 17, 2006
- Saifun Semiconductors, Ltd.
- Assaf Shappir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partial erase verify
- Publication number 20060158940
- Publication date Jul 20, 2006
- Saifun Semiconductors, Ltd.
- Assaf Shappir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, circuit and systems for erasing one or more non-volatile me...
- Publication number 20060158938
- Publication date Jul 20, 2006
- Saifun Semiconductors, Ltd.
- Assaf Shappir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Current folding sense amplifier
- Publication number 20060146624
- Publication date Jul 6, 2006
- Saifun Semiconductors, Ltd.
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Application
Method for reading non-volatile memory cells
- Publication number 20060126383
- Publication date Jun 15, 2006
- Saifun Semiconductors, Ltd.
- Assaf Shappir
- G11 - INFORMATION STORAGE
Information Patent Application
Method, system, and circuit for operating a non-volatile memory array
- Publication number 20060126396
- Publication date Jun 15, 2006
- Saifun Semiconductors, Ltd.
- Assaf Shappir
- G11 - INFORMATION STORAGE
Information Patent Application
Advanced NROM structure and method of fabrication
- Publication number 20060084219
- Publication date Apr 20, 2006
- Saifun Semiconductors, Ltd.
- Eli Lusky
- H01 - BASIC ELECTRIC ELEMENTS

Trademarklast 30 trademarks

Information Trademark
75479839 - SAIFUN NROM
- Serial number 75479839
- Registration number 2647638
- Filing date May 5, 1998
- Saifun Semiconductors Ltd
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments
Information Trademark
75464630 - SAIFUN
- Serial number 75464630
- Registration number 2633745
- Filing date Apr 8, 1998
- Saifun Semiconductors Ltd.
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments

SAIFUN SEMICONDUCTORS LTD.

Organization

Patents Grantslast 30 patents

Forming silicon trench isolation (STI) in semiconductor devices sel...

Secondary injection for NROM

Dense non-volatile memory array and method of fabrication

Dense non-volatile memory array and method of fabrication

NROM non-volatile memory and mode of operation

Method for reading a memory array with neighbor effect cancellation

Memory array programming circuit and a method for using the circuit

Rd algorithm improvement for NROM technology

Multiple use memory chip

Method, system and circuit for operating a non-volatile memory array

Method, circuit and device for disturb-control of programming nonvo...

Method, system and circuit for programming a non-volatile memory array

Method of erasing non-volatile memory cells

Method, circuit and system for erasing one or more non-volatile mem...

Double density NROM with nitride strips (DDNS)

Non-volatile memory structure and method of fabrication

Measuring and controlling current consumption and output current of...

Reduced power programming of non-volatile cells

Flash memory with optimized write sector spares

Multiple use memory chip

Non-volatile memory device and method for reading cells

Apparatus and methods for multi-level sensing in a memory array

EEPROM array and method for operation thereof

Method for programming a reference cell

Multiple use memory chip

Partial erase verify

Dynamic matching of signal path and reference path for sensing

Operating array cells with matched reference cells

Method, system, and circuit for operating a non-volatile memory array

Non-volatile memory cell and non-volatile memory devices

Patents Applicationslast 30 patents

NROM NON-VOLATILE MEMORY AND MODE OF OPERATION

NROM NON-VOLATILE MODE OF OPERATION

Advanced non-volatile memory array and method of fabrication thereof

Dynamic matching of signal path and reference path for sensing

Method, system, and circuit for operating a non-volatile memory array

Improving NROM device characteristics using adjusted gate work func...

METHOD FOR MEASURING CHARGE PUMP OUTPUT CURRENT

DIODE STACK HIGH VOLTAGE REGULATOR

Method and circuit for erasing a non-volatile memory cell

Dense non-volatile memory array and method of fabrication

Dense non-volatile memory array and method of fabrication

Method of erasing non-volatile memory cells

Sticky bit buffer

Protective layer in memory device and method therefor

Accessing an NROM array

METHOD CIRCUIT AND SYSTEM FOR COMPENSATING FOR TEMPERATURE INDUCED...

APPARATUS AND METHODS FOR MULTI-LEVEL SENSING IN A MEMORY ARRAY

Method for programming a reference cell

Two bit non-volatile electrically erasable and programmable semicon...

MEMORY CELL WITH DOUBLE BB IMPLANT

Threshold voltage shift in NROM cells

Contact in planar NROM technology

Non-volatile memory structure and method of fabrication

Methods for preventing fixed pattern programming

Partial erase verify

Method, circuit and systems for erasing one or more non-volatile me...

Current folding sense amplifier

Method for reading non-volatile memory cells

Method, system, and circuit for operating a non-volatile memory array

Advanced NROM structure and method of fabrication

Trademarklast 30 trademarks

75479839 - SAIFUN NROM

75464630 - SAIFUN