Patent Application
20110211323
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2010-44594, filed on Mar. 1, 2010; the entire contents of which are incorporated herein by reference.
Embodiments described herein relate generally to a circuit board, a semiconductor device, and a method of manufacturing the semiconductor device.
In the past, a semiconductor device used while including a semiconductor memory chip such as a NAND flash memory, the semiconductor memory chip is mounted on a circuit board on which circuit patterns are formed. In such a semiconductor device, in some case, a plurality of semiconductor memory chips are stacked on the circuit board according to a request for high-density packaging.
In the circuit board, in some case, because of the circuit patterns, through-holes, or the like formed on the circuit board, a local recess is caused on a surface on which the semiconductor memory chip is mounted. In some case, because of this recess, air bubbles remain between the circuit board and the semiconductor memory chip bonded via a die attach film. The remaining air bubbles have large volume fluctuation due to a temperature change. Therefore, the semiconductor memory chip tends to peel off from the semiconductor board.
When a plurality of semiconductor memory chips are stacked, the thickness of each of the semiconductor memory chips is reduced according to limitation on the thickness of the semiconductor device itself. In general, in a semiconductor memory chip, different materials such as silicon, a silicon oxide film, and the like are combined. Therefore, in some case, deforming force to warp the semiconductor memory chip itself is caused in the semiconductor memory chip because of a difference among expansion coefficients of the materials. In the semiconductor memory chip reduced in thickness, force resisting this deforming force is weakened. Therefore, a warp tends to occur in the semiconductor memory chip itself. Because of this warp of the semiconductor memory chip itself, air bubbles also tend to remain between the semiconductor memory chip and the circuit board and the semiconductor memory chip also tends to peel off from the circuit board.
In general, according to one embodiment, a circuit board includes: a substrate on which circuit patterns are formed, a first surface of the substrate being formed substantially flat; and a solder resist film that covers the first surface of the substrate. The solder resist film assumes, as a whole, a convex shape in which the thickness of the solder resist film in the center of the substrate is larger than the thickness of the solder resist film in the periphery of the substrate.
Exemplary embodiments of a circuit board, a semiconductor device, and a method of manufacturing the semiconductor device will be explained below in detail with reference to the accompanying drawings. The present invention is not limited to the following embodiments.
The circuit patterns 23 are formed of, for example, copper foil. Thickness P of the circuit patterns 23 is about 18 micrometers. Although not shown in detail in the figure, the substrate 21 is formed in a multilayer structure. The circuit patterns 23 are formed not only on the front surface 21a and the rear surface 21b of the substrate 21 but also on an inner layer surface of the substrate 21. Each of the through-holes 24 is formed by applying copper plating to the inner surface of a perforated hole 21c formed in the substrate 21. The circuit patterns 23 formed on different layers are electrically connected to one another via the copper plating applied to the through-hole 24. An inner diameter Q of the perforated hole 21c formed in the substrate 21 is about 0.2 millimeter. An inner diameter R of a perforated hole 21d after the application of the copper plating to the perforated hole 21c is about 0.1 millimeter. A part of the circuit patterns 23 is not covered by the solder resist film 22 and functions as a connection pad (not shown) for performing wire bonding.
The solder resist films 22 are formed to cover both the front surface 21a and the rear surface 21b of the substrate 21. Insulation properties among the circuit patterns 23 formed on the substrate 21 are maintained by the solder resist films 22. The solder resist film 22 formed on the front surface 21a side is formed to assume a convex shape as a whole. The solder resist film 22 is desirably formed in the convex shape in which a difference between thickness ×1 of the solder resist film 22 in the center of the substrate 21 and thickness ×2 of the solder resist film 22 in the periphery of the substrate 21 is 5 micrometers to 13 micrometers.
The semiconductor memory chip 3 is a memory element such as a NAND flash memory. A plurality of the semiconductor memory chips 3 are stacked on the solder resist film 22 formed on the front surface 21a side of the substrate 21. The semiconductor memory chip 3 in the bottom layer among the semiconductor memory chips 3 is bonded to the solder resist film 22 by a bonding material. As the bonding material, a thermosetting or photo-curable die attach film (an adhesive film) containing general polyimide resin, epoxy resin, acrylic resin, or the like as a main component is used.
The other semiconductor memory chips 3 are bonded in a step shape on the semiconductor memory chip 3 in the bottom layer bonded on the solder resist film 22, whereby the semiconductor memory chips 3 are stacked. An electrode pad provided on one side of the semiconductor memory chips 3 can be exposed by stacking the semiconductor memory chips 3 in the step shape. The exposed electrode pad is electrically connected (wiring-bonded) to the connection pad, which is formed on the circuit board 2, by a metal wire 27 such as an Au wire.
The controller chip 4 is mounted on the solder resist film 22 formed on the front surface 21a side of the substrate 21. The controller chip 4 selects, out of the semiconductor memory chips 3, the semiconductor memory chip 3 in which data is written and from which data is read out. The controller chip 4 performs writing of data in the selected semiconductor memory chip 3 and readout of data stored in the selected semiconductor memory chip 3. An electrode pad (not shown) is formed on the upper surface of the controller chip 4. The electrode pad and the connection pad of the circuit board 2 are wire-bonded by a metal wire 28. Electronic components such as a chip capacitor, a resistor, and an inductor are also mounted on the solder resist film 22 formed on the front surface 21a side of the substrate 21. However, the electronic components are not shown in the figure and detailed explanation of the electronic components is omitted.
The resin mold section 5 is formed by sealing the front surface of the circuit board 2 with a resin material. The resin mold section 5 forms an outer shell of the semiconductor device 1. The resin mold section 5 is formed at height for completely covering the semiconductor memory chips 3 and the controller chip 4. The resin mold section 5 is formed by covering the circuit board 2, on which the mounted components such as the semiconductor memory chips 3 are mounted, with a mold and injecting a softened resin material into the mold.
The solder resist film 22 is formed to assume one convex shape as a whole on the front surface 21a side of the substrate 21. Therefore, it is possible to suppress a local recess from being caused on the surface of the circuit board 2 on which the semiconductor memory chip 3 is bonded. This makes it possible to suppress generation of air bubbles when the semiconductor memory chip 3 is bonded to the circuit board 2 and improve reliability of bonding of the semiconductor memory chip 3.
The convex shape of the solder resist film 22 is formed along the warp of the bonding surface itself of the semiconductor memory chip 3. Therefore, it is possible to improve adhesiveness between the semiconductor memory chip 3 and the circuit board 2 and further improve the reliability of bonding.
A manufacturing process for the semiconductor device 1 is explained below.
A sheet substrate 6 is used for manufacturing of the semiconductor device 1. As shown in
First, a backup plate (a frame member) 7 is brought into contact with the sheet substrate 6 (step S1). As shown in
Inner spaces of the openings 71 formed in the backup plate 7 are connected to a not-shown suction apparatus. The air in the inner spaces of the openings 71 is sucked by the suction apparatus to decompress the inner spaces of the openings 71 (step S2). When the inner spaces of the openings 71 are decompressed, as shown in
Subsequently, screen printing is applied to the front surface 21a in the recessed state using a screen 8 and a squeegee 9 to form the surface of the solder resist film 22 as a surface as flat as possible (step S3). The solder resist film 22 is formed on the front surface 21a in the recessed state. Therefore, as shown in
The suction by the suction apparatus is stopped to stop the decompression (step S4). When the decompression is stopped, the recessed surface 21a of the substrate 21 is restored to the substantially flat shape. According to the restoration of the shape of the front surface 21a of the substrate 21, as shown in
The solder resist film 22 is screen-printed on the rear surface 21b of the substrate 21 and hardened (step S6) (refer to
The semiconductor device 1 is manufactured by the process explained above. Therefore, if the solder resist film 22 is formed by general screen printing, it is possible to form the solder resist film 22 that assumes a convex shape as a whole and realize improvement of the adhesiveness between the circuit board 2 and the semiconductor memory chip 3 and improvement of the reliability of boding. The solder resist film 22 assumes the convex shape as a whole. Therefore, even when the solder resist film 22 is viewed on a cut surface rotated 90 degrees in the horizontal direction from a cut surface shown in
The solder resist film 22 is hardened after the suction by the suction apparatus is stopped and the shape of the substrate 21 is restored. Therefore, it is possible to suppress cracks from being caused in the solder resist film 22 by deformation after the hardening.
A procedure of the manufacturing process for the semiconductor device 1 is not limited to the procedure shown as the flowchart in
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel devices and methods described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the devices and methods described herein may be made without departing from the sprit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-044594 | Mar 2010 | JP | national |
