The present invention concerns the field of microelectronics and microsystems, and more particularly that of interconnect structures in particular made during steps commonly called “waferlevel packaging” (WLP) steps, i.e. steps for making integrated circuit packages made on a wafer before cutting into elementary circuits.
It provides an improved interconnect structure with one or several contact rises in a cavity formed in a support in order to connect elements to each other that are situated on either side of the support, as well as a method for producing such a structure.
The document “Spin, Spray coating and Electrodeposition of photoresist for MEMS structures—A comparison”, Pham et al., Delft University of Technology, DIMES, presents interconnect structures including a contact rise made on the inclined walls of a cavity, with a conductive element making it possible to establish a contact between a conductive area situated in the cavity and another element situated above the cavity.
The production of contact rises poses a problem when the walls of the cavity are vertical.
Document WO 01/45172 presents a method for making a three-dimensional interconnect structure that is formed by producing slots by sawing the edge of a support, then depositing a metal material in said slots.
The interconnect structures thus formed must be situated near the edges of the support.
The problem arises of finding a new interconnect structure, that does not have the aforementioned drawbacks, and that is easier to implement, and a method for producing such a structure.
The invention first concerns an interconnect device comprising a support in which at least one hole is formed, the hole having walls forming a closed contour and being formed by a cavity and one or several slots communicating with the cavity, at least part of the slots extending along the hole, the device also comprising one or several conductive elements positioned on at least one wall of the hole and passing through the latter part, the conductive elements each being intended to connect conductive areas to each other that are situated on either side of the support.
According to one possible embodiment, at least one of said slots separates two of said conductive elements from each other.
According to one possible embodiment, the device can include at least one conductive element housed in one of said grooves and extending along said slot.
The cavity can pass through the thickness of the support.
According to one alternative, the cavity can be formed by a blind orifice formed in the support.
The support can be formed by several substrates and/or superimposed layers.
The cavity can be formed by a first opening made in a first substrate and a second opening with a section different from the first opening and made in a second substrate.
The slots can communicate with said first opening, one or several other slots formed in the second substrate along the cavity formed in said substrate communicating with the second opening.
The walls of the cavity can be covered with a conductive material. It is thus possible to form a protection against electromagnetic disruptions on the perimeter of the cavity.
The invention also concerns a method for producing an interconnect device as defined above, and comprising the steps consisting of:
The invention also concerns a method for producing an interconnect device as defined above, the method comprising the steps consisting of:
The invention also concerns a method for producing an interconnect device as defined above, the method comprising the steps consisting of:
The invention also concerns a method for producing an interconnect device as defined above, comprising the steps consisting of:
The present invention will be better understood upon reading the description of embodiments provided purely for information and non-limitingly in reference to the appended drawings, in which:
Identical, similar, or equivalent parts of the different figures bear the same numerical references so as to facilitate the transition from one figure to the next.
The different parts shown in the figures are not necessarily shown using a uniform scale, to make the figures more legible.
A first example of an interconnect structure implemented according to the invention is provided in
The structure is made in a support 100 that can for example assume the form of a layer, or of a stack of several layers, or of a substrate, or of a stack of several substrates, or of an interposer, and includes a cavity 103 passing through the thickness of the support between its upper face (shown in
The support 100 can for example be made of a semiconductor material, or an insulating material, for example glass.
The interconnect structure makes it possible to connect elements or devices situated on either side of the lower face and the upper face of the support. The interconnect structure may be made in a central area of the support.
A vertical wall of the cavity 103 is covered with elements 104a, 104b, 104c, with a base of a conducting material 106 such as copper, aluminum, or tungsten, or polysilicon, for example.
The conducting elements 104a and 104b can assume the form of plates covering a vertical wall of the cavity 103 (the vertical direction being defined as a direction parallel to the vector {right arrow over (k)} of the orthogonal reference [O; {right arrow over (i)}; {right arrow over (j)}; {right arrow over (k)}] provided in the figures).
The conducting elements 104a, 104b are separated from each other via a slot 105a communicating with the cavity 103 and formed at said vertical wall, while another slot 105b separates the conducting elements 104b and 104c. These slots 105a, 105b extend in the vertical direction and pass through the thickness e of the support 100 which, in this example, corresponds to the height h of the cavity 103.
The slots 105a, 105b and the cavity 103 communicating with the latter parts form a hole whereof the vertical walls form a closed contour.
The slots 105a, 105b and the cavity 103 can have been made simultaneously or successively, for example by etching such as DRIE (Deep reactive ion etching) or laser etching.
The slots 105a, 105b make it possible to ensure an electrical discontinuity between the conducting elements 104a, 104b, 104c.
Thus, the conducting elements 104a, 104b, 104c are not connected to each other or electrically connected to each other.
In this example, one of the conducting elements 104b is extended by a conducting track 107b that extends over the upper face of the support 100 parallel to the main plane thereof (the main plane of the support being defined as a plane passing through the latter part and parallel to the plane [O; {right arrow over (i)}; {right arrow over (j)}] given in the figures).
The through conducting elements 104a, 104b, 104c each make it possible to connect a device situated on or above the upper face of the support 100 and another device situated under or below the lower face of the support 100.
According to one alternative (
Another example of an interconnect structure is provided in
In this other example, vertical connecting elements 114a, 114b with a base of a conducting material in the form of conducting lines are also positioned in the slots 105a, 105b, and pass through the thickness of the support 100. The elements 114a, 114b, like the slots 105a, 105b, form a non-zero angle in relation to the main plane of the support and are, in this example, perpendicular to the main plane of the support.
The connecting elements 114a, 114b only cover a portion of the walls of the slots 105a, 105b.
The connecting elements 114a, 114b are extended by conducting tracks 117a, 117b, respectively, that extend on the upper face of the support 100.
In the example provided in
The connecting elements 114a, 114b only cover a portion of the slots 105a, 105b, the latter parts making it possible to ensure an electrical discontinuity between the connecting elements 114a, 114b and the conducting elements 104a, 104b, 104c. The slots 105a, 105b make it possible to separate and electrically insulate the connecting elements 104a, 104b, 104c, of the conducting elements 114a, 114b.
In the example of
One example of a structure with a cavity 103 whereof the vertical walls are each covered with conducting elements, the conducting elements 104a, 104b, 104c, 104d, 104e, 104f, 104g, 104h being separated by a succession of slots 105a, 105b, 105c, 105d, 105e, 105f, 105g, 105h, formed all around the cavity 103 is provided in
Another example of an interconnect structure formed in the cavity 103 is illustrated in
A connecting element 104b formed on a vertical wall of the cavity 103 is separated and disconnected from the conducting area 114 by vertical slots 105a, 105b communicating with the cavity 103.
The connecting element 104b is extended by a conducting track 107b that extends on the upper face of the support 100.
A support area that is not covered with conducting material separates the conducting track 107b from the conducting area 114, such that the conducting area 114 and the conducting track 107b are not electrically connected.
As illustrated in
The cavity or cavities 203 can be formed by a first part 203a, having given dimensions, and a second part 203b situated in the extension of the first part, the second part 203b having, in a plane parallel to the support, smaller dimensions than the first part 203a, the first part 203a and the second part 203b being defined by walls forming a stair profile. The stair configuration can make it possible for example to house a lens in the first part 203a and position it in relation to an imager using the second part 203b while also allowing an electrical contact rise along the stair-shaped cavity.
According to one possible embodiment, a stair profile including more than 2 stairs can be implemented.
The support 200 can possibly be made up of several layers or several stacked substrates, for example two layers 200a, 200b or two substrates 200a, 200b, which can be assembled by gluing, for example.
To that end, a glue seam 211 can for example be provided between the two substrates 200a, 200b.
This glue seam 211 can be, according to a first case, formed so as to arrive in the cavity 203 (
The first substrate 200a can include vertical slots 205a, 205b communicating with the first part 203a of the cavity 203 and formed in a wall of said first part 200a, while the second substrate 200b includes vertical slots 215a, 215b communicating with the second part 203b of the cavity 203 and formed in a wall of said second part 203b.
In
In this structure, a first conducting area 214 covers a portion of the upper face of the first substrate 200a, part of the vertical walls of the first part 203a of the cavity 203, a portion of the upper face of the second substrate 200b situated at the bottom of said first part 203a, as well as a portion of the vertical walls of the second portion 203b of the cavity 203.
A second conducting area 216, separate from the first conducting area 214, is formed by a conducting strip 107b extending on the upper face of the first substrate 100a, extended in a portion covering a vertical wall of the first part 103a of the cavity, a portion of the upper face of the second substrate 100b situated at the bottom of said first part 103a, as well as a portion of the vertical walls of the second portion 103b of the cavity 103.
The first conducting area 214 and the second conducting area 216 are separated and electrically insulated from each other via vertical slots 205a, 205b formed in the first substrate 200a, 200b, horizontal trenches 208a, 208b (the horizontal direction being defined as a direction parallel to the plane [O; {right arrow over (i)}; {right arrow over (j)}] of the orthogonal reference [O; {right arrow over (i)}; {right arrow over (j)}; {right arrow over (k)}] given in the figures) formed on the second substrate 200b and communicating with the slots 205a, 205b, and vertical slots 215a, 215b formed in the second substrate 200b. The slots 205a, 205b, 215a, 215b communicate with the cavity.
Another example of an embodiment of horizontal trenches 208a, 208b is given in
In this other example, conducting areas 218a extend along trenches and include conducting areas that extend along the latter parts.
The trenches 208a, 208b can be formed such that their mouth is smaller than their bottom.
This can make it possible to form conducting areas 218a, 218b that only cover a portion of the bottom of the trenches.
These areas 218a, 218b can in fact be made by metal deposition, the metal only being deposited, by shadow effect due to the shape of the trenches 208a, 208b, on a portion of the bottom of the trenches.
According to one alternative of the previously described example (
An interconnect structure with a “blind” cavity 303 can also be provided (
In this case, the cavity 303 can be formed in the thickness of a first substrate 200a, resting on a second substrate 200b, the cavity 303 passing through the thickness of the first substrate 200a, and having a bottom at the second substrate 200b and that can be formed by the upper face thereof.
A portion of the upper face of the first substrate 200a, part of the walls of the cavity, as well as the upper face of the second substrate 200b are covered with a conducting area 314.
A metal track 207b extends on the upper face of the first substrate 200a, on a wall of the cavity 303, and on the upper face of the second substrate 200b.
This metal track 207b is separated and electrically insulated from the conducting area 314 via slots 105a, 105b formed in the walls of the cavity, as well as areas of the substrates 100a, 100b that are not covered with metal material.
Another example of an interconnect structure with a blind cavity is provided in
According to one possible embodiment, the conducting elements 307a, 307b, 307c, 307d, 307e, 307f, 307g, 307h, can be connected to vias 317 passing through the second substrate 100b (
An alternative of this structure is provided in
In the examples of structures of
As illustrated in
Vertical slots 205a, 205b, 205c, 205d, 205e, 205f, 205g, 205h formed all around the cavity 303 and communicating therewith insulate areas of the metal layer from each other in a direction orthogonal to the substrate (
Then, portions of the metal area 416 are removed from the bottom of the cavity 303.
The removal can be done such that the metal layer 416 is removed between grooves situated opposite each other on opposite walls of the cavity 303.
One example of a method for making a cavity provided with insulating slots as provided in an interconnect structure according to the invention is illustrated in
Pads 101a, 101b are first formed in the thickness of a support 100, which can be in the form of a layer or a stack of layers or a substrate (
The pads 101a, 101b can be conducting pads for example with a base of a metal material such as copper, aluminum, or tungsten, or polysilicon. These pads can be vias insulated through a thickness of dielectric material surrounding them.
A cavity 103 is then formed going through the support 100.
The cavity 103 is made so as to go through a portion of the support where part of the conducting pads 101a, 101b is situated, and then to open and remove a portion of the conducting pads 101a, 101b (
In the example of a production method of
A cavity 103 is then formed going through the support 100 and an area where the conducting pads 201a, 201b are situated, and so as to open and remove a significant portion of the latter parts and keep another portion against a flank of the cavity 103 (
According to another example method, it is possible first to form a cavity 103 going through a support 100, then to cover the walls of the cavity using an area 108 of conducting material (
In the case where the support 100 has a base of semiconductor material, an insulating layer (not shown) can be deposited beforehand on the vertical walls of the cavity.
Slots 105a, 105b are then formed at the level of at least one vertical wall of the cavity, the slots 105a, 105b communicating with the cavity 103.
The slots 105a, 105b are made so as to remove portions of the area 108 of conducting material.
At the end of this removal, a first conducting area 108a covering part of the walls of the cavity 103 is separated from a conducting area 108b covering a part of a wall of the cavity 103, via slots 105a, 105b (
According to another example method, the cavity 103 and the slots 105a, 105b are formed in a support 100, at the same time or one after the other (
A layer of sacrificial material 109 is then deposited in the slots 105a, 105b or on the walls of the slots 105a, 105b, the sacrificial material 109 being distributed so as to form a separation between the cavity 103 and the slots 105a, 105b (
The layer of sacrificial material 109 can be provided so as to protrude in the cavity 103.
The sacrificial material 109 can for example be SiO2 or Si3N4.
A layer of conducting material 108 is then deposited so as to cover the walls of the cavity 103 and cover the sacrificial material 109.
The material can for example be deposited by PVD (physical vapor deposition).
The thickness of the conducting material 108 can be provided to be smaller than the thickness of the layer of sacrificial material 109 protruding in the cavity 103 (
At the end of this removal, the conducting area 108 is in the form of two separate conducting parts 108a and 108b that are not connected to each other and are separated using slots 105a, 105b (
One example of a method for producing an interconnect structure is provided in
In this example, in the support 100, a cavity 103 is made going through the support 100, as well as at least one vertical slot 105 extending in the thickness of the support 100, and communicating with the cavity 103.
The slot can for example have a rectangular (
Parts 106a, 106b of a wall 104 of the cavity 103 form a separation between the latter part and the slot 105.
A metal deposition 108 is then done so as to cover a wall of the cavity and part of the slot 105. The parts 106a, 106b prevent a deposition of metal all around the slot such that the metal deposition on the wall 104 of the cavity and on the slot 105 forms a discontinuous area.
The metal deposition may be a so-called “directional” deposition in which the material is dispensed along a predetermined angle in relation to the main plane of the support (the main plane of the support being a plane passing through the latter and parallel to the plane [O; {right arrow over (i)}; {right arrow over (j)}] of the orthogonal reference [O; {right arrow over (i)}; {right arrow over (j)}; {right arrow over (k)}] given in the figures).
By shadow effect, the parts 106a, 106b prevent a metal deposition on the perimeter of the slot.
It is thus possible to make a connecting element 104b along the slot, which is disconnected from the conducting elements 104a and 104c formed on said wall during the metal deposition.
Another example of a method for making an interconnect structure is provided in
The interconnect structure can be made from a support 200 can possibly be made up of several layers or several stacked substrates, for example two layers 200a, 200b or two substrates 200a, 200b, which can be assembled by gluing, for example, using a glue seam 211.
A cavity 303 in the form of a blind orifice is provided in the first substrate 200a. Vertical slots 105a, 105b, i.e. orthogonal to the main plane of the support 200, were formed at a wall of the cavity and communicate therewith. Portions of the glue seam 211 are exposed by the cavity 303.
In this embodiment, the first substrate 200a includes at least one metal track 404 on its rear face, i.e. the face situated opposite the second substrate 200b (
Sacrificial material is then deposited in the slots 105a, 105b, then metal material 414 is deposited in the cavity 303 and on the support 300.
The sacrificial material is then removed, then patterns are formed in the metal material, for example in a metal area 415 covering walls of the cavity 303, connected to a metal track 417a on the upper face of the support.
This step also leads to the formation of another metal area 416 separated from the metal area 415 by slots, covers a wall portion of the cavity situated between the slots 105a, 105b, and is extended by another metal track 417b formed on the upper face of the support (
The interconnect structure with a cavity that has just been formed can be integrated or assembled with another device.
This method can be done from the structure previously formed (and described in connection with
One or several vias 430 are then formed passing through the second support 200b as well as one or several connecting pads 432 on said support 200b, the pads being connected 432 to the vias (
An optical component C, for example a fixed focal lens, a parallel plate, or a variable focal device is then placed in the cavity 303 and connected to the conducting area 415 formed in said cavity (
An imager substrate is then attached on the upper face of the first substrate 200a, the imager substrate being assembled and connected to the metal tracks 417a, 417b formed on the upper face of the first substrate 200a (
An opening is then made in the second substrate 200b, opposite the optical component C (
An interconnect structure with a cavity as implemented according to the invention can be applied in the field of MEMS components, for example such as inertial sensors, accelerometers or gyrometers (
Contact rises are implemented in the cavity 303 to power said active optical element.
Number | Date | Country | Kind |
---|---|---|---|
09 57588 | Oct 2009 | FR | national |
Number | Name | Date | Kind |
---|---|---|---|
5825084 | Lau et al. | Oct 1998 | A |
5994763 | Ohmuro | Nov 1999 | A |
6137064 | Kiani et al. | Oct 2000 | A |
6891272 | Fjelstad et al. | May 2005 | B1 |
20020191380 | Val | Dec 2002 | A1 |
20030224559 | Gross | Dec 2003 | A1 |
20060081396 | Hsu | Apr 2006 | A1 |
20060130321 | Kwong et al. | Jun 2006 | A1 |
20070169961 | Kwong et al. | Jul 2007 | A1 |
20110086461 | Bolis | Apr 2011 | A1 |
Number | Date | Country |
---|---|---|
WO 0145172 | Jun 2001 | WO |
Entry |
---|
U.S. Appl. No. 13/039,902, filed Mar. 3, 2011, Jacquet et al. |
French Preliminary Search Report issued Jul. 5, 2010, in Patent Application No. FR 0957588. |
European Search Report issued Dec. 29, 2010, in Patent Application No. 10189285.9. |
European Search Report issued Dec. 29, 2010, in Patent Application No. 10189290.9. |
Nga P. Pham, et al., “Spin, Spray coating and Electrodeposition of photoresist for MEMS structures—A comparison”, DELFT University of Technology, Dimes, XP 7916419, Jan. 1, 2000, pp. 81-86. |
C. S. Premachandran, et al., “A Novel, Wafer-Level Stacking Method for Low-Chip Yield and Non-Uniform, Chip-Size Wafers for MEMS and 3D SIP Applications”, Electronic Components and Technology Conference, IEEE, 2008, pp. 314-318. |
Sebastian Sosin, et al., “Fabrication of Through-Substrate Cavities for Hybrid Wafer-Level Packaging”, MICRONED/MUFAC Program, Sep. 27, 2006, pp. 544-547. |
“3-Dimensional Circuitry”, Laser Direct Structuring Technology (LPKF-LDS™) for Moulded Interconnect Devices, LPKF Laser & Electronics, Jun. 22, 2009, pp. 1-12. |
U.S. Appl. No. 13/031,917, filed Feb. 22, 2011, Saint-Patrice, et al. |
U.S. Appl. No. 13/395,169, filed Mar. 9, 2012, Bolis, et al. |
U.S. Appl. No. 13/394,641, filed Mar. 7, 2012, Moreau, et al. |
Number | Date | Country | |
---|---|---|---|
20110097909 A1 | Apr 2011 | US |