The present invention relates to the field of semiconductor technology and, in particular, to a micro-electro-mechanical system (MEMS) package structure and a method for fabricating it.
The development of very-large-scale integration (VLSI) is leading to increasing shrinkage of critical dimensions of integrated circuits, imposing more and more stringent requirements on integrated circuit packaging techniques. In the market for MEMS sensor packages, MEMS dies have been widely used in smart phones, fitness wristbands, printers, automobiles, drones, head-mounted VR/AR devices and many other products. Common MEMS dies include, among others, those for pressure sensors, accelerometers, gyroscopes, MEMS microphones, optical sensors and catalytic sensors. A MEMS die is usually integrated with another die using a system in package (SiP) approach to form a MEMS device. Specifically, the MEMS die is usually fabricated on one wafer and integrated with an associated control circuit that is formed on another wafer. Currently, the integration is usually accomplished by either of the following two methods: 1) separately bonding the MEMS die-containing wafer and the control circuit-containing wafer to a single packaging substrate and electrically connecting the MEMS die to the control circuit through wiring the MEMS die-containing wafer and the control circuit-containing wafer to solder pads on the substrate; and 2) directly bonding the MEMS die-containing to control circuit-containing wafer with corresponding solder pads thereof forming electrical connections so as to achieve electrical connections between the control circuit and the MEMS die.
However, the above first integration method requires reserved areas for the solder pads, which are often large and thus unfavorable to miniaturization of the resulting MEMS device. MEMS dies with different functions (or structures) are fabricated generally with different processes, and it is usually only possible to fabricate MEMS dies of the same function (or structure) on a single wafer. Therefore, for the above second integration method, it is difficult to form MEMS dies of different functions on a single wafer using semiconductor processes, and it will be complicated in process, costly and bulky in size of the resulting MEMS device to separately bond wafers containing MEMS dies of different functions to wafers containing respective control circuits and then interconnect them together. Thus, the current integration methods for MEMS dies and the resulting MEMS packages structure still fall short in meeting the requirements of practical applications in terms of size and function integration ability.
It is an object of the present invention to provide a MEMS package structure with a reduced size and a method of fabricating such a package structure. It is another object of the present invention to provide a MEMS package structure with enhanced function integration ability.
In one aspect of the present invention, there is provided a MEMS package structure, comprising:
a device wafer having a first surface and a second surface opposite to the first surface, wherein the device wafer has a control unit, a first interconnection structure and a second interconnection structure arranged therein, the first and second interconnection structures electrically connected to the control unit; a first contact pad arranged on the first surface, wherein the first contact pad is electrically connected to the first interconnection structure; a MEMS die bonded to the first surface, wherein the MEMS die comprises a micro-cavity, a second contact pad configured to be coupled to an external electrical signal and a bonding surface in opposition to the first surface, the micro-cavity of the MEMS die having a through hole in communication with an exterior of the die, the first contact pad electrically connected to a corresponding second contact pad; a bonding layer positioned between the first surface and the bonding surface so as to bond the MEMS die to the device wafer, wherein an opening is formed in the bonding layer; and a rewiring layer arranged on the second surface, wherein the rewiring layer is electrically connected to the second interconnection structure second interconnection structure.
Optionally, the rewiring layer may comprise an input/output connection.
Optionally, a plurality of said MEMS dies may be bonded to the first surface, wherein the MEMS dies are categorized in the same or different types depending on a fabrication process thereof.
Optionally, a plurality of said MEMS dies may be bonded to the first surface, wherein the micro-cavity of each of the plurality of MEMS dies has a through hole in communication with the exterior, or the micro-cavity of at least one of the plurality of MEMS dies is a closed micro-cavity.
Optionally, the closed micro-cavity may be filled with a damping gas or be vacuumed.
Optionally, a plurality of said MEMS dies may be bonded to the first surface, and wherein the plurality of MEMS dies include at least two of: a gyroscope, an accelerometer, an inertial sensor, a pressure sensor, a displacement sensor, a humidity sensor, an optical sensor, a gas sensor, a catalytic sensor, a microwave filter, a DNA amplification microchip, a MEMS microphone and a micro-actuator.
Optionally, the control unit may comprise one or more MOS transistors.
Optionally, the first interconnection structure may comprise a first conductive plug extending through at least a partial thickness of the device wafer and electrically connected to the control unit, the first conductive plug having one end exposed at the first surface so as to be electrically connected to a corresponding first contact pad; and wherein the second interconnection structure comprises a second conductive plug extending through at least a partial thickness of the device wafer and electrically connected the control unit, the second conductive plug having one end exposed at the second surface so as to be electrically connected to the rewiring layer.
Optionally, the device wafer may be a grinded wafer.
Optionally, the first contact pad may be electrically connected to the corresponding second contact pad via an electrical bump, and wherein the electrical bump is positioned between the first contact pad and the corresponding second contact pad, and is exposed in the opening.
Optionally, the MEMS package structure may further comprise
an encapsulation layer located on the first bonding surface, wherein the encapsulation layer covers the MEMS die and fills the opening in the bonding layer, and wherein the through hole is exposed from the encapsulation layer.
Optionally, the bonding layer may comprise an adhesive material.
Optionally, the adhesive material may comprise a dry film.
In another aspect of the present invention, there is provided a method for fabricating a MEMS package structure, comprising:
providing a MEMS die and a device wafer for control of the MEMS die, wherein the device wafer has a first surface configured to bond the MEMS die, and wherein the device wafer has a control unit and a first interconnection structure electrically connected to the control unit formed therein; forming a first contact pad on the first surface, wherein the first contact pad is electrically connected to the first interconnection structure, wherein the MEMS die comprises a micro-cavity, a second contact pad configured to be coupled to an external electrical signal and a bonding surface, and wherein the micro-cavity of the MEMS die has a through hole in communication with an exterior of the die; bonding the MEMS die to the device wafer through a bonding layer positioned between the first surface and the bonding surface, wherein the bonding layer has an opening formed therein, wherein the first contact pad and a corresponding second contact pad are exposed in the opening; establishing an electrical connection between the first contact pad and the corresponding second contact pad; forming a second interconnection structure in the device wafer, wherein the second interconnection structure is electrically connected to the control unit; and forming a rewiring layer on a surface of the device wafer in opposition to the first surface, wherein the rewiring layer is electrically connected to the second interconnection structure.
Optionally, the first interconnection structure may comprise a first conductive plug, and wherein the first conductive plug extends through at least a partial thickness of the device wafer and is electrically connected to each of the control unit and the first contact pad.
Optionally, the second interconnection structure may comprise a second conductive plug, and wherein the second conductive plug extends through at least a partial thickness of the device wafer and is electrically connected to each of the control unit and the rewiring layer.
Optionally, establishing the electrical connection between the first contact pad and the corresponding second contact pad comprises: forming an electrical bump between the first contact pad and the corresponding second contact pad using an electroless plating process, wherein the electrical bump is exposed in the opening.
Optionally, the method may further comprise, prior to the formation of the electrical bump,
forming a sacrificial layer covering the through hole.
Optionally, the method may further comprise, subsequent to the formation of the electrical bump and prior to the formation of the second interconnection structure:
forming an encapsulation layer on the first bonding surface, wherein the encapsulation layer covers the MEMS die and fills the opening, with the sacrificial layer being exposed from the encapsulation layer; and removing the sacrificial layer so that the through hole is exposed.
The MEMS package structure provided in the present invention includes a device wafer and MEMS die. The device wafer has a control unit, a first interconnection structure and a second interconnection structure are arranged therein. The first and second interconnection structures are electrically connected to the control unit. A first contact pad is arranged on the first surface, wherein the first contact pad is electrically connected to the first interconnection structure and the MEMS die. The MEMS die comprises a micro-cavity, a second contact pad configured to be coupled to an external electrical signal and a bonding surface. The micro-cavity of the MEMS die has a through hole in communication with an exterior of the die. A rewiring layer is arranged on the second surface, wherein the rewiring layer is electrically connected to the second interconnection structure. The first contact pad is electrically connected to the second contact pad through an opening formed in a bonding layer. The MEMS package structure allows electrical interconnection between the MEMS die and the device wafer with a reduced package size, compared to those produced by existing integration techniques. Moreover, the MEMS package structure may include a plurality of MEMS dies of the same or different functions and structures. Therefore, in addition to size shrinkage, the MEMS package structure is also improved in terms of function integration ability. Arranging the rewiring layer and the MEMS die on each side of the device wafer is conducive to shrinkage of the MEMS package structure and allows lower rewiring and interconnection design complexity and improved reliability of the MEMS package.
As the MEMS package can be fabricated using the method provided in the present invention, the method can offer the same or similar advantages.
In these figures,
100: a device wafer; 100a: a first surface; 100b: a second surface; 101: a substrate; 102: an isolation structure; 103: a first dielectric layer; 104: a second dielectric layer; 210: a first MEMS die; 211: a first micro-cavity; 220: a second MEMS die; 221: a second micro-cavity; 221a: a through hole; 410: a first contact pad; 201: a second contact pad; 220a: a bonding surface; 230: a sacrificial layer; 300: an interconnection structure; 310: a first interconnection structure; 311: a first conductive plug; 320: a second interconnection structure; 321: a second conductive plug; 500: a bonding layer; 510: an opening; 501: an encapsulation layer; 600: an electrical bump; and 700: a rewiring layer.
The present invention will be described below in greater detail by way of particular embodiments with reference to the accompanying drawings. Features and advantages of the invention will be more apparent from the following description. Note that the accompanying drawings are provided in a very simplified form not necessarily drawn to exact scale, and their only intention is to facilitate convenience and clarity in explaining the disclosed embodiments.
In the following, the terms “first”, “second”, and so on may be used to distinguish between similar elements without necessarily implying any particular ordinal or chronological sequence. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Similarly, if a method is described herein as comprising a series of steps, the order of such steps as presented herein is not necessarily the only order in which such steps may be performed, and certain of the stated steps may possibly be omitted and/or certain other steps not described herein may possibly be added to the method. Identical components or features may be shown in different accompanying drawings, and not all such components and features are labeled in each drawing for the sake of visual clarity, even if they are readily identifiable in all the drawings.
Referring to
The MEMS package structure may include a plurality of said MEMS dies, which are bonded to the first surface 100a and are driven by, or operate under the control of, respective said control units arranged in the device wafer 100. The device wafer 100 may be formed, for example, by fabricating the plurality of control units in a substrate 101 (e.g., a silicon substrate), using a semiconductor process. The substrate 101 may be, among others, a silicon substrate or a silicon-on-insulator (SOI) substrate. Examples of materials from which the substrate 101 can be fabricated may also include germanium, silicon germanium, silicon carbide, gallium arsenide, indium gallium and other Group III and V compounds. Preferably, the substrate 101 is selected as a substrate allowing relatively easy semiconductor processing or integration. The control units may be formed on the basis of the substrate 101. Each control unit may include one or more MOS transistors, and in the latter case, adjacent said MOS transistors may be isolated from one another by isolation structure(s) 102 formed in the device wafer 100 (or in the substrate 101) and by an insulating material deposited on the substrate 101. Each isolation structure 102 may be, for example, a shallow trench isolation (STI) and/or deep trench isolation (DTI) structure. As an example, the control unit may control the MEMS die 200 by means of a control electrical signal output from a source/drain of one of the MOS transistor(s). In this embodiment, the device wafer 100 further comprises a first dielectric layer 103 formed on one of the surfaces of the substrate 101, and the source/drain of the control unit for outputting a control electrical signal (i.e., serving as an electrical connection terminal) is arranged in the first dielectric layer 103. On the other surface of the substrate 101, a second dielectric layer 104 is formed. Each of the first and second dielectric layers 103, 104 may be formed of at least one material selected from insulating materials including silicon oxide, silicon nitride, silicon carbide and silicon oxynitride. In this embodiment, the surface of the first dielectric layer 103 away from the substrate 101 may serve as the first surface 100a of the device wafer 100, and the surface of the second dielectric layer 104 away from the substrate 101 may serve as the second surface 100b of the device wafer 100.
In order to electrically interconnect the MEMS die and the control unit in the device wafer 100, in this embodiment, the interconnection structure 300 is provided in the device wafer 100, which is electrically connected to each of the first contact pad 410 on the first bonding surface 100a, the rewiring layer 700 and the control unit in the device wafer 100. Specifically, referring to
Each of the first and second interconnection structures 310, 320 may include, formed within the device wafer 100, two or more electrical contacts, electrical connection members and electrical connection lines formed therebetween. Referring to
This design with the first and second interconnection structures 310, 320 for leading an electrical signal from the control unit to the first and second surfaces 100a, 100b so as to accomplish the connection of the MEMS die with the device wafer 100 and the rewiring thereof on opposing sides of the device wafer 100. This is conducive to shrinkage of the MEMS package structure and allows lower rewiring and interconnection design complexity and improved reliability of the MEMS package.
In order to avoid adversely affecting the control unit in the device wafer 100, each of the first and second conductive plugs 311, 321 is preferably arranged in an isolating material in the device wafer 100. As shown in
The rewiring layer 700 that is arranged on the second surface 100b of the device wafer 100 and electrically connected to the second interconnection structure 320 may be formed of a conductive material. Specifically, as
Preferably, the rewiring layer 700 may include a rewiring connection that is electrically connected to the second interconnection structure 320 and an input/output connection for connecting the MEMS package structure to an external signal or device and thus allowing signal processing or control for the connected circuit. Additionally, the input/output connection may be electrically connected to the rewiring connection so that processing or control of a signal input to or output from the MEMS die is made possible by the rewiring connection, the second interconnection structure 320 and the control unit.
In case of a plurality of MEMS dies being integrated, they may be of the same or different functions, uses or structures. MEMS dies for various MEMS devices such as gyroscopes, accelerometers, inertial sensors, pressure sensors, humidity sensors, displacement sensors, gas sensors, catalytic sensors, microwave filters, optical sensors (e.g., MEMS scanning mirrors, ToF image sensors, photodetectors, vertical-cavity surface-emitting lasers (VCSEL), diffractive optical elements (DOE)), DNA amplification microchips, MEMS microphones, micro-actuators (e.g., micro-motors, micro-resonators, micro-relays, micro-optical/RF switches, optical projection displays, flexible skins, micro-pump/valves) can be fabricated on separate substrates (e.g., silicon wafers) using MEMS die fabrication processes well known in the art and then diced into individual MEMS dies. In this embodiment, at least two MEMS dies of different types may be selected. In practical implementations, depending on the design requirements or the intended use, a number or plurality of MEMS dies of different types may be selected and arranged on the first surface 100a of the device wafer 100. For example, MEMS dies of the same or different sensing functions may be bonded to the first surface 100a of the device wafer 100. Each of the plurality of MEMS dies 200 may have an opening in communication with the outside, or at least one of them may have a closed micro-cavity. It is to be understood that while the description of this embodiment focuses on the MEMS package structure including the device wafer 100 and a MEMS die arranged on the first surface 100a thereof, it does not imply that the MEMS package structure of the present embodiment is only made up of these components because the device wafer 100 may be further provided with one or more different chips arranged thereon or bonded thereto (e.g., memory chips, communication chips, processor chips, etc.), one or more different devices arranged thereon (e.g., power devices, bipolar devices, resistors, capacitors, etc.) and/or components and connection means well known in the art. The present invention is not limited to only one MEMS die being bonded to the device wafer 100, as two, three or more MEMS dies can be bonded thereto. In the latter case, structures and/or types of the plurality of MEMS dies may vary depending on the actual requirements. Here, in order to demonstrate improved function integration ability of the MEMS package structure of the present invention, the MEMS dies are preferred to be fabricated using fabricating processes that are not completely the same, or to be of functions (or uses) that are not completely the same.
As shown in
It is to be understood that while the description of this embodiment focuses on MEMS package structure includes the device wafer 100 and the MEMS dies arranged on its first surface 100a, it does not imply that the MEMS package structure of the present embodiment is only made up of these components because the device wafer 100 may be further provided with one or more different chips arranged thereon or bonded thereto (e.g., memory chips, communication chips, processor chips, etc.), one or more different devices arranged thereon (e.g., power devices, bipolar devices, resistors, capacitors, etc.) and/or components and connection means well known in the art. Further, each of the first and second contact pads 410, 220 mentioned in this embodiment may be a solder pad or other electrical connection.
In this embodiment, the MEMS die(s) may be bonded to the first surface 100a of the device wafer 100 by a bonding layer 500 (if a plurality of MEMS dies are present, they may be arranged on the first bonding surface 100a side by side). Specifically, each MEMS die may have a second contact pad 201 for coupling to an external electrical signal and a bonding surface 200a in opposition to the first surface 100a. In addition, the second contact pad 201 of the MEMS die may be electrically connected to an associated first contact pad 410 on the first surface 100a of the device wafer 100, for example, via an electrical bump 600 arranged between the first contact pad 410 and corresponding second contact pad 201. A plurality of electrical bumps 600 may be provided so as to connect second contact pad 201 of each MEMS die to corresponding first contact pad 410 of the device wafer 100.
The bonding layer 500 may be configured to fixedly bond the plurality of MEMS dies to the device wafer 100. Specifically, the bonding layer 500 may be arranged between the first surface 100a of the device wafer 100 and the bonding surfaces 200a of the MEMS dies. Openings 510 may be formed in the bonding layer 500, in which the respective electrical bumps 600 are exposed. As shown in
In this embodiment, the MEMS package structure may further include an encapsulation layer 501 on the first surface 100a of the device wafer 100. The encapsulation layer 501 covers the MEMS dies, fills the openings 510 in the bonding layer 500, and optionally covers other portions of the first surface 100a. However, the through hole 221a of the second micro-cavity 221 is exposed from the encapsulation layer 501, in order to allow the air inlet MEMS die to operate as expected.
The encapsulation layer 501 is provided to more firmly fix the MEMS dies to the device wafer 100 and protect them from external damage. The encapsulation layer 501 may be formed of, for example, a plastic material. For example, an injection molding process may be employed to fill the plastic material in gap(s) between the plurality of MEMS dies and fix the MEMS dies to the bonding layer 500. The plastic material of the encapsulation layer 501 may be in a softened or flowable form during the molding and may be molded in a predetermined shape. Alternatively, the material of the encapsulation layer 501 may solidify by chemical crosslinking. As an example, the material of the encapsulation layer 501 may include, for example, at least one of thermosetting resins including phenolic resins, urea-formaldehyde resins, formaldehyde-based resins, epoxy resins, polyurethanes and so on. Preferably, the material of the encapsulation layer 501 is selected as an epoxy resin, in which a filler may be added, as well as one or more of various additives (e.g., curing agents, modifiers, mold release agents, thermal color agents, flame retardants, etc.) For example, a phenolic resin may be added as a curing agent and a micro-powder consisting of solid silicon particles as a filler.
The MEMS package structure allows electrical interconnection between the MEMS die(s) and the device wafer 100 with a reduced package size, compared to those produced by existing integration techniques. In addition, a plurality of MEMS dies of the same or different functions (uses) and structures are allowed to be integrated on the same device wafer 100. Therefore, in addition to size shrinkage, the MEMS package structure is also improved in terms of function integration ability.
In embodiments of the present invention, there is provided a method for fabricating a MEMS package structure as defined above. Steps for fabricating the MEMS package structure are as follows:
step 1: providing a MEMS die and a device wafer for control of the MEMS die; the device wafer has a first surface, to which the MEMS die is to be bonded. A control unit and a first interconnection structure electrically connected to the control unit are formed in the device wafer.
step 2: forming a first contact pad on the first surface, which is electrically connected to the first interconnection structure; the MEMS die includes a micro-cavity, a second contact pad for coupling to an external electrical signal and a bonding surface; the micro-cavity of the MEMS die is provided with a through hole in communication with the outside of the die.
step 3: bonding the MEMS die to the device wafer by a bonding layer arranged between the first surface and the bonding surface; an opening is formed in the bonding layer, in which the first contact pad and the second contact pad are exposed.
step 4: establishing an electrical connection between the first and second contact pads.
step 5: forming a second interconnection structure in the device wafer, which is electrically connected to the control unit.
step 6: forming a rewiring layer on the surface of the device wafer opposing the first surface, which is electrically connected to the second interconnection structure.
A more detailed process for fabricating a MEMS package structure in accordance with embodiments of the present invention will be described with reference to
In this embodiment, instead of only one MEMS die, two or more MEMS dies (e.g., the first MEMS die 210 and the second MEMS die 220 with a second micro-cavity 221 provided with a through hole 221a in communication with the outside shown in
Specifically, in this embodiment, the device wafer 100 may include a substrate 101, which is a silicon substrate or silicon-on-insulator (SOI) substrate, for example. In this embodiment, a plurality of control units may be accordingly formed in the device wafer 100. The plurality of control units may be formed on the basis of the substrate 101 using an established semiconductor process in order to subsequently control the respective MEMS dies. Each control unit may consist of a set of CMOS control circuits. For example, each control unit may include one or more MOS transistors, and in the latter case, adjacent said MOS transistors may be isolated from one another by isolation structure(s) 102 formed in the substrate 101 (or in the device wafer 100) and by an insulating material deposited on the substrate 101. Each isolation structure 102 may be, for example, a shallow trench isolation (STI) and/or deep trench isolation (DTI) structure. The device wafer 100 may further include a first dielectric layer 103 on one surface of the substrate 101, and a connection terminal of each control unit for outputting a control electrical signal may be arranged in the first dielectric layer 103. Without limitation, the surface of the first dielectric layer 103 away from the substrate 101 may serve as the surface of the device wafer 100, to which the MEMS dies are bonded, i.e., the first surface 100a. In another embodiment, the MEMS dies may be bonded to another surface of the device wafer 100. The device wafer 100 may be fabricated using a method known in the art.
Each first interconnection structure 310 may include, formed within the device wafer 100, two or more electrical contacts, electrical connection members and electrical connection lines therebetween. In this embodiment, each first interconnection structure 310 in the device wafer 100 may include a first conductive plug 311 (i.e., a plurality of such first conductive plugs 311 in case of a plurality of MEMS dies being integrated), which penetrates through at least a partial thickness of the device wafer 100 and is electrically connected to the control unit in the device wafer 100. The first conductive plug 311 may be formed of a conductive material selected as a metal or alloy containing cobalt, molybdenum, aluminum, copper, tungsten or the like, or as a metal silicide (e.g., titanium silicide, tungsten silicide, cobalt silicide, or the like), a metal nitride (e.g., titanium nitride), doped polysilicon, or the like. In this embodiment, the material of the first conductive plug 311 is selected as copper, and the end face of the first conductive plug 311 close to the first surface 100a of the device wafer 100 is processed by a copper CMP process so as to be flush with the first surface 100a.
The plurality of MEMS dies may be of the same or different functions, uses or structures. In this embodiment, in order for the MEMS package structure to be versatile or multi-functional, the MEMS dies to be integrated are preferably of two or more different types. For example, the MEMS dies 200 may be at least two selected from those for a gyroscope, an accelerometer, an inertial sensor, a pressure sensor, a flow sensor, a displacement sensor, a humidity sensor, an optical sensor, a gas sensor, a catalytic sensor, a microwave filter, a DNA amplification microchip, a MEMS microphone and a micro-actuator. In this embodiment, each MEMS die may be an independent chip (or die) with a micro-cavity serving as a sensing component and a second contact pad 201 for receiving an external electrical signal (for controlling operation of the MEMS die). In the MEMS dies 200, all the micro-cavities 210 may be brought into communication with the outside (e.g., the atmosphere). Alternatively, the micro-cavities 210 of part of the MEMS dies may be brought into communication with the outside of the die, while the remaining one(s) may be closed. In the example of
In case of a plurality of MEMS dies being integrated, a plurality of said first contact pads 410 may be formed using the same film-forming and patterning process. For example, a metal layer may be deposited on the first surface 100a of the device wafer 100. The metal layer may be formed of the same material as that of the first conductive plug 311 by physical vapor deposition (PVD), atomic layer deposition (ALD) or chemical vapor deposition (CVD) and then patterned to form the first contact pads 410. The first contact pads 410 are electrically connected to the respective first interconnection structures 310 to allow external connection of electrical signals from the control units. Depending on the design requirements, in case of a plurality of MEMS dies being integrated, a plurality of first contact pads 410 may be formed on the first surfaces 100a and electrically interconnected.
Optionally, the bonding of the MEMS dies to the device wafer 100 may be accomplished with, for example, a fusing bonding process or vacuum bonding process. In this case, the bonding layer 500 may be formed of a bonding material (e.g., silicon oxide). Alternatively, the bonding of the MEMS dies to the device wafer 100 may be accomplished by both a bonding process and a light (or thermal) curing process. In this case, the bonding layer 500 may include an adhesive material, in particular, a die attach film or a dry film. The plurality of MEMS dies may be bonded one by one, or the plurality of MEMS dies may be transferred to one or more carrier plates and then bonded onto the device wafer 100 at the same time or in batches.
In an optional embodiment, during the bonding of the MEMS dies to the device wafer 100, the bonding material may be applied only to intended locations of the device wafer 100 such that the second contact pads 201 and the corresponding first contact pads 410 remain exposed, thus resulting in the formation of the openings 510 in the bonding layer 500. In an alternatively embodiment, during the bonding of the MEMS dies to the device wafer 100, the bonding material may be applied to both the first surface 100a of the device wafer 100 and the bonding surfaces 200a of the MEMS dies, followed by the formation of the openings 510 in which the second contact pads 201 and the respective first contact pads 410 are exposed, for example, using a dry etching process. The openings 510 in the bonding layer 500 are formed in order to enable connection of the first contact pads 410 connected to the control units in the device wafer 100 to the respective second contact pads 201 in the MEMS dies between the first surface 100a and the bonding surface 200a.
In this embodiment, the first contact pads 410 and the respective second contact pad 201 are exposed in the openings 510 formed in the bonding layer 500, and electrical bumps 600 may be formed between the first and second contact pads 410, 201 to connect them together. The electrical bumps 600 may be so formed that they do not fill up the openings 510 and are thus exposed therein.
The formation of the electrical bumps 600 may be accomplished using an electroless plating involving, for example, placing the device wafer 100 with the plurality of MEMS dies bonded thereon and with the openings 510 formed in the bonding layer 500 into a solution containing metal ions (e.g., a solution for electroless plating of silver, nickel, copper or the like), where the metal ions are reduced by a strong reducing agent into the corresponding metal which is deposited onto the first contact pads 410 and the respective second contact pads 201 exposed in the openings 510. After the lapse of a certain length of time, the metal connects the first contact pad 410 to the respective second contact pads 201, thus resulting in the formation of the electrical bumps 600. Examples of suitable materials for the electrical bumps 600 may include one or more of copper, nickel, zinc, tin, silver, gold, tungsten and magnesium. The electroless plating process may further involve, before the placement into the solution containing metal ions, depositing a seed layer at intended locations in the openings 510 where the electrical bumps 600 are to be formed.
Forming the electrical bumps 600 between the first surface 100a and the bonding surfaces 200a enables electrical connection between the first contact pads 410 and the respective second contact pads 201 without the need for wire bonding. This is conducive to size shrinkage of the MEMS package structure and can improve its reliability by not affecting the inside of the device wafer 100.
Examples of suitable materials for the encapsulation layer 501 may include: inorganic insulating materials, such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, etc.; thermoplastic resins, such as polycarbonate, polyethylene terephthalate, polyethersulfone, polyphenylether, polyamides, polyetherimides, methacrylic resins, cyclic polyolefin based resins, etc.; thermosetting resins, such as epoxy resins, phenolic resins, urea-formaldehyde resins, formaldehyde-based resins, polyurethanes, acrylic resins, vinyl ester resins, imide based resins, urea resins, melamine resins, etc.; and organic insulating materials, such as polystyrene, polyacrylonitrile, etc. The encapsulation layer 501 may be formed using, for example, a chemical vapor deposition process or an injection molding process. Preferably, the formation of the encapsulation layer 501 further involves a planarization process performed on the side of the device wafer 100 with the bonding layer 500, which results in the exposure of the sacrificial layer 230 covering the opening 210a from the encapsulation layer 501. As a result, the sacrificial layer 230 can be directly removed subsequently to uncover the through hole 221a for the second micro-cavity 221. Further, the planarized encapsulation layer 501 may provide support for the subsequent formation of the second interconnection structures and the rewiring layers on the side opposing the first surface 100a.
In order to reduce the size of the MEMS package structure, in this embodiment, prior to the formation of the second interconnection structures, the device wafer 100 may thinned from the thickness direction thereof in opposition to the first surface 100a. In particular, the thinning may be accomplished with a back-grinding process, a wet etching process or a hydrogen ion implantation process. In this embodiment, the substrate 101 may be thinned from the side thereof opposing the first surface 100a until it becomes flush with the isolation structures 102 therein.
In order to optimize the thinned side with enhanced adhesion of the subsequently formed rewiring layers and reduced surface defects, subsequent to the thinning of the substrate 101, a dielectric material may be deposited onto the thinned surface of the device wafer 100, thus resulting in the formation of a second dielectric layer 104, as shown in
Each second interconnection structure 320 may include two or more electrical contacts, electrical connection members and electrical connection lines each connecting any two of the above, which are all formed in the device wafer 100. In this embodiment, each second interconnection structure 320 includes a second conductive plug 321 (i.e., a plurality of such second conductive plugs 321 in case of a plurality of MEMS dies being integrated) formed in the device wafer 100. The second conductive plug 321 extends through at least a partial thickness of the device wafer 100 and is electrically connected to a respective one of the control units. In addition, the second conductive plug 320 is exposed at one end at the second surface 100b so as to be connected to a respective one of the subsequently formed rewiring layers. Preferably, each second interconnection structure 320 extends through an isolation structure 102 in the device wafer 100 in order to avoid adversely affecting the respective control unit. The first and second plugs 310, 320 may be fabricated using any suitable method known in art, and a description thereof will be omitted herein for the sake of brevity. Such first and second interconnection structures 310, 320 may form the interconnection structure 300 in the device wafer 100.
Specifically, the rewiring layers 700 may reside on the second dielectric layer 104 and come into contact with the second conductive plugs 320 so as to be electrically connected to the second interconnection structures 320. For example, a metal layer may be deposited by physical vapor deposition (PVD), atomic layer deposition (ALD) or chemical vapor deposition (CVD) over the second surface 100b of the device wafer 100 and then patterned to form the rewiring layers 700. Depending on the design requirements, the resulting rewiring layers 700 may include rewiring connections which lead out the electrical contacts for the MEMS dies and thus enable electrical interconnection between the MEMS dies and the device wafer 100 and between the MEMS dies themselves. The rewiring layers 700 may further include input/output connections (not shown) configured to connect the MEMS packages structure to external signals or devices and thus allow signal processing or control for the connected circuits.
The MEMS package resulting from the above steps is shown in
In the method of fabricating a MEMS package structure according to the above embodiment, a plurality of MEMS dies (at least one of which has a micro-cavity provided with a through hole in communication with the outside) are integrated on the same device wafer 100, with rewiring layers 700 being formed on the side of the device wafer 100 opposite to the MEMS dies. This allows a reduced package structure size, compared with those produced by existing integration techniques. In addition, the plurality of MEMS dies integrated on the same device wafer may be of the same or different functions (uses) and structures. Therefore, in addition to size shrinkage, the MEMS package structure is also improved in terms of function integration ability. Arranging the rewiring layer and the MEMS die on opposing sides of the device wafer is conducive to shrinkage of the MEMS package structure and allows lower rewiring and interconnection design complexity and improved reliability of the MEMS package structure. This is helpful in addressing the requirements of practical applications in terms of integration, portability and performance of MEMS packages structure containing MEMS dies.
Described above are merely several preferred embodiments of the present invention, which are not intended to limit the present invention in any sense. In light of the principles and teachings hereinabove, any person of skill in the art may make various possible variations and changes to the disclosed embodiments, without departing from the scope of the invention. Accordingly, any and all such simple variations, equivalent alternatives and modifications made to the foregoing embodiments without departing from the scope of the invention are intended to fall within the scope thereof.
Number | Date | Country | Kind |
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201811615849.4 | Dec 2018 | CN | national |
Filing Document | Filing Date | Country | Kind |
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PCT/CN2019/115606 | 11/5/2019 | WO | 00 |