Information
-
Patent Application
-
20230299032
-
Publication Number
20230299032
-
Date Filed
March 21, 20222 years ago
-
Date Published
September 21, 2023a year ago
-
Inventors
-
Original Assignees
-
CPC
-
-
International Classifications
Abstract
Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. In some embodiments, a microelectronic assembly may include a die having a first conductive contact on a surface; a substrate having a second conductive contact on a surface; and an interconnect electrically coupling the first conductive contact of the die and the second conductive contact of the substrate, wherein the interconnect includes a portion of a nanowire on the second conductive contact and an intermetallic compound (IMC) surrounding at least a portion of the nanowire on the second conductive contact.
Claims
- 1. A microelectronic assembly, comprising:
a die having a first conductive contact on a surface;a substrate having a second conductive contact on a surface; andan interconnect electrically coupling the first conductive contact of the die and the second conductive contact of the substrate, wherein the interconnect includes a portion of a nanowire on the second conductive contact and an intermetallic compound (IMC) surrounding at least a portion of the nanowire on the second conductive contact.
- 2. The microelectronic assembly of claim 1, wherein a material of the nanowire includes copper, nickel, gold, silver, or palladium, or an alloy thereof.
- 3. The microelectronic assembly of claim 1, wherein the IMC extends from the first conductive contact to the second conductive contact.
- 4. The microelectronic assembly of claim 1, further including an underfill material around the interconnect.
- 5. The microelectronic assembly of claim 1, wherein the interconnect further includes a solder material between the IMC and the second conductive contact.
- 6. The microelectronic assembly of claim 5, wherein the solder material includes tin; tin and silver; tin and bismuth; tin, silver, and bismuth; indium; indium and tin; antimony; or gallium.
- 7. The microelectronic assembly of claim 5, wherein the IMC is a first IMC, and wherein the interconnect further includes a second IMC between the solder material and the second conductive contact.
- 8. The microelectronic assembly of claim 1, wherein the interconnect is one of a plurality of interconnects and a pitch of the plurality of interconnects is between 3 microns and 20 microns.
- 9. The microelectronic assembly of claim 1, wherein the substrate includes a first surface with a third conductive contact and an opposing second surface with the second conductive contact, and the microelectronic assembly further includes:
a circuit board electrically coupled to the third conductive contact on the first surface of the substrate.
- 10. A microelectronic assembly, comprising:
a microelectronic component having a first conductive contact with nanowires extending from a surface of the first conductive contact;a substrate having a second conductive contact; andan interconnect electrically coupling the first conductive contact of the microelectronic component and the second conductive contact of the substrate, wherein the interconnect includes an intermetallic compound (IMC) surrounding at least a portion of the nanowires on the first conductive contact.
- 11. The microelectronic assembly of claim 10, wherein a material of the nanowires includes copper, nickel, gold, silver, or palladium, or an alloy thereof.
- 12. The microelectronic assembly of claim 10, wherein the IMC extends from the first conductive contact to the second conductive contact.
- 13. The microelectronic assembly of claim 10, wherein the interconnect further includes a solder material between the IMC and the second conductive contact, and wherein the solder material includes tin; tin and silver; tin and bismuth; tin, silver, and bismuth; indium; indium and tin; antimony; or gallium.
- 14. The microelectronic assembly of claim 10, wherein the interconnect is one of a plurality of interconnects and a pitch of the plurality of interconnects is between 3 microns and 20 microns.
- 15. The microelectronic assembly of claim 10, wherein the microelectronic component is a die selected from the group consisting of a central processing unit, a platform controller hub, a memory die, a field programmable gate array silicon die, and graphic processing unit.
- 16. A method for fabricating a microelectronic assembly, the method comprising:
electroplating nanowires on a first conductive contact on a first component;depositing a solder material on a second conductive contact on a second component;melting the solder material on the second conductive contact;placing the nanowires of the first conductive contact in contact with the solder material of the second conductive contact; andforming an interconnect between the first component and the second component that includes an intermetallic compound surrounding the nanowires on the first conductive contact.
- 17. The method of claim 16, wherein the first component is a substrate and the second component is a die.
- 18. The method of claim 16, wherein the first component is a die and the second component is a substrate.
- 19. The method of claim 16, wherein a material of the nanowires includes copper, nickel, gold, silver, or palladium, or an alloy thereof.
- 20. The method of claim 16, wherein the solder material includes tin; tin and silver; tin and bismuth; tin, silver, and bismuth; indium; indium and tin; antimony; or gallium.