Semiconductor package and method for fabricating the same

Abstract

A semiconductor package and a method for fabricating the same are provided. The method includes providing a substrate having recognition points and a heat sink having openings, and placing the heat sink on the substrate with the recognition points being exposed through the openings; using a checking system to inspect the recognition points through the openings so as to ensure that the heat sink is placed at a predetermined position on the substrate; and attaching the heat sink to the substrate via an adhesive. By the above semiconductor package and method, there is no need to form positioning holes in the substrate such that any adverse effect on the circuit layout and reliability of the semiconductor package is avoided, and any positional shifting of the heat sink relative to the substrate can be determined in a real time manner.

Description

BRIEF DESCRIPTION OF DRAWINGS

The present invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:

FIG. 1 (PRIOR ART) is a cross-sectional view of a semiconductor package having a heat sink attached to a substrate by an adhesive as disclosed in U.S. Pat. No. 6,552,428;

FIG. 2 (PRIOR ART) is a cross-sectional view of a semiconductor package disclosed in U.S. Pat. No. 6,528,876, wherein a heat sink is attached to a substrate by engaging protrusions of the heat sink with positioning holes of the substrate;

FIGS. 3A and 3B (PRIOR ART) are cross-sectional diagrams showing a method of using location pins to secure a heat sink in position on a substrate as disclosed in Taiwanese Patent No. I231018;

FIGS. 4A to 4H are schematic diagrams showing a semiconductor package and a method for fabricating the same in accordance with a first preferred embodiment of the present invention; and

FIG. 5 is a top view of a semiconductor package in accordance with a second preferred embodiment of the present invention.

Claims

1. A method for fabricating a semiconductor package, the method comprising the steps of: providing a substrate and a heat sink, and placing the heat sink on the substrate, wherein the substrate is formed with recognition points thereon and the heat sink has openings through which the recognition points are exposed;having a checking system inspect the recognition points on the substrate through the openings of the heat sink, so as to ensure that the heat sink is placed at a predetermined position on the substrate; andattaching the heat sink to the substrate by an adhesive.

2. The method of claim 1, wherein the recognition points are formed by electroplating a metal on the substrate.

3. The method of claim 1, wherein the recognition points are shaped as round dots.

4. The method of claim 1, wherein the recognition points are shaped as crosses.

5. The method of claim 1, wherein the checking system is a charge coupled device (CCD).

6. The method of claim 1, wherein the heat sink comprises a flat portion, and supporting portions integrally connected to the flat portion and elevating the flat portion to a predetermined height.

7. The method of claim 6, wherein the openings are formed in the supporting portions of the heat sink.

8. The method of claim 6, wherein the substrate is mounted with a chip thereon, and the chip is electrically connected to the substrate and is received in a space between the substrate and the flat portion of the heat sink.

9. A semiconductor package comprising: a substrate formed with recognition points thereon; anda heat sink mounted on the substrate and having openings through which the recognition points on the substrate are exposed.

10. The semiconductor package of claim 9, wherein the recognition points comprise a metal electroplated on the substrate.

11. The semiconductor package of claim 9, wherein the recognition points are shaped as round dots.

12. The semiconductor package of claim 9, wherein the recognition points are shaped as crosses.

13. The semiconductor package of claim 9, wherein the heat sink comprises a flat portion, and supporting portions integrally connected to the flat portion and elevating the flat portion to a predetermined height.

14. The semiconductor package of claim 13, wherein the openings are formed in the supporting portions of the heat sink.

15. The semiconductor package of claim 13, further comprising a chip mounted on and electrically connected to the substrate, wherein the chip is received in a space between the substrate and the flat portion of the heat sink.