Reference is made to commonly assigned U.S. patent application Ser. No. 14/743,788 to Bower et al., entitled Micro Assembled LED Displays and Lighting Elements and filed Jun. 18, 2015, U.S. patent application Ser. No. 14/822,864 to Prevatte et al., entitled Chiplets with Connection Posts and filed Aug. 10, 2015, U.S. patent application Ser. No. 14/807,226 to Cok et al., entitled Parallel Redundant Chiplet System and filed Jul. 23, 2015, U.S. Provisional Patent Application No. 62/317,107 to Bower et al., entitled Pressure Activated Electrical Interconnection by Micro-Transfer Printing and filed Apr. 1, 2016, and U.S. patent application Ser. No. 15/040,810 to Cok et al., entitled Matrix-Addressed Device Repair and filed Feb. 10, 2016, the disclosures of which are incorporated herein by reference in their entirety.
The present invention relates to structures and methods for providing robust and repairable transfer printed (e.g., micro-transfer printed) electronic systems.
Substrates with electronically active components distributed over the extent of the substrate may be used in a variety of electronic systems, for example, flat-panel imaging devices, such as liquid crystal, organic light-emitting diode (OLED), or inorganic light-emitting diode (iLED) display devices, and solar cells.
One method used to distribute electronically active circuits over substrates includes sputtering a thin semiconductor layer over the substrate and then patterning the semiconductor layer to form electronically active circuits distributed over the substrate. This technique, although widely used in the display industry, has performance limitations. Despite processing methods used to improve the performance of thin-film transistors, such transistors may provide performance that is lower than the performance of other integrated circuits formed in mono-crystalline semiconductor material. Semiconductor material and active components can be provided only on portions of the substrate, leading to wasted material and increased material and processing costs. The choice of substrate materials can also be limited by the processing steps necessary to process the semiconductor material and the photo-lithographic steps used to pattern the active components. For example, plastic substrates have a limited chemical and heat tolerance and do not readily survive photo-lithographic processing. Furthermore, the manufacturing equipment used to process large substrates with thin-film circuitry is relatively expensive. Other substrate materials that may be used include quartz, for example, for integrated circuits using silicon-on-insulator structures as described in U.S. Patent Publication No. 2010/0289115 and U.S. Patent Publication No. 2010/0123134. However, such substrate materials can be more expensive, limited in size, or difficult to process.
In other manufacturing techniques, a mono-crystalline semiconductor wafer is employed as the substrate. While this approach can provide substrates with the same performance as integrated circuits, the size of such substrates may be limited, for example to a 12-inch diameter circle, the wafers are relatively expensive compared to other substrate materials such as glass, polymer, or quartz, and the wafers are rigid.
An alternative method used to distribute electronically active circuits over substrates includes forming the components on separate source wafers, removing them from the source wafers, and placing the components on the desired substrate. In this case, a variety of assembly technologies for device packaging may be used, for example, pick-and-place technologies for integrated circuits provided in a variety of packages such as pin-grid arrays, ball-grid arrays, and flip-chips. However, these techniques may be limited in the size of the integrated circuits that can be placed so that the integrated circuits and their packaging can be larger and more expensive than is desired.
Other methods for transferring active components from a source wafer to a desired substrate are described in U.S. Pat. No. 7,943,491. In certain embodiments of these methods, small integrated circuits are formed on a semiconductor wafer. The small integrated circuits, or chiplets, are released from the wafer by etching a layer formed beneath the circuits. A stamp, for example a PDMS stamp, is pressed against the wafer and the process side of the chiplets is adhered to the stamp. The chiplets on the stamp are pressed against a destination substrate or backplane and adhered to the destination substrate. U.S. Pat. No. 8,722,458 entitled Optical Systems Fabricated by Printing-Based Assembly teaches, inter alia, transferring light-emitting, light-sensing, and light-collecting semiconductor elements from a wafer substrate to a destination substrate or backplane.
In some cases, the source wafer or destination substrate can have particulate contamination that inhibits element transfer from the source wafer to the destination substrate by the stamp, for example due to process abnormalities or undesired particles on the stamp, the source wafer, or the destination substrate. It is also possible that the elements themselves are defective due to materials or manufacturing process errors in the wafer. Such problems can reduce manufacturing yields, increase product costs, and necessitate expensive repair or rework operations.
Electrical connections between the small integrated circuits and the backplane contact pads are typically made by photolithographic processes in which a metal is evaporated or sputtered onto the small integrated circuits and the destination substrate to form a metal layer, the metal layer is coated with a photoresist that is exposed to a circuit connection pattern, and the metal layer and photoresist are developed by etching and washing to form the patterned electrical connections between the small integrated circuits and the connection pads on the destination substrate. Additional layers, such as interlayer dielectric insulators can also be required. This process is expensive and requires a number of manufacturing steps. Moreover, the topographical structure of the small integrated circuits over the destination substrate renders the electrical connections problematic, for example it can be difficult to form a continuous conductor from the destination substrate to the small integrated circuit because of the differences in height over the surface between the small integrated circuits and the destination substrate.
Surface-mount devices (SMDs) are an alternative way to provide electrical elements on a substrate or backplane. Such devices, as their name suggests, include electrical connections that are typically placed on the surface and in contact with a backplane rather than including pins that extend through vias in the backplane. Surface-mount technology (SMT) is widely used in the electronics industry to provide high-density printed-circuit boards (PCBs). In particular, a well-developed and inexpensive infrastructure exists for making and integrating two-terminal surface-mount devices, such as resistors or capacitors, into printed circuit boards. However, the smallest surface-mount device readily available is several hundred microns long and wide, precluding their use for applications requiring integrated circuits with circuit elements having a size of several microns, or less, for example.
There is a need, therefore, for structures and methods that enable the electrical interconnection of small integrated circuits (chiplets) at a high resolution, such as transfer printed chiplets, to destination substrates in a cost-effective and robust way with excellent yields.
In accordance with certain embodiments of the present invention, a repaired micro-transfer-printed system includes a system substrate with two or more contact pads disposed on the system substrate. One or more micro-transfer printed devices, each having two or more connection posts, are disposed in contact with the contact pads or system substrate. Each connection post is in physical contact with a contact pad and forms a second imprint in the physically contacted contact pad. A first imprint is present in at least one of the physically contacted contact pads that is between the device and the system substrate.
In certain embodiments, the system is an electronic system, the connection posts are electrically conductive connection posts, and the device is an electronic device responsive to electrical signals received through the connection posts or providing electrical signals through the connection posts.
In some embodiments, each of the contact pads extend beyond the device. In some embodiments, the contact pads are covered by the device. The device can include at least a portion of a tether. The connection posts can pierce or deform the contact pads that they physically contact. The device can include one or more micro-transfer printed integrated circuits, each micro-transfer printed integrated circuit having a fractured, broken, or separated tether.
In some embodiments, an adhesive adheres the device to the system substrate. The adhesive can be a non-conductive adhesive or a conductive adhesive adhering a connection post to a contact pad.
According to certain embodiments of the present invention, a method of making a system comprises providing a system substrate with two or more contact pads disposed on the system substrate, providing one or more source wafers each having one or more micro-transfer printed devices disposed thereon, each device having two or more connection posts, transfer printing (e.g., micro-transfer printing) one or more devices from one or more source wafers to the contact pads with a transfer stamp having a corresponding one or more transfer stamp pillars so that each connection post physically contacts a contact pad and forms a first imprint in the physically contacted contact pad, removing at least one defective device from the contact pads or system substrate to provide at least one exposed, imprinted contact pad having the first imprint, and transfer printing (e.g., micro-transfer printing) a replacement device from a source wafer to the contact pads so that at least one connection post physically contacts the exposed, imprinted contact pad to form a second imprint. In certain embodiments, the first imprint is covered by the replacement device.
In some embodiments, the transfer printed devices are tested to determine one or more defective devices.
Removing a defective device from the system substrate can include providing a removal stamp having a removal stamp pillar and dislodging the defective device from the contact pads with the removal stamp pillar by contacting the defective device with the removal stamp pillar. The defective device can be removed from the system substrate by translating the removal stamp pillar over the surface of the system substrate. The removal stamp pillar can have a structured distal end with a cavity having a cavity size that is larger than the defective device and the method including locating the defective device within the cavity. Removal methods such as laser removal or capacitive discharge can be used.
The device can have an edge that extends an edge length in a direction substantially parallel to the system substrate surface and the removal stamp pillar can have a side with a length equal to or greater than the edge length. The defective device can have a length greater than a width and the removal stamp pillar can contact the defective device along at least a portion of the length of the defective device.
The removal stamp pillar can have an adhesive distal end having an adhesion greater than the adhesion of a transfer stamp pillar to the defective device so that the removal stamp pillar can remove and hold a defective device. The removal stamp pillar can be harder than the transfer stamp pillar. The removal stamp can have only one pillar. The removal stamp pillar can have a channel through which compressed gas can be expelled or through which a partial vacuum can be applied to adhere the defective device to the removal stamp pillar.
In certain embodiments, a method includes blowing a gas onto the defective device or sucking up the defective device with at least a partial vacuum.
In certain embodiments, the present invention enables, inter alia, large arrays of devices on a system substrate that are subject to manufacturing variability and provides simple and robust electrical interconnections. The devices can be transfer printed to a system substrate at a relative high resolution.
In one aspect, the present invention is directed to a repaired transfer-printed system, comprising: a system substrate; two or more contact pads disposed on the system substrate; one or more transfer printed devices, each device comprising two or more connection posts, wherein each connection post is in physical contact with a contact pad of the two or more contact pads and forms a second imprint in the contact pad; and a first imprint in at least one of the physically contacted contact pads that is between the device and the system substrate.
In certain embodiments, the system is an electronic system, the connection posts are electrically conductive connection posts, and the device is an electronic device (i) responsive to electrical signals received through the connection posts or (ii) providing electrical signals through the connection posts.
In certain embodiments, the contact pads extend beyond each of the one or more devices. In certain embodiments, the contact pads are covered by each of the one or more devices.
In certain embodiments, each of the one or more devices comprises at least a portion of a tether.
In certain embodiments, each of the two or more connection posts of each device pierce or deform each contact pad that they physically contact. In certain embodiments, each of the two or more connection posts of each device is a multi-layer connection post comprising an electrically conductive layer disposed on a dielectric core.
In certain embodiments, the system comprises a non-conductive adhesive adhering each of the one or more devices to the system substrate. In certain embodiments, the system comprises a conductive adhesive adhering a connection post of the one or more devices to a contact pad of the two or more contact pads.
In certain embodiments, the device comprises one or more micro-transfer printed integrated circuits, each micro-transfer printed integrated circuit having a fractured, broken, or separated tether.
In another aspect, the present invention is directed to a method of making a system, comprising: providing a system substrate with two or more contact pads disposed on the system substrate; providing one or more source wafers each having one or more micro-transfer printable devices disposed thereon, each device comprising two or more connection posts; micro-transfer printing one or more devices from each of the one or more source wafers to the two or more contact pads with a transfer stamp comprising a corresponding one or more transfer stamp pillars such that each connection post physically contacts a contact pad of the two or more contact pads and forms a first imprint in the physically contacted contact pad; removing a defective device from the two or more contact pads to provide at least one exposed, imprinted contact pad comprising the first imprint; and micro-transfer printing a replacement device from one of the one or more source wafers to the two or more contact pads such that at least one connection post physically contacts the exposed, imprinted contact pad to form a second imprint.
In certain embodiments, the first imprint is covered by the replacement device.
In certain embodiments, the method comprises testing the one or more devices after micro-transfer printing to determine one or more defective devices.
In certain embodiments, removing the defective device from the two or more contact pads comprises: providing a removal stamp comprising a removal stamp pillar; and dislodging the defective device from the contact pads with the removal stamp pillar by contacting the defective device with the removal stamp pillar.
In certain embodiments, the defective device is removed from the two or more contact pads by translating the removal stamp pillar over a surface of the system substrate.
In certain embodiments, the removal stamp pillar has a structured distal end comprising a cavity having a cavity size that is larger than the defective device and removing the defective device from the two or more contact pads comprises locating the defective device within the cavity.
In certain embodiments, the defective device has an edge that extends an edge length in a direction substantially parallel to the system substrate surface and wherein the removal stamp pillar has a side with a length equal to or greater than the edge length.
In certain embodiments, the defective device has a length greater than a width and removing the defective device from the two or more contact pads comprises contacting the removal stamp pillar to the defective device along at least a portion of the length of the defective device.
In certain embodiments, the removal stamp pillar has an adhesive distal end having an adhesion greater than an adhesion of a transfer stamp pillar of the transfer stamp to the defective device. In certain embodiments, the removal stamp pillar is harder than one or more transfer stamp pillars of the transfer stamp. In certain embodiments, the removal stamp comprises only one pillar.
In certain embodiments, the removal stamp pillar comprises a channel through which compressed gas can be expelled or through which a partial vacuum can be applied to adhere the defective device to the removal stamp pillar. In certain embodiments, removing the defective device comprises blowing a gas onto the defective device or sucking up the defective device with at least a partial vacuum.
The foregoing and other objects, aspects, features, and advantages of the present disclosure will become more apparent and better understood by referring to the following description taken in conjunction with the accompanying drawings, in which:
The features and advantages of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, in which like reference characters identify corresponding elements throughout. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The figures are not drawn to scale since the variation in size of various elements in the Figures is too great to permit depiction to scale.
The present invention provides, inter alia, structures and methods that enable large, high-yield, cost-effective, and electrically connected arrays of relatively small integrated circuit chiplets or assemblies at a high resolution on a relatively large destination substrate despite materials and manufacturing process variability and contamination.
Referring to
At least one of the physically contacted contact pads 50 has a first imprint 60 that is between the device 20 and system substrate 10 so that the at least one first imprint 60 is covered by the device 20 over the system substrate 10. An adhesive 70 can be located between the device 20 and the system substrate 10 to adhere the device 20 to the system substrate 10. The adhesive 70 can be in a patterned layer (as shown in
In some embodiments, a system 99 is an electronic system, connection posts 40 are electrically conductive connection posts, and a device 20 is an electronic device (i) responsive to electrical signals received through the connection posts 40 or (ii) providing electrical signals through the connection posts 40. In some embodiments, a device 20 responds to electrical signals with an optical or electrical response. Referring again to
A first or second imprint 60, 62 is a mark, hole, protrusion, or deformation in a contact pad 50 formed by pressure from a connection post 40 impressed upon the contact pad 50, for example by transfer printing (e.g., micro-transfer printing) the device 20 connected to the connection post 40. A system substrate 10 is any structure with a surface 84 on which contact pads 50 can be formed and onto which devices 20 can be transfer printed (e.g., micro-transfer printed). Suitable system substrates 10 can be, for example, display, glass, plastic, ceramic, or other available substrates. Contact pads 50 can be portions of a patterned electrically conductive metal layer formed on a system substrate 10, for example, using photolithographic methods and materials useful in printed circuit boards or flat-panel displays. Devices 20 can be electronic devices or assemblies, including, for example, integrated circuits or chiplets (small integrated circuits, for example having at least one of a length and a width less than or equal to 100, 50, 25, 10, or 5 microns), including light-emitting diodes (LEDs), photosensors, or assemblies of integrated circuits or chiplets forming electronic device circuit 26 and made using integrated circuit or printed circuit board methods and materials.
A connection post 40 is an electrically conductive protrusion that extends from a substrate or surface and is electrically connected to an electronic element in a device 20, such as an integrated circuit or an electronic circuit including a plurality of integrated circuits or other electronic elements such as resistors or capacitors. Connection posts 40 can be a multi-layer structure having a dielectric core covered, at least in part, by a conductive layer. For example, a silicon oxide or silicon nitride core can be covered, at least in part, by a metal layer, as shown in
By the first imprint 60 being “between a device and a system substrate” is meant that a line taken orthogonally to the surface 84 of the system substrate 10 from the first imprint 60 will encounter the device 20 on the same side of the system substrate 10 as the first imprint 60 so that the first imprint 60 is covered by the device 20 on or over the system substrate 10. In certain embodiments, when a device 20 is micro-transfer printed using a stamp adhered to the top side of the device 20 opposite connection posts 40, the connection posts 40 contact the surface (e.g., system substrate 10 surface 84) to which the devices 20 are being micro-transfer printed to form an electrical connection between the connection posts 40 and contact pads 50 on the surface 84.
In some embodiments, contact pads 50 are arranged in pairs, each pair associated with a device 20.
Contact pads 50 can be electrically conductive metal portions of a patterned electrically conductive metal layer formed on a system substrate 10 that are dedicated to and located specially for the connection posts 40 of devices 20. In such embodiments, the contact pads 50 can be completely between the devices 20 and the system substrate 10 so that the contact pads 50 are covered by the devices 20 over the system substrate 10. In some embodiments, contact pads 50 can be designated portions of an electrical conductor that transmits electrical signals from one location on a system substrate 10 to another location. For example, contact pads 50 can be designated portions of row or column wires 12, 14. In such embodiments, contact pads 50 can extend beyond a device 20 over the system substrate 10.
Devices 20 can be transfer printed devices 20. In some embodiments, devices 20 are micro-transfer printed devices 20 and include at least or portion of a broken, fractured, or separated tether 22 (for example, as shown in
Devices 20 in accordance with some embodiments of the present invention can have multiple electronic elements, such as integrated circuits or LEDs, disposed on a device substrate 24 and transfer printed (e.g., micro-transfer printed) as a unit from a device source wafer to a destination substrate such as system substrate 10. In some embodiments, electronic elements themselves are micro-transfer printed to a device substrate 24 and therefore can each have broken, fractured, or separated tethers 22, as shown in
Connection posts 40 and their construction are described in more detail in U.S. patent application Ser. No. 14/743,788 filed Jun. 18, 2015 entitled Micro-Assembled LED Displays and Lighting Elements by Bower et al., U.S. patent application Ser. No. 14/822,864 filed Aug. 10, 2015 entitled Chiplets with Connection Posts by Prevatte et al., and U.S. Provisional Patent Application No. 62/317,107 filed Apr. 1, 2016 entitled Pressure-Activated Electrical Interconnection by Micro-Transfer Printing by Bower et al.
Micro-transfer printed device repair is discussed in U.S. patent application Ser. No. 15/040,810, filed Feb. 10, 2016 entitled Matrix-Addressed Device Repair by Cok et al. and in U.S. patent application Ser. No. 14/807,226, filed Jul. 23, 2015, entitled Parallel Redundant Chiplet System by Cok et al.
Referring to
In some embodiments step 130 is included such that the devices 20 are tested to determine faulty devices 20F, for example by providing control signals from a system controller 18 to the devices 20 through the row and column wires 12, 14, the contact pads 50, the connection posts 40, and the electrodes 28 to a device circuit 26 and observing any response to the signals, whether electrical or optical. In some embodiments, devices 20 include test pads that can be electrically probed after the devices 20 are printed (e.g., micro-transfer printed) to determine device 20 functionality. In some embodiments, a system substrate 10 can be optically inspected to determine faulty, defective, or missing devices 20F disposed thereon or electrical connections between the devices 20F and contact pads 50 on the system substrate 10. A defective device 20F can be defective because it was manufactured defectively or because the transfer printing (e.g., micro-transfer printing) of the device 20F was faulty, for example making a bad electrical connection between a connection post 40 and contact pad 50, for example due to dust particles on the contact pad 50.
In step 140, the defective or faulty device 20F is removed in any one of various ways in accordance with some embodiments of the present invention. Referring to
Referring to
Referring to
In some embodiments, and as shown in
In some embodiments of the present invention, a removal stamp pillar 82 has a channel 88 through which a partial vacuum can be applied to adhere a defective device 20F to the removal stamp pillar 82 or through which compressed gas can be expelled to dislodge the defective device 20F. Thus, methods in accordance with certain embodiments of the present invention can include blowing a gas onto the defective device 20F or sucking up the defective device 20F with at least a partial vacuum. Such pressure-controlled removal tools can be separate and operate separately from a removal stamp 80.
Referring again to
Micro-transfer printed devices 20 have been constructed as illustrated in
Referring to
Referring to
Integrated circuits included in devices 20 in accordance with certain embodiments of the present invention can include CMOS circuits or inorganic micro-light-emitting diodes (micro-iLEDs) having a light-emitting side disposed to emit light. In some embodiments, devices 20 are micro-lasers (e.g., diode micro-lasers). A micro-laser can be one or more of a solid-state laser, a semiconductor-based lasers, a diode-pumped solid-state laser (DPSSL), a vertical-cavity surface-emission laser (VCSEL), and a colloidal quantum-dot vertical-cavity surface-emission laser (CQD-VCSEL). Micro-LEDs having various structures can be made using, for example, doped or undoped semiconductor materials and can be made using photolithographic techniques. An inorganic LED (iLED) can be a micro-LED. The term micro-LED is used herein to generically refer to iLED devices. It is understood that where reference is made to a micro-LED, a micro-laser can be substituted. The integrated circuits can be relatively small, for example, in some embodiments, each device 20 or integrated circuit within a device 20 has at least one of a width from 2 to 5 μm, 5 to 10 μm, 10 to 20 μm, or 20 to 50 μm, a length from 2 to 5 μm, 5 to 10 μm, 10 to 20 μm, or 20 to 50 μm, and a height from 2 to 5 μm, 4 to 10 μm, 10 to 20 μm, or 20 to 50 μm. In some embodiments, devices 20 are formed in substrates or on supports separate, distinct, and independent from a system substrate 10 (e.g., device substrate 24).
As is understood by those skilled in the art, the terms “over” and “under” are relative terms and can be interchanged in reference to different orientations of the layers, elements, and substrates that may be included in a particular embodiment of the present invention. For example, a first layer on a second layer, in some implementations means a first layer directly on and in contact with a second layer. In other implementations, a first layer on a second layer includes a first layer and a second layer with another layer therebetween.
Having described certain implementations of embodiments, it will now become apparent to one of skill in the art that other implementations incorporating the concepts of the disclosure may be used. Therefore, the disclosure should not be limited to certain implementations, but rather should be limited only by the spirit and scope of the following claims.
Throughout the description, where apparatus and systems are described as having, including, or comprising specific components, or where processes and methods are described as having, including, or comprising specific steps, it is contemplated that, additionally, there are apparatus, and systems of the disclosed technology that consist essentially of, or consist of, the recited components, and that there are processes and methods according to the disclosed technology that consist essentially of, or consist of, the recited processing steps.
It should be understood that the order of steps or order for performing certain action is immaterial so long as the disclosed technology remains operable. Moreover, two or more steps or actions in some circumstances can be conducted simultaneously. The invention has been described in detail with particular reference to certain embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the invention.
This application claims the benefit of U.S. Provisional Patent Application No. 62/436,240, filed Dec. 19, 2016, entitled Micro-Transfer Printed Device Repair, the content of which is hereby incorporated by reference herein in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
5550066 | Tang et al. | Aug 1996 | A |
5621555 | Park | Apr 1997 | A |
5815303 | Berlin | Sep 1998 | A |
5994722 | Averbeck et al. | Nov 1999 | A |
6025730 | Akram et al. | Feb 2000 | A |
6084579 | Hirano | Jul 2000 | A |
6142358 | Cohn et al. | Nov 2000 | A |
6169294 | Biing-Jye et al. | Jan 2001 | B1 |
6184477 | Tanahashi | Feb 2001 | B1 |
6278242 | Cok et al. | Aug 2001 | B1 |
6392340 | Yoneda et al. | May 2002 | B2 |
6466281 | Huang et al. | Oct 2002 | B1 |
6577367 | Kim | Jun 2003 | B2 |
6660457 | Imai et al. | Dec 2003 | B1 |
6703780 | Shiang et al. | Mar 2004 | B2 |
6717560 | Cok et al. | Apr 2004 | B2 |
6756576 | McElroy et al. | Jun 2004 | B1 |
6812637 | Cok et al. | Nov 2004 | B2 |
6828724 | Burroughes | Dec 2004 | B2 |
6876212 | Fjelstad | Apr 2005 | B2 |
6933532 | Arnold et al. | Aug 2005 | B2 |
6969624 | Iwafuchi et al. | Nov 2005 | B2 |
7012382 | Cheang et al. | Mar 2006 | B2 |
7091523 | Cok et al. | Aug 2006 | B2 |
7098589 | Erchak et al. | Aug 2006 | B2 |
7127810 | Kasuga et al. | Oct 2006 | B2 |
7129457 | McElroy et al. | Oct 2006 | B2 |
7195733 | Rogers et al. | Mar 2007 | B2 |
7259391 | Liu et al. | Aug 2007 | B2 |
7288753 | Cok | Oct 2007 | B2 |
7354801 | Sugiyama et al. | Apr 2008 | B2 |
7402951 | Cok | Jul 2008 | B2 |
7420221 | Nagai | Sep 2008 | B2 |
7466075 | Cok et al. | Dec 2008 | B2 |
7521292 | Rogers et al. | Apr 2009 | B2 |
7557367 | Rogers et al. | Jul 2009 | B2 |
7586497 | Boroson et al. | Sep 2009 | B2 |
7605053 | Couillard et al. | Oct 2009 | B2 |
7622367 | Nuzzo et al. | Nov 2009 | B1 |
7662545 | Nuzzo et al. | Feb 2010 | B2 |
7687812 | Louwsma et al. | Mar 2010 | B2 |
7704684 | Rogers et al. | Apr 2010 | B2 |
7791271 | Cok et al. | Sep 2010 | B2 |
7799699 | Nuzzo et al. | Sep 2010 | B2 |
7816856 | Cok et al. | Oct 2010 | B2 |
7834541 | Cok | Nov 2010 | B2 |
7893612 | Cok | Feb 2011 | B2 |
7919342 | Cok | Apr 2011 | B2 |
7927976 | Menard | Apr 2011 | B2 |
7932123 | Rogers et al. | Apr 2011 | B2 |
7943491 | Nuzzo et al. | May 2011 | B2 |
7969085 | Cok | Jun 2011 | B2 |
7972875 | Rogers et al. | Jul 2011 | B2 |
7982296 | Nuzzo et al. | Jul 2011 | B2 |
7990058 | Cok et al. | Aug 2011 | B2 |
7999454 | Winters et al. | Aug 2011 | B2 |
8029139 | Ellinger et al. | Oct 2011 | B2 |
8039847 | Nuzzo et al. | Oct 2011 | B2 |
8198621 | Rogers et al. | Jun 2012 | B2 |
8207547 | Lin | Jun 2012 | B2 |
8243027 | Hotelling et al. | Aug 2012 | B2 |
8261660 | Menard | Sep 2012 | B2 |
8288843 | Kojima et al. | Oct 2012 | B2 |
8334545 | Levermore et al. | Dec 2012 | B2 |
8394706 | Nuzzo et al. | Mar 2013 | B2 |
8440546 | Nuzzo et al. | May 2013 | B2 |
8450927 | Lenk et al. | May 2013 | B2 |
8470701 | Rogers et al. | Jun 2013 | B2 |
8502192 | Kwak et al. | Aug 2013 | B2 |
8506867 | Menard | Aug 2013 | B2 |
8558243 | Bibl et al. | Oct 2013 | B2 |
8664699 | Nuzzo et al. | Mar 2014 | B2 |
8686447 | Tomoda et al. | Apr 2014 | B2 |
8722458 | Rogers et al. | May 2014 | B2 |
8735932 | Kim et al. | May 2014 | B2 |
8754396 | Rogers et al. | Jun 2014 | B2 |
8766970 | Chien et al. | Jul 2014 | B2 |
8791474 | Bibl et al. | Jul 2014 | B1 |
8794501 | Bibl et al. | Aug 2014 | B2 |
8803857 | Cok | Aug 2014 | B2 |
8817369 | Daiku | Aug 2014 | B2 |
8835940 | Hu et al. | Sep 2014 | B2 |
8854294 | Sakariya | Oct 2014 | B2 |
8860051 | Fellows et al. | Oct 2014 | B2 |
8865489 | Rogers | Oct 2014 | B2 |
8877648 | Bower et al. | Nov 2014 | B2 |
8884844 | Yang et al. | Nov 2014 | B2 |
8889485 | Bower | Nov 2014 | B2 |
8895406 | Rogers et al. | Nov 2014 | B2 |
8902152 | Bai et al. | Dec 2014 | B2 |
8941215 | Hu et al. | Jan 2015 | B2 |
8946760 | Kim | Feb 2015 | B2 |
8987765 | Bibl et al. | Mar 2015 | B2 |
9105714 | Hu et al. | Aug 2015 | B2 |
9139425 | Vestyck | Sep 2015 | B2 |
9153171 | Sakariya et al. | Oct 2015 | B2 |
9161448 | Menard et al. | Oct 2015 | B2 |
9166114 | Hu et al. | Oct 2015 | B2 |
9178123 | Sakariya et al. | Nov 2015 | B2 |
9202996 | Orsley et al. | Dec 2015 | B2 |
9217541 | Bathurst et al. | Dec 2015 | B2 |
9358775 | Bower et al. | Jun 2016 | B2 |
9367094 | Bibl et al. | Jun 2016 | B2 |
9478583 | Hu et al. | Oct 2016 | B2 |
9484504 | Bibl et al. | Nov 2016 | B2 |
9555644 | Rogers et al. | Jan 2017 | B2 |
9601356 | Bower et al. | Mar 2017 | B2 |
9640715 | Bower et al. | May 2017 | B2 |
9761754 | Bower et al. | Sep 2017 | B2 |
9765934 | Rogers et al. | Sep 2017 | B2 |
9786646 | Cok et al. | Oct 2017 | B2 |
9865832 | Bibl et al. | Jan 2018 | B2 |
9929053 | Bower et al. | Mar 2018 | B2 |
20010022564 | Youngquist et al. | Sep 2001 | A1 |
20020003132 | Scalzotto | Jan 2002 | A1 |
20020096994 | Iwafuchi et al. | Jul 2002 | A1 |
20030141570 | Chen et al. | Jul 2003 | A1 |
20040212296 | Nakamura et al. | Oct 2004 | A1 |
20040227704 | Wang et al. | Nov 2004 | A1 |
20040252933 | Sylvester et al. | Dec 2004 | A1 |
20050006657 | Terashita | Jan 2005 | A1 |
20050012076 | Morioka | Jan 2005 | A1 |
20050116621 | Bellmann et al. | Jun 2005 | A1 |
20050140275 | Park | Jun 2005 | A1 |
20050168987 | Tamaoki et al. | Aug 2005 | A1 |
20050202595 | Yonehara et al. | Sep 2005 | A1 |
20050275615 | Kahen et al. | Dec 2005 | A1 |
20050285246 | Haba et al. | Dec 2005 | A1 |
20060051900 | Shizuno | Mar 2006 | A1 |
20070035340 | Kimura | Feb 2007 | A1 |
20070077349 | Newman et al. | Apr 2007 | A1 |
20070201056 | Cok et al. | Aug 2007 | A1 |
20080108171 | Rogers et al. | May 2008 | A1 |
20080211734 | Huitema et al. | Sep 2008 | A1 |
20090315054 | Kim et al. | Dec 2009 | A1 |
20100078670 | Kim et al. | Apr 2010 | A1 |
20100123134 | Nagata | May 2010 | A1 |
20100123268 | Menard | May 2010 | A1 |
20100148198 | Sugizaki et al. | Jun 2010 | A1 |
20100190293 | Maeda et al. | Jul 2010 | A1 |
20100214247 | Tang et al. | Aug 2010 | A1 |
20100248484 | Bower et al. | Sep 2010 | A1 |
20100258710 | Wiese et al. | Oct 2010 | A1 |
20100289115 | Akiyama et al. | Nov 2010 | A1 |
20100306993 | Mayyas et al. | Dec 2010 | A1 |
20100317132 | Rogers et al. | Dec 2010 | A1 |
20110032442 | van Aerle et al. | Feb 2011 | A1 |
20110211348 | Kim | Sep 2011 | A1 |
20120119249 | Kim et al. | May 2012 | A1 |
20120223875 | Lau et al. | Sep 2012 | A1 |
20120228669 | Bower et al. | Sep 2012 | A1 |
20120314388 | Bower et al. | Dec 2012 | A1 |
20130015483 | Shimokawa et al. | Jan 2013 | A1 |
20130069275 | Menard et al. | Mar 2013 | A1 |
20130088416 | Smith et al. | Apr 2013 | A1 |
20130196474 | Meitl et al. | Aug 2013 | A1 |
20130207964 | Fleck et al. | Aug 2013 | A1 |
20130221355 | Bower et al. | Aug 2013 | A1 |
20130273695 | Menard et al. | Oct 2013 | A1 |
20130316487 | de Graff et al. | Nov 2013 | A1 |
20140104243 | Sakariya et al. | Apr 2014 | A1 |
20140159043 | Sakariya et al. | Jun 2014 | A1 |
20140175498 | Lai | Jun 2014 | A1 |
20140217448 | Kim et al. | Aug 2014 | A1 |
20140231839 | Jeon et al. | Aug 2014 | A1 |
20140231851 | Tsai et al. | Aug 2014 | A1 |
20140264763 | Meitl et al. | Sep 2014 | A1 |
20140267683 | Bibl et al. | Sep 2014 | A1 |
20140306248 | Ahn et al. | Oct 2014 | A1 |
20140367633 | Bibl et al. | Dec 2014 | A1 |
20140367705 | Bibl et al. | Dec 2014 | A1 |
20150028362 | Chan et al. | Jan 2015 | A1 |
20150135525 | Bower | May 2015 | A1 |
20150137153 | Bibl et al. | May 2015 | A1 |
20150263066 | Hu et al. | Sep 2015 | A1 |
20150280066 | Fujimura et al. | Oct 2015 | A1 |
20150280089 | Obata et al. | Oct 2015 | A1 |
20150348926 | Bower | Dec 2015 | A1 |
20150371585 | Bower et al. | Dec 2015 | A1 |
20150371974 | Bower et al. | Dec 2015 | A1 |
20150372051 | Bower et al. | Dec 2015 | A1 |
20150372052 | Bower et al. | Dec 2015 | A1 |
20150372053 | Bower et al. | Dec 2015 | A1 |
20150372187 | Bower | Dec 2015 | A1 |
20150373793 | Bower et al. | Dec 2015 | A1 |
20160005721 | Bower et al. | Jan 2016 | A1 |
20160011122 | Pacheco et al. | Jan 2016 | A1 |
20160018094 | Bower et al. | Jan 2016 | A1 |
20160064363 | Bower et al. | Mar 2016 | A1 |
20160093600 | Bower et al. | Mar 2016 | A1 |
20170025075 | Cok et al. | Jan 2017 | A1 |
20170048976 | Prevatte | Feb 2017 | A1 |
20170098729 | Fisher et al. | Apr 2017 | A1 |
20170186740 | Cok et al. | Jun 2017 | A1 |
20170213502 | Henry et al. | Jul 2017 | A1 |
20170338374 | Zou et al. | Nov 2017 | A1 |
20180315672 | Cassier et al. | Nov 2018 | A1 |
Number | Date | Country |
---|---|---|
2 496 183 | May 2013 | GB |
WO-2006027730 | Mar 2006 | WO |
WO-2006099741 | Sep 2006 | WO |
WO-2008103931 | Aug 2008 | WO |
WO-2010032603 | Mar 2010 | WO |
WO-2010111601 | Sep 2010 | WO |
WO-2010132552 | Nov 2010 | WO |
WO-2013064800 | May 2013 | WO |
WO-2013165124 | Nov 2013 | WO |
WO-2014121635 | Aug 2014 | WO |
WO-2014149864 | Sep 2014 | WO |
Entry |
---|
Bower, C. A. et al., Transfer Printing: An Approach for Massively Parallel Assembly of Microscale Devices, IEE, Electronic Components and Technology Conference, (2008). |
Cok, R. S. et al., 60.3: AMOLED Displays Using Transfer-Printed Integrated Circuits, Society for Information Display, 10:902-904, (2010). |
Cok, R. S. et al., AMOLED displays with transfer-printed integrated circuits, Journal of SID, 19(4):335-341 (2011). |
Cok, R. S. et al., Inorganic light-emitting diode displays using micro-transfer printing, Journal of the SID, 25(10):589-609, (2017). |
Feng, X. et al., Competing Fracture in Kinetically Controlled Transfer Printing, Langmuir, 23(25):12555-12560, (2007). |
Gent, A.N., Adhesion and Strength of Viscoelastic Solids. Is There a Relationship between Adhesion and Bulk Properties?, American Chemical Society, Langmuir, 12(19):4492-4496, (1996). |
Kim, Dae-Hyeong et al., Optimized Structural Designs for Stretchable Silicon Integrated Circuits, Small, 5(24):2841-2847, (2009). |
Kim, Dae-Hyeong et al., Stretchable and Foldable Silicon Integrated Circuits, Science, 320:507-511, (2008). |
Kim, S. et al., Microstructured elastomeric surfaces with reversible adhesion and examples of their use in deterministic assembly by transfer printing, PNAS, 107(40):17095-17100 (2010). |
Kim, T. et al., Kinetically controlled, adhesiveless transfer printing using microstructured stamps, Applied Physics Letters, 94(11):113502-1-113502-3, (2009). |
Meitl, M. A. et al., Transfer printing by kinetic control of adhesion to an elastomeric stamp, Nature Material, 5:33-38, (2006). |
Michel, B. et al., Printing meets lithography: Soft approaches to high-resolution patterning, J. Res. & Dev. 45(5):697-708, (2001). |
Trindade, A.J. et al., Precision transfer printing of ultra-thin AlInGaN micron-size light-emitting diodes, Crown, pp. 217-218, (2012). |
Hamer et al., 63.2: AMOLED Displays Using Transfer-Printed Integrated Circuits, SID 09 Digest, 40(2):947-950 (2009). |
Lee, S. H. etal, Laser Lift-Offof GaN Thin Film and its Application to the Flexible Light Emitting Diodes, Proc. of SPIE 8460:846011-1-846011-6 (2012). |
Roscher, H., VCSEL Arrays with Redundant Pixel Designs for 10Gbits/s 2-D Space-Parallel MMF Transmission, Annual Report, optoelectronics Department, (2005). |
Yaniv et al., A 640×480 Pixel Computer Display Using Pin Diodes with Device Redundancy, 1988 International Display Research Conference, IEEE, CH-2678-1/88:152-154 (1988). |
Number | Date | Country | |
---|---|---|---|
20180174932 A1 | Jun 2018 | US |
Number | Date | Country | |
---|---|---|---|
62436240 | Dec 2016 | US |