Priority is claimed to Japanese Patent Application Number JP2004-094684 filed on Mar. 29, 2004, the disclosure of which is incorporated herein by reference in its entirety.
1. Field of the Invention
This invention relates to a circuit device and a manufacturing method thereof, more particularly to a circuit device having improved heat radiation properties and a manufacturing method thereof.
2. Description of the Related Art
Configuration of a conventional hybrid integrated circuit device is described with reference to
The conventional hybrid integrated circuit device 100 comprises a rectangular substrate 106, an insulating layer 107 provided on the substrate 106, conductive patterns 108 formed on the insulating layer 107, a circuit element 104 fixed on a conductive pattern 108, fine metal wires 105 electrically connecting the circuit element 104 with the conductive patterns 108, and leads 101 electrically connected with the conductive patterns 108. The above-described hybrid integrated circuit device 100 is entirely sealed by a sealing resin 102.
In the above-described hybrid integrated circuit device 100, the insulating layer 107 having electrical circuitry formed thereon thermally separates the circuit element 104 from the substrate 106 thus causing problems with radiation of heat discharged from the circuit element 104. It is possible to improve heat radiation by providing a thinner insulating layer 107, however, the insulating layer must have a thickness equal to or above a predetermined value in order to ensure withstand voltage. Concretely, the insulating layer 107 must be several hundred μm thick. An inorganic filler is filled in order to improve thermal resistance of the insulating layer 107 itself, however, there are limits to heat radiation via insulating layer 107.
The preferred embodiments of the present invention have been developed in view of the above-described and/or other problems and a main aspect thereof is to provide a circuit device having excellent heat radiation properties while ensuring predetermined withstand voltage properties, and a manufacturing method thereof.
A circuit device of some preferred embodiments of the present invention includes a circuit board, an insulating layer formed on the circuit board, conductive patterns formed on the surface of the insulating layer, a circuit element electrically connected to the conductive patterns, wherein a protrusion partially extending and being buried in the insulating layer is provided on the surface of the circuit board.
Furthermore, the protrusion and the conductive patterns are preferably put in direct contact.
Furthermore, the insulating layer is preferably provided between the protrusion and the conductive pattern.
Furthermore, the protrusion is preferably provided under the conductive pattern having a circuit element disposed thereon, at a corresponding location in the surface of the circuit board.
Furthermore, the circuit board is preferably formed of a metal mainly comprising copper.
The protrusion has a column-like shape.
With a circuit device of some embodiments, preferably, a semiconductor element having no terminals on a back surface thereof is employed as a circuit element, a protrusion is provided on a surface of a circuit board at a location corresponding to a lower side of a conductive pattern having a semiconductor element fixed thereon, so that the conductive pattern and the protrusion are in direct contact.
In a circuit device manufacturing method according to some preferred embodiments, forming electrical circuitry comprising a conductive pattern and a circuit element on a circuit board via an insulating layer includes providing on a surface of the circuit board a protrusion extending partially and being buried in the insulating layer.
Furthermore, a circuit device manufacturing method according to some embodiments includes providing a protrusion extending partially on a surface of an circuit board, attaching a conductive foil on the circuit board via an insulating layer covering the circuit board so as to bury the protrusion, forming a conductive pattern by patterning the conductive foil and electrically connecting the conductive pattern with the circuit element.
Furthermore, the protrusion is preferably formed by etching.
In a circuit device manufacturing method according to some embodiments, a plurality of protrusions are provided in a location corresponding to one conductive pattern.
Furthermore, in a circuit device manufacturing method according to some embodiments, an upper surface of the protrusion is formed to be planar and an insulating layer is interposed between the protrusion and the conductive pattern.
Furthermore, sidewalls of the protrusion are formed to have a curved surface.
According to this invention, the distance between the circuit board and the conductive pattern having an insulating layer formed thereon can be topically reduced by burying the protrusion provided on the circuit board in an insulating layer. The insulating layer can reduce thermal resistance thus enabling improvement of heat radiation properties. Moreover, by contacting the protrusion with the back surface of the conductive pattern, heat radiation effects can significantly be improved. It is also possible to approximate the conductive pattern and the protrusion while ensuring insulation therebetween by interposing a resin forming an insulating layer. The protrusion has a column-like shape so as to facilitate burying of the protrusion in the insulating layer.
Structure of a hybrid integrated circuit device 10 according to an embodiment of the present invention is described with reference to
A circuit board 16 is employed which is preferably a board comprising metal or ceramic, etc. and having heat radiation properties. Al, Cu or Fe can be employed as material for the circuit board 16 of metal, or Al2O3, AlN for the ceramic circuit board 16. Other materials exhibiting excellent mechanical strength and heat radiation properties can be employed as materials for the circuit board 16. For example, when a circuit board of Al is used as the circuit board 16, there are two methods for providing insulation between the circuit board 16 and a conductive patterns 18 formed on a surface thereof. One method is to carry out an alumite treatment of the surface of the Al circuit board. A second method is to form an insulating layer 17 on the Al circuit board and further form the conductive pattern 18 on the insulating layer. In some preferred embodiments of the present invention, the metal circuit board 16 having Cu as a main material is preferably employed. Since Cu is a material having excellent heat conductance, heat radiation properties of the overall device can be improved. Here, when the Cu circuit board 16 is used, the insulating layer 17 becomes an indispensable constituent feature.
A protrusion 25 is a portion partially protruding upward on the surface of the circuit board 16 and thus being buried in the insulating layer 17. The distance between an upper surface of the protrusion 25 and a back surface of the conductive pattern 18 is shorter than the distance between a surface of the circuit board 16 at other locations and the back surface of the conductive pattern 18. Accordingly, the thermal resistance by the insulating layer 17 at the location where the protrusion 25 is formed is low and heat radiation via circuit board 16 can be carried out positively. The upper edge of the protrusion 25 may contact the back surface of the conductive pattern 18, and it doesn't have to contact there. The shape, etc. of the protrusion 25 is to be further described in more detail. The protrusion 25 is preferably provided in a region corresponding to a lower part of a heat-generating semiconductor element 14A. With this structure, heat generated from the semiconductor element 14A is discharged to the outside.
A circuit element 14 is fixed on the conductive pattern 18 so that a predetermined electrical circuit is formed by the circuit element 14 and the conductive pattern 18. Active elements such as transistors or diodes, etc. or passive elements such as capacitors or resistors, etc. can be employed as the circuit element 14. Also, elements with a high calorific value such as power semiconductor elements, etc. may be fixed to the circuit board 16 via a heat sink formed of metal. Here, active elements, etc. mounted face-up are electrically connected with the conductive pattern 18 via fine metal wires 15.
LSI chips, capacitors, resistors, etc. can be used as the circuit element 14. Adhesives used in an LSI chip are differentiated according to the back surface of the Si chip which may be GND or floating. In case of GND, the rear surface of the circuit element 14 is fixed by means of brazing material or conductive paste and connection with the bonding pad and the circuit element 14 is made by use of fine metal wires, in case of face-up mounting, or brazing material, etc. in case of face-down mounting. Furthermore, power transistors such as power MOS, GTBT, IGBT, thyristors capable of controlling a large current can be used as the semiconductor element 14A. Power ICs can also be employed. With high-performance and compact chips nowadays, the amount of heat generated is increasing; the CPU controlling a computer is just an example of such a chip.
The conductive pattern 18 can be formed of a metal such as Cu and is insulated from the circuit board 16. A pad formed of the conductive pattern 18 is formed in an area where a lead 11 is provided. Here, an example is described where the lead 11 is provided at one side of the circuit board 16, but the lead may be provided at least at one side of the circuit board 16. The conductive pattern 18 is attached to the circuit board 16 using the insulating layer 17 as an adhesive.
The insulating layer 17 is formed on the entire circuit board 16 and has the function of attaching the back surface of the conductive pattern 18 to the surface of the circuit board 16. The insulating layer 17 comprises a resin filled with an inorganic filler such as alumina and has excellent heat conductance. The thickness between the lower end of the conductive pattern 18 and the surface of the circuit board 16 varies with withstand voltage preferably in the range of from about 50 μm to several hundreds μm or more.
The lead 11 is fixed to the pad provided in the periphery of the circuit board 16 and carries out, for instance signal input/output with the exterior. Here, a plurality of the leads 11 is provided on one side of the circuit board 16. The leads 11 and the pads are attached via a conductive adhesive such as solder etc.
A sealing resin 12 is formed by transfer mold using a thermo-setting resin or by injection mold using thermoplastic resin. Here, the sealing resin 12 is formed to seal the circuit board 16 and the electric circuitry formed on the circuit board 16 while leaving the back surface of the circuit board 16 exposed from the sealing resin 12. It is also possible to apply other sealing methods, besides mold sealing, to the hybrid integrated circuit device according to this embodiment. Such other sealing methods include sealing by resin potting, sealing by a case member or other commonly known method. In
In
A more detailed description of the location of the protrusion 25 is next given with reference to
In
The distance range between the upper end of the protrusion 25 and the back surface of the conductive pattern 18 is preferably such that a withstand voltage can be obtained. By making this distance larger than the filler included in the insulating layer 17, filler can be provided between the protrusion 25 and the conductive pattern 18 to improve heat radiation.
In
In
The location where the protrusion 25 is provided is now described in detail with reference to
In
Advantages of a configuration where the conductive pattern 18 is partially buried in the insulating layer 17 are next described. First, because the back surface of the conductive pattern 18 approximates the surface of the circuit board 16, heat generated inside the device can be discharged to the exterior via the conductive pattern 18 and the insulating layer 17. In this embodiment, the insulating layer 17 is used which is filled with a filler. To improve heat radiation, it is preferable to use the insulating layer 17 which is thin and at the same time can ensure voltage withstand. With this configuration, the distance between the conductive pattern 18 and the circuit board 16 can be reduced. This reduction of distance plays an important role in improving heat radiation properties of the entire device.
Moreover, with the same configuration, the area where the back surface of the conductive pattern 18 and the insulating layer 17 come in contact can be increased, thus enabling further improvement of heat radiation. If the convex portion is formed to be a cube, four sides thereof except the upper side come in contact with the insulating layer 17. To improve heat radiation, it is also possible to create a configuration lacking heat sinks. Moreover, partially burying the conductive pattern 18 in the insulating layer 17 enables improvement of adhesion between the two elements. Accordingly, peeling strength of the conductive pattern 18 can be improved. The conductive pattern 18 at other regions is not buried in the insulating layer 17 so that the distance with the circuit board 16 can be increased and occurrence of a large parasitic capacitance can be suppressed. Accordingly, even when a high-frequency electrical signal passes through the conductive pattern 18, deterioration of the signal by the parasitic capacitance can be prevented.
In
In
A manufacturing method of the above-described hybrid integrated circuit device is next described with reference to
The circuit board 16 is prepared and a resist is patterned on a surface thereof as shown in
As shown in
The circuit board 16 and a conductive foil 20 are attached via the insulating layer 17, as shown in
The conductive pattern 18 is formed by etching via the resist 21 as shown in
Next, a manufacturing method of the device illustrated in
The protrusion 25 is formed by etching after the surface of the circuit board is covered by the resist 21 as illustrated in
The circuit board 16 and the conductive foil 20 are attached via an insulating layer, as shown in
After the resist 21 is coated on the surface of the conductive foil 20, the resist 21 is patterned in order to form the conductive patterns 18 as illustrated in
After the surface of the circuit board 16 is partially covered with the resists 21, the protrusion 25 is formed by etching, as shown in
The conductive foil 20 and the circuit board 16 are attached via the insulating layer 17, as shown in
An etching process is carried out after the resist 21 is patterned on the surface of the conductive foil 20 so that predetermined patterns 18 are formed as shown in
Next, processes subsequent to the patterning process are described in detail.
First, the circuit element 14 is secured to the conductive pattern (island) 18 via conductive pastes, etc. such as solder, as shown in
In
After the above process has been completed, the individual units 24 are separated. The each unit can be separated by stamping using a press, by dicing, by meandering etc. Next, the leads 11 are secured to the circuit boards 16 of each individual unit.
Next, resin sealing of the each circuit board 16 is carried out as shown in
Number | Date | Country | Kind |
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2004-094684 | Mar 2004 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP05/06232 | 3/24/2005 | WO | 00 | 9/25/2006 |