Package in package device for RF transceiver module

Information

  • Patent Grant
  • 8558365
  • Patent Number
    8,558,365
  • Date Filed
    Tuesday, September 27, 2011
    13 years ago
  • Date Issued
    Tuesday, October 15, 2013
    11 years ago
Abstract
In accordance with the present invention, there is provided multiple embodiments of a package-in-package semiconductor device including an RF package and a semiconductor die which are provided in a stacked arrangement and are each electrically connected to an underlying substrate through the use of conductive wires alone or in combination with conductive bumps. In certain embodiments of the present invention, the RF package and the semiconductor die are separated from each other by an intervening spacer which is fabricated from aluminum, or from silicon coated with aluminum. If included in the semiconductor device, the spacer is also electrically connected to the substrate, preferably through the use of conductive wires. The RF package, the semiconductor die, the spacer (if included) and a portion of the substrate are at least partially covered or encapsulated by a package body of the semiconductor device.
Description
STATEMENT RE: FEDERALLY SPONSORED RESEARCH/DEVELOPMENT

Not Applicable


BACKGROUND OF THE INVENTION

1. Field of the Invention


The present invention relates generally to integrated circuit chip package technology and, more particularly, to a package-in-package (PIP) semiconductor device which is configured to minimize the electrical interference between one internal semiconductor package and another internal semiconductor package or die from each other or from the surrounding environment, while minimizing the stack-up height of these internal electronic components. The configuration of the semiconductor device of the present invention also allows for ease in the testing thereof.


2. Description of the Related Art


Radio frequency (RF) shielding is required on certain semiconductor devices in order to minimize electro-magnetic interference (EMI) radiation from the semiconductor device. RF shielding is further sometimes required to prevent RF radiation from external sources from interfering with the operation of the semiconductor device.


RF shielding is generally accomplished in one of three ways. A first method is to attach a metal can over an electronic component such as a semiconductor package or a semiconductor die after such electronic component has been attached to an underlying support surface such as a printed circuit board. One alternative to the shield attach method is to embed an RF shield directly into a semiconductor package. In this embedded shield method, the RF shield (which is typically made of metal) is directly attached to the substrate of the semiconductor package through the use of solder or a conductive adhesive. The shield may be fully embedded within the mold compound of the finished semiconductor package, or can be exposed after assembly. Another method for facilitating RF shielding, often referred to as a conventional conformal shield, involves initially placing electronic components such as those described above on an underlying substrate or strip, and thereafter over-molding such substrate or strip in a manner defining individual mold caps thereon. These individual mold caps are oriented such that upwardly facing pads of the substrate or strip are exposed, i.e., not covered by the mold caps. A conductive coating is then applied to the substrate or strip such that it covers the units and also makes electrical contact to the upwardly facing pads. The substrate or strip is then singulated into individual units. Alternatively, the individual units may be singulated, thus exposing the metal layer(s) on the package edge, allowing the conformal coated shield to contact the exposed grounded metal.


In the electronics industry, there is also an increasing need for semiconductor devices of increased functional capacity, coupled with reduced size. This particular need is often being satisfied through the use of package-in-package (PIP) semiconductor devices. A typical PIP semiconductor device comprises various combinations of electronic components including passive devices, semiconductor dies, semiconductor packages, and/or other elements which are arranged in a horizontal direction, or stacked in a vertical direction on an underlying substrate. In many PIP devices, the substrate and the electronic components are interconnected to one another through the use of conductive wires alone or in combination with conductive bumps, with such electronic components thereafter being encapsulated by a suitable encapsulant material which hardens into a package body of the PIP device.


The present invention provides a unique combination of the above-described RF shielding and PIP technologies, and provides a PIP semiconductor device wherein an RF package and a die are stacked, with conformal shielding also being included to provide RF noise mitigation (i.e., minimize noise interference) between the RF package and the die (or any other component in the PIP device), or between the RF package and the external environment. These, as well as other features of the PIP device of the present invention, will be described in more detail below.


BRIEF SUMMARY OF THE INVENTION

In accordance with the present invention, there is provided multiple embodiments of a package-in-package semiconductor device wherein a conformally shielded RF package is stacked with a digital semiconductor die. The semiconductor device of the present invention provides adequate electrical isolation between the RF package and the semiconductor die, and further allows for the testing of the RF package prior to attachment. Thus, the semiconductor device makes use of vertical stacking with a conformally shielded RF package to integrate the functionality of the RF package into a single device, while still allowing for RF signal isolation.


The PIP semiconductor device constructed in accordance with each embodiment of the present invention essentially combines two technologies, namely, conformal shielding to isolate RF emitting devices from other devices and the ambient, and three-dimensional packaging which enables stacking different devices into a single package with space and cost savings. In the present invention, the RF package of the semiconductor device can be tested separately and prior to stacking as a way to provide for binning and selective application, with existing assembly capabilities thereafter being used to incorporate the RF package into any one of multiple vertical stacking configurations which will be described in more detail below. Thus, the present invention provides for great flexibility using off-the-shelf RF packages in new applications, providing adequate electrical isolation between the RF package and other electronic components integrated into the semiconductor device to minimize interference and allow for proper performance.


The present invention is best understood by reference to the following detailed description when read in conjunction with the accompanying drawings.





BRIEF DESCRIPTION OF THE DRAWINGS

These, as well as other features of the present invention, will become more apparent upon reference to the drawings wherein:



FIG. 1 is a cross-sectional view of a package-in-package semiconductor device constructed in accordance with a first embodiment of the present invention;



FIG. 2 is a cross-sectional view of a package-in-package semiconductor device constructed in accordance with a second embodiment of the present invention; and



FIG. 3 is a cross-sectional view of a package-in-package semiconductor device constructed in accordance with a third embodiment of the present invention.





Common reference numerals are used throughout the drawings and detailed description to indicate like elements.


DETAILED DESCRIPTION OF THE INVENTION

Referring now to the drawings wherein the showings are for purposes of illustrating various embodiments of the present invention only, and not for purposes of limiting the same,



FIG. 1 illustrates a package-in-package semiconductor device 100 constructed in accordance with a first embodiment of the present invention. The semiconductor device 100 comprises a substrate 102 which functions to transmit electrical signals to and from the semiconductor device 100. The substrate 102 comprises an insulative layer 104 which defines a generally planar first (top) surface 106 and an opposed, generally planar second (bottom) surface 108. The insulative layer 104 further comprises a third (side) surface 110 which extends generally perpendicularly between the top and bottom surfaces 106 and 108. The insulative layer 104 may comprise a base film formed from a thermosetting resin, a polyimide, or an equivalent material.


The substrate 102 further comprises one or more electrically conductive lands 112 which are formed on the bottom surface 108 in a prescribed pattern or arrangement. The substrate 102 also includes an electrically conductive pattern 114 which is formed on the top surface 106. The conductive pattern 114 may comprise various pads, lands, traces, or combinations thereof. In the substrate 102, the lands 112 and the conductive pattern 114 are electrically connected to each other in a prescribed pattern or arrangement through the use of conductive vias 116 which extend through the insulative layer 104 between the top and bottom surfaces 106, 108 thereof in the manner shown in FIG. 1. In the semiconductor device 100, it is contemplated that the lands 112, conductive pattern 114 and vias 116 will each be formed from copper or a suitable equivalent material having acceptable electrical conductivity. With particular regard to the vias 116, it is further contemplated that such vias 116 may be formed by coating the walls of cylindrical apertures extending through the insulative layer 104 with a conductive metal film which places the lands 112 into electrical connection with the conductive pattern 114 in a prescribed manner.


The substrate 102 further preferably includes a solder mask 118 which is formed on the bottom surface 108 of the insulative layer 104. As seen in FIG. 1, the solder mask 118 is formed to surround and cover a predetermined region of the periphery of each of the lands 112. As also seen in FIG. 1, it is contemplated that in the semiconductor device 100, solder balls 120 will be electrically coupled to respective ones of the lands 112, such solder balls 120 being used to transmit electrical signals between the semiconductor device 100 and an external device. The solder mask 118, which contacts each of the solder balls 120, electrically insulates each of the solder balls 120 from the adjacent lands 112 on which other solder balls 120 are formed. In the substrate 102, portions of the conductive pattern 114 of the substrate 102 may also be covered by a solder mask 122 which is included on the top surface 106 of the substrate 102 as shown in FIG. 1.


The semiconductor device 100 further comprises a semiconductor package, and more particularly an RF package 124, which is mounted and electrically connected to the substrate 102 in a manner which will be described in more detail below. The RF package 124 comprises a package substrate 126 which includes an insulating layer defining opposed top and bottom surfaces and electrically conductive patterns formed on respective ones of the opposed top and bottom surfaces of the insulating layer. In the package substrate 126, the conductive patterns disposed on respective ones of the opposed top and bottom surfaces of the insulating layer are electrically connected to each other in a prescribed pattern or arrangement through the use of vias which extend through the insulating layer. The package substrate 126 of the RF package 124 can itself be selected from rigid circuit boards, flexible circuit boards and equivalents thereto, with the structure of the package substrate 126 potentially being the same as that of the substrate 102 described above.


Attached to the insulating layer of the package substrate 126 are one or more electronic components 128. As shown in FIG. 1, two electronic components 128 are attached to the top surface of the insulating layer of the package substrate 126. However, those of ordinary skill in the art will recognize that fewer or greater than two electronic components 128 may be included in the RF package 124 without departing from the spirit and scope of the present invention. The electronic components 128 included in the RF package 124 may include, for example, a balun and an RF transceiver. In the RF package 124, the electronic components 128 are electrically connected to the conductive patterns of the package substrate 126 through the use of inner conductive wires 130 in the manner shown in FIG. 1.


In addition to the above-described components, the RF package 124 includes an RF shield 132 which is applied to the package substrate 126 and, in some cases, to the outer surface of the package body 142 described below. The RF shield 132 may be applied by plating, vacuum printing, vacuum deposition, insert molding, spray coating, and the like. More particularly, as also shown in FIG. 1, the RF shield 132 is applied to the peripheral side surfaces of the insulating layer of the package substrate 126 such that the RF shield 132 effectively covers or shields the electronic components 128 and the inner conductive wires 130 used to electrically connect the electronic components 128 to the conductive patterns of the package substrate 126. Those of ordinary skill in the art will recognize that the above-described configuration of the RF package 124 is exemplary only, and that the present invention contemplates that any one of a multiplicity of currently known RF package configurations may be integrated into the semiconductor device 100.


In the semiconductor device 100, the RF package 124 is electrically connected to the conductive pattern 114 of the substrate 102 through the use of a plurality of conductive bumps 134. More particularly, as seen in FIG. 1, the conductive bumps 134 extend between the conductive pattern 114 and prescribed portions of the conductive pattern disposed on that surface of the insulating layer of the package substrate 126 opposite that having the electronic components 128 mounted thereto. Examples of suitable materials for the conductive bumps 134 include, but are not limited to, gold, silver, soldering materials, or equivalents thereto. In the semiconductor device 100, the solder mask 122 disposed on the top surface of the insulating layer 104 of the substrate 102 preferably extends into contact with each of the conductive bumps 134.


The semiconductor device 100 of the present invention further comprises a semiconductor die 136 which it attached to the RF package 124 and electrically connected to the substrate 102. More particularly, as seen in FIG. 1, the semiconductor die 136 defines opposed, generally planar top and bottom surfaces, with the bottom surface being attached to the top surface (when viewed from the perspective shown in FIG. 1) of the RF shield 132 of the RF package 124 through the use of an adhesive layer 138. The semiconductor die 136, which preferably comprises a baseband die, includes a plurality of contacts or terminals disposed on the top surface thereof, such terminals being electrically connected to the conductive pattern 114 of the substrate 102 through the use of respective ones of a plurality of conductive wires 140. As shown in FIG. 1, the width of the semiconductor die 136 exceeds that of the RF package 124, such that a peripheral portion of the semiconductor die 136 protrudes beyond or overhangs the peripheral side surface of the RF shield 132 of the RF package 124. However, those of ordinary skill in the art will recognize that the semiconductor die 136 may alternatively be sized such that the peripheral side surface thereof is substantially flush with or disposed inwardly relative to the peripheral side surface of the RF shield 132 of the RF package 124 without departing from the spirit and scope of the present invention.


In the semiconductor device 100, the RF package 124, the semiconductor die 136, the conductive bumps 134 and a portion of the substrate 102 (including portions of the solder mask 122 and any exposed portions of the top surface of the insulating layer 104 and conductive pattern 114) are each encapsulated or covered by an encapsulant material which ultimately hardens into a package body 142 of the semiconductor device 100. The present invention is not intended to be limited to any specific material which could be used to facilitate the fabrication of the package body 142. For example, and not by way of limitation, the package body 142 can be formed from epoxy molding compounds or equivalents thereto. The fully formed package body 142 preferably includes side surfaces which extend in generally flush or co-planar relation to respective side surfaces of the insulating layer 104 of the substrate 102.


Referring now to FIG. 2, there is shown a semiconductor device 200 constructed in accordance with a second embodiment of the present invention. The semiconductor device 200 is similar to the above-described semiconductor device 100, with only the differences between the semiconductor devices 200, 100 being described below.


In the semiconductor device 200, an aluminized spacer 144 is interposed between the RF package 124 and the semiconductor die 136. More particularly, as seen in FIG. 2, the spacer 144 has a generally quadrangular configuration defining opposed, generally planar top and bottom surfaces. The bottom surface of the spacer 144 is attached to the top surface of the RF package 124, i.e., the top surface of the RF shield 132 when viewed from the perspective shown in FIG. 2. The attachment of the bottom surface of the spacer 144 to the top surface of the RF shield 132 of the RF package 124 is preferably accomplished through the use of an adhesive layer 146. The spacer 144 is typically fabricated from a silicon core which is at least partially coated or plated with an aluminum layer. Alternatively, the spacer 144 may be formed entirely from aluminum. As shown in FIG. 2, the width of the spacer 144 exceeds that of the underlying RF package 124, such that a peripheral portion of the spacer 144 protrudes beyond or overhangs the peripheral side surface of the RF shield 132 of the RF package 124. However, those of ordinary skill in the art will recognize that the spacer 144 may alternatively be sized such that the peripheral side surface thereof is substantially flush with the peripheral side surface of the RF shield 132 of the RF package 124 without departing from the spirit and scope of the present invention.


In the semiconductor device 200, the spacer 144 is preferably placed into electrical communication with the substrate 102 through the use of one or more conductive wires 148. More particularly, as seen in FIG. 2, one end of each conductive wire 148 is preferably attached to a prescribed location on the top surface of the spacer 144 through the use of, for example, a ball-bonding or a stitch-bonding technique. The remaining, opposite end of the same conductive wire 148 is electrically connected to a prescribed portion of the conductive pattern 114 of the substrate 102.


In the semiconductor device 200 as shown in FIG. 2, the width of the semiconductor die 136 exceeds that of the underlying spacer 144. As a result, to accommodate the loop height of the conductive wires 148, the semiconductor device 200 further comprises a film-over-wire (FOW) 150 which is disposed on and completely covers the top surface of the spacer 144. In addition, the FOW 150 covers or encapsulates portions of the conductive wires 148, and in particular those portions of the conductive wires 148 which extend and are electrically connected to the top surface of the spacer 144. The FOW 150 is preferably a die attach material which remains in a semi-cured state (B-stage) before curing. Accordingly, when the FOW 150 is initially applied to the spacer 144, the conductive wire(s) 148 are naturally situated within the FOW 150. As shown in FIG. 2, due the width of the semiconductor die 136 exceeding that of the underlying spacer 144 and the need for the FOW 150 to accommodate the semiconductor die 136, the width of the FOW 150 also exceeds that of the underlying spacer 144, such that a peripheral portion of the FOW 150 protrudes beyond or overhangs the peripheral side surface of the spacer 144. However, those of ordinary skill in the art will recognize that the FOW 150 may alternatively be sized such that the peripheral side surface thereof is substantially flush or co-planar with the peripheral side surface of the spacer 144 without departing from the spirit and scope of the present invention.


In the semiconductor device 200, the widths of the semiconductor die 136 and the FOW 150 are preferably substantially equal to each other, with the bottom surface of the semiconductor die 136 being directly engaged to the top surface of the FOW 150 when viewed from the perspective shown in FIG. 2. In this regard, the peripheral side surface of the semiconductor die 136 extends in substantially flush or co-planar relation to the peripheral side surface of the FOW 150 as shown in FIG. 2. However, those or ordinary skill in the art will recognize that the semiconductor die 136 may alternatively be sized such that the peripheral side surface thereof of disposed outwardly (i.e., overhangs) or inwardly relative to the peripheral side surface of the FOW 150 without departing from the spirit and scope of the present invention. Further, it is contemplated that if the semiconductor die 136 is of a width which is less than that of the spacer 144, the FOW 150 may be eliminated in its entirety, provided that the peripheral side surfaces of the semiconductor die 136 could be disposed inboard of those locations on the top surface of the spacer 144 to which the conductive wires 148 are electrically connected. In this instance, the bottom surface of the semiconductor die 136 could be attached to a central portion of the top surface of the spacer 144 through the use of a suitable adhesive. Also, if the FOW 150 is sized and oriented relative to the spacer 144 such that the peripheral side surfaces of the FOW 150 and spacer 144 are substantially flush or co-planar with each other, the semiconductor die 136 may also be sized such that the peripheral side surface thereof extends in substantially flush, co-planar relation to the co-planar peripheral side surfaces of the FOW 150 and spacer 144.


In the semiconductor device 200, the package body 142 covers the FOW 150 and spacer 144, in addition to those components described above in relation to the semiconductor device 100. The spacer 144 included in the semiconductor device 200 supplements the effect of the RF shield 132 of the RF package 124 in minimizing noise interference between the RF package 124 and semiconductor die 136, and further assists in preventing exposure of the RF package 124 to noise interference from the ambient environment.


Referring now to FIG. 3, there is shown a semiconductor device 300 constructed in accordance with a third embodiment of the present invention. The semiconductor device 300 is similar to the above-described semiconductor device 200, with only the differences between the semiconductor devices 300, 200 being described below.


In the semiconductor device 300, the conductive bumps 134 included in the semiconductor devices 100, 200 and used to electrically connect the RF package 124 to the substrate 102 are eliminated. In this regard, the electrical connection of the RF package 124 of the semiconductor device 300 to the substrate 102 thereof is facilitated by conductive wires 152. More particularly, as seen in FIG. 3, one end of each of the conductive wires 152 is electrically connected to a portion of the conductive pattern disposed on that surface of the insulating layer of the package substrate 126 of the RF package 124 opposite that having the electronic components 128 mounted thereto. The remaining end of the same conductive wire 152 is electrically connected to a prescribed portion of the conductive pattern 114 of the substrate 102. As is apparent from FIG. 3, to allow for the use of conductive wires 152 to facilitate the electrical connection thereof to the substrate 102, the RF package 124 of the semiconductor device 300, as viewed from the perspective shown in FIG. 3, is flipped over relative to its orientation as viewed from the perspective shown in FIGS. 1 and 2 in relation to respective ones of the semiconductor devices 100, 200. In this regard, in the semiconductor device 300, the RF shield 132 of the RF package 124 is attached directly to a central portion of the top surface of the insulating layer 104 of the substrate 102 through the use of an adhesive layer 154.


In the semiconductor device 300, the above-described spacer 144 is interposed between the RF package 124 and the semiconductor die 136 in the manner shown in FIG. 3. However, due to the width of the spacer 144 exceeding the width of the RF package 124, to accommodate the loop height of the conductive wires 152 used to electrically connect the RF package 124 to the substrate 102, the attachment of the spacer 144 to the package substrate 126 of the RF package 124 is facilitated by a film-over-wire (FOW) 156 as an alternative to the adhesive layer 146 described above in relation to the semiconductor device 200. As seen in FIG. 3, the FOW 156 completely covers that surface of the package substrate 126 of the RF package 124 disposed furthest from the substrate 102. In addition, the FOW 156 covers or encapsulates portions of the conductive wires 152. The FOW 156 is preferably fabricated from the same material described above in relation to the FOW 150.


As shown in FIG. 3, due to the width of the spacer 144 exceeding that of the underlying RF package 124 and the need for the FOW 156 to accommodate the spacer 144, the width of the FOW 156 exceeds the width of the underlying RF package 124, with a peripheral portion of the FOW 156 protruding beyond or overhanging the peripheral side surface of the RF shield 132 of the RF package 124. However, those of ordinary skill in the art will recognize that the FOW 156 may alternatively be sized such that the peripheral side surface thereof is substantially flush or co-planar with the peripheral side surface of the RF shield 132 of the RF package 124 without departing from the spirit and scope of the present invention. The relative sizes of the spacer 144, FOW 150 and semiconductor die 136 included in the semiconductor device 300 may be varied from that shown in FIG. 3 in the same manner described above in relation to the semiconductor device 200. Along these lines, it is further contemplated that the peripheral side surfaces of the RF shield 132, FOW 156, spacer 144, FOW 150 and semiconductor die 136 in the semiconductor device 300 may all extend in generally co-planar relation to each other.


In the semiconductor device 300, the package body 142 covers the FOW 156, in addition to those components described above in relation to the semiconductor devices 100, 200. The spacer 144 included in the semiconductor device 300 also supplements the effect of the RF shield 132 of the RF package 124 in minimizing noise interference between the RF package 124 and semiconductor die 136, and further assists in preventing exposure of the RF package 124 to noise interference from the ambient environment.


This disclosure provides exemplary embodiments of the present invention. The scope of the present invention is not limited by these exemplary embodiments. Numerous variations, whether explicitly provided for by the specification or implied by the specification, such as variations in structure, dimension, type of material and manufacturing process may be implemented by one of skill in the art in view of this disclosure.

Claims
  • 1. A semiconductor device, comprising: a substrate having a conductive pattern disposed thereon;an RF package including a package substrate having an RF shield attached thereto, wherein the package substrate is electrically connected to the conductive pattern of the substrate;a conductive spacer attached to the RF shield and electrically connected to the conductive pattern of the substrate;a semiconductor die stacked upon the conductive spacer and electrically connected to the conductive pattern of the substrate; anda package body at least partially encapsulating the RF package, the conductive spacer, the semiconductor die and the substrate.
  • 2. the semiconductor device of claim 1 wherein the substrate comprises: an insulative layer defining opposed first and second surfaces; anda plurality of lands disposed on the second surface;the conductive pattern being disposed on the first surface and electrically connected to the lands in a prescribed manner.
  • 3. The semiconductor device of claim 1 wherein the RF package is electrically connected to the conductive pattern by conductive bumps which are encapsulated by the package body.
  • 4. The semiconductor device of claim 1 wherein the semiconductor die is electrically connected to the conductive pattern by at least one conductive wire which is encapsulated by the package body.
  • 5. The semiconductor device of claim 1, wherein the conductive spacer is electrically connected to the substrate by at least one conductive wire, and wherein the semiconductor die is attached to the conductive spacer by a film-over-wire that encapsulates a portion of the at least one conductive wire, and wherein the package body encapsulates a remaining portion of the at least one conductive wire.
  • 6. The semiconductor device of claim 5, wherein: the RF shield of the RF package defines a peripheral side surface; andthe semiconductor die defines a peripheral side surface, at least a portion of which protrudes outwardly beyond the side surface of the RF shield.
  • 7. A semiconductor device, comprising: a substrate;an RF package including a package substrate which is electrically connected to the substrate by conductive bumps, a plurality electronic components attached to a top surface of the package substrate, inner wire bonds electrically connecting the plurality of electronic components to the package substrate, and an RF shield which is attached to the package substrate without extending to the substrate, wherein the RF shield is spaced apart from the inner wire bonds and the plurality of electronic components;a semiconductor die stacked upon the RF package; anda package body at least partially encapsulating the RF package, the semiconductor die, the conductive bumps, and the substrate.
  • 8. The semiconductor device of claim 7 wherein the substrate comprises: an insulative layer defining opposed first and second surfaces;a plurality of lands disposed on the second surface; anda conductive pattern disposed on the first surface and electrically connected to the lands in a prescribed manner;the conductive bumps being used to facilitate the electrical connection of the RF package to the conductive pattern.
  • 9. The semiconductor device of claim 7 wherein the semiconductor die is electrically connected to the substrate by at least one conductive wire which is encapsulated by the package body.
  • 10. The semiconductor device of claim 7 further comprising a spacer interposed between the semiconductor die and the RF shield, wherein the spacer is electrically connected to the substrate by at least one conductive wire, and wherein the semiconductor die attached to the spacer by a film-over-wire that encapsulates a portion of the at least one conductive wire, and wherein the package body encapsulates a remaining portion of the at least one conductive wire.
  • 11. The semiconductor device of claim 7 wherein: the RF shield of the RF package defines a peripheral side surface; andthe semiconductor die defines a peripheral side surface, at least a portion of which protrudes outwardly beyond the side surface of the RF shield.
  • 12. A semiconductor device, comprising: a substrate;a RF package electrically connected to the substrate, the RF package including a package substrate having an RF shield attached thereto;a spacer attached to the RF shield and electrically coupled to the substrate by at least one conductive wire;a semiconductor die attached to the spacer and electrically connected to the substrate, wherein the semiconductor die is attached to the spacer by a film-over-wire that encapsulates a portion of the at least one conductive wire; anda package body at least partially encapsulating the RF package, the semiconductor die, the spacer, a remaining portion of the at least one conductive wire, and the substrate.
  • 13. The semiconductor device of claim 12 wherein the substrate comprises: an insulative layer defining opposed first and second surfaces;a plurality of lands disposed on the second surface; anda conductive pattern disposed on the first surface and electrically connected to the lands in a prescribe manner.
  • 14. The semiconductor device of claim 13 wherein the RF package is electrically connected to the conductive pattern by conductive bumps which are encapsulated by the package body.
  • 15. The semiconductor of claim 13 wherein the semiconductor die is electrically connected to the conductive pattern by at least one conductive wire which is encapsulated by the package body.
  • 16. The semiconductor device of claim 12 wherein the semiconductor die and the film-over-wire have substantially equal widths.
  • 17. The semiconductor device of claim 12 wherein: the RF shield of the RF package defines a peripheral side surface; andthe semiconductor die defines a peripheral side surface, at least a portion of which protrudes outwardly beyond the side surface of the RF shield.
  • 18. The semiconductor device of claim 12, wherein the spacer protrudes outwardly beyond a peripheral side surface of the RF shield.
  • 19. The semiconductor device of claim 12, wherein the RF package comprises a plurality of electrical components electrically connected to the package substrate.
  • 20. The semiconductor device of claim 12 wherein: the spacer is attached to the RF shield by an adhesive layer; andthe semiconductor die is attached to the spacer have different widths.
CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a continuation of U.S. application Ser. No. 12/351,690 entitled PACKAGE IN PACKAGE STRUCTURE FOR RF TRANSCEIVER MODULE filed Jan. 9, 2009 now U.S. Pat. No. 8,058,715.

US Referenced Citations (352)
Number Name Date Kind
2596993 Gookin May 1952 A
3435815 Forcier Apr 1969 A
3734660 Davies et al. May 1973 A
3838984 Crane et al. Oct 1974 A
4054238 Lloyd et al. Oct 1977 A
4189342 Kock Feb 1980 A
4221925 Finley et al. Sep 1980 A
4258381 Inaba Mar 1981 A
4289922 Devlin Sep 1981 A
4301464 Otsuki et al. Nov 1981 A
4332537 Slepcevic Jun 1982 A
4417266 Grabbe Nov 1983 A
4451224 Harding May 1984 A
4530152 Roche et al. Jul 1985 A
4541003 Otsuka et al. Sep 1985 A
4646710 Schmid et al. Mar 1987 A
4707724 Suzuki et al. Nov 1987 A
4727633 Herrick Mar 1988 A
4737839 Burt Apr 1988 A
4756080 Thorp, Jr. et al. Jul 1988 A
4812896 Rothgery et al. Mar 1989 A
4862245 Pashby et al. Aug 1989 A
4862246 Masuda et al. Aug 1989 A
4907067 Derryberry Mar 1990 A
4920074 Shimizu et al. Apr 1990 A
4935803 Kalfus et al. Jun 1990 A
4942454 Mori et al. Jul 1990 A
4987475 Sclesinger et al. Jan 1991 A
5018003 Yasunaga et al. May 1991 A
5029386 Chao et al. Jul 1991 A
5041902 McShane Aug 1991 A
5057900 Yamazaki Oct 1991 A
5059379 Tsutsumi et al. Oct 1991 A
5065223 Matsuki et al. Nov 1991 A
5070039 Johnson et al. Dec 1991 A
5087961 Long et al. Feb 1992 A
5091341 Asada et al. Feb 1992 A
5096852 Hobson et al. Mar 1992 A
5118298 Murphy Jun 1992 A
5122860 Kichuchi et al. Jun 1992 A
5134773 LeMaire et al. Aug 1992 A
5151039 Murphy Sep 1992 A
5157475 Yamaguchi Oct 1992 A
5157480 McShane et al. Oct 1992 A
5168368 Gow, 3rd et al. Dec 1992 A
5172213 Zimmerman Dec 1992 A
5172214 Casto Dec 1992 A
5175060 Enomoto et al. Dec 1992 A
5200362 Lin et al. Apr 1993 A
5200809 Kwon Apr 1993 A
5214845 King et al. Jun 1993 A
5216278 Lin et al. Jun 1993 A
5218231 Kudo Jun 1993 A
5221642 Burns Jun 1993 A
5250841 Sloan et al. Oct 1993 A
5252853 Michii Oct 1993 A
5258094 Furui et al. Nov 1993 A
5266834 Nishi et al. Nov 1993 A
5273938 Lin et al. Dec 1993 A
5277972 Sakumoto et al. Jan 1994 A
5278446 Nagaraj et al. Jan 1994 A
5279029 Burns Jan 1994 A
5281849 Singh Deo et al. Jan 1994 A
5285352 Pastore et al. Feb 1994 A
5294897 Notani et al. Mar 1994 A
5327008 Djennas et al. Jul 1994 A
5332864 Liang et al. Jul 1994 A
5335771 Murphy Aug 1994 A
5336931 Juskey et al. Aug 1994 A
5343076 Katayama et al. Aug 1994 A
5358905 Chiu Oct 1994 A
5365106 Watanabe Nov 1994 A
5381042 Lerner et al. Jan 1995 A
5391439 Tomita et al. Feb 1995 A
5406124 Morita et al. Apr 1995 A
5410180 Fujii et al. Apr 1995 A
5414299 Wang et al. May 1995 A
5417905 LeMaire et al. May 1995 A
5424576 Djennas et al. Jun 1995 A
5428248 Cha Jun 1995 A
5435057 Bindra et al. Jul 1995 A
5444301 Song et al. Aug 1995 A
5452511 Chang Sep 1995 A
5454905 Fogelson Oct 1995 A
5467032 Lee Nov 1995 A
5474958 Djennas et al. Dec 1995 A
5484274 Neu Jan 1996 A
5493151 Asada et al. Feb 1996 A
5508556 Lin Apr 1996 A
5517056 Bigler et al. May 1996 A
5521429 Aono et al. May 1996 A
5528076 Pavio Jun 1996 A
5534467 Rostoker Jul 1996 A
5539251 Iverson et al. Jul 1996 A
5543657 Diffenderfer et al. Aug 1996 A
5544412 Romero et al. Aug 1996 A
5545923 Barber Aug 1996 A
5581122 Chao et al. Dec 1996 A
5592019 Ueda et al. Jan 1997 A
5592025 Clark et al. Jan 1997 A
5594274 Suetaki Jan 1997 A
5595934 Kim Jan 1997 A
5604376 Hamburgen et al. Feb 1997 A
5608265 Kitano et al. Mar 1997 A
5608267 Mahulikar et al. Mar 1997 A
5625222 Yoneda et al. Apr 1997 A
5633528 Abbott et al. May 1997 A
5637922 Fillion et al. Jun 1997 A
5639990 Nishihara et al. Jun 1997 A
5640047 Nakashima Jun 1997 A
5641997 Ohta et al. Jun 1997 A
5643433 Fukase et al. Jul 1997 A
5644169 Chun Jul 1997 A
5646831 Manteghi Jul 1997 A
5650663 Parthasaranthi Jul 1997 A
5661088 Tessier et al. Aug 1997 A
5665996 Williams et al. Sep 1997 A
5673479 Hawthorne Oct 1997 A
5683806 Sakumoto et al. Nov 1997 A
5683943 Yamada Nov 1997 A
5689135 Ball Nov 1997 A
5696666 Miles et al. Dec 1997 A
5701034 Marrs Dec 1997 A
5703407 Hori Dec 1997 A
5710064 Song et al. Jan 1998 A
5723899 Shin Mar 1998 A
5724233 Honda et al. Mar 1998 A
5726493 Yamashita Mar 1998 A
5736432 Mackessy Apr 1998 A
5745984 Cole, Jr. et al. May 1998 A
5753532 Sim May 1998 A
5753977 Kusaka et al. May 1998 A
5766972 Takahashi et al. Jun 1998 A
5767566 Suda Jun 1998 A
5770888 Song et al. Jun 1998 A
5776798 Quan et al. Jul 1998 A
5783861 Son Jul 1998 A
5801440 Chu et al. Sep 1998 A
5814877 Diffenderfer et al. Sep 1998 A
5814881 Alagaratnam et al. Sep 1998 A
5814883 Sawai et al. Sep 1998 A
5814884 Davis et al. Sep 1998 A
5817540 Wark Oct 1998 A
5818105 Kouda Oct 1998 A
5821457 Mosley et al. Oct 1998 A
5821615 Lee Oct 1998 A
5834830 Cho Nov 1998 A
5835988 Ishii Nov 1998 A
5844306 Fujita et al. Dec 1998 A
5854511 Shin et al. Dec 1998 A
5854512 Manteghi Dec 1998 A
5856911 Riley Jan 1999 A
5859471 Kuraishi et al. Jan 1999 A
5866939 Shin et al. Feb 1999 A
5866942 Suzuki et al. Feb 1999 A
5871782 Choi Feb 1999 A
5874784 Aoki et al. Feb 1999 A
5877043 Alcoe et al. Mar 1999 A
5886397 Ewer Mar 1999 A
5973935 Schoenfeld et al. Oct 1999 A
5977630 Woodworth et al. Nov 1999 A
RE36773 Nomi et al. Jul 2000 E
6107679 Noguchi Aug 2000 A
6143981 Glenn Nov 2000 A
6150709 Shin et al. Nov 2000 A
6166430 Yamaguchi Dec 2000 A
6169329 Farnworth et al. Jan 2001 B1
6177718 Kozono Jan 2001 B1
6181002 Juso et al. Jan 2001 B1
6184465 Corisis Feb 2001 B1
6184573 Pu Feb 2001 B1
6194777 Abbott et al. Feb 2001 B1
6197615 Song et al. Mar 2001 B1
6198171 Huang et al. Mar 2001 B1
6201186 Daniels et al. Mar 2001 B1
6201292 Yagi et al. Mar 2001 B1
6204554 Ewer et al. Mar 2001 B1
6208020 Minamio et al. Mar 2001 B1
6208021 Ohuchi et al. Mar 2001 B1
6208023 Nakayama et al. Mar 2001 B1
6211462 Carter, Jr. et al. Apr 2001 B1
6218731 Huang et al. Apr 2001 B1
6222258 Asano et al. Apr 2001 B1
6222259 Park et al. Apr 2001 B1
6225146 Yamaguchi et al. May 2001 B1
6229200 McClellan et al. May 2001 B1
6229205 Jeong et al. May 2001 B1
6238952 Lin et al. May 2001 B1
6239367 Hsuan et al. May 2001 B1
6239384 Smith et al. May 2001 B1
6242281 McClellan et al. Jun 2001 B1
6256200 Lam et al. Jul 2001 B1
6258629 Niones et al. Jul 2001 B1
6261864 Jung et al. Jul 2001 B1
6281566 Magni Aug 2001 B1
6281568 Glenn et al. Aug 2001 B1
6282094 Lo et al. Aug 2001 B1
6282095 Houghton et al. Aug 2001 B1
6285075 Combs et al. Sep 2001 B1
6291271 Lee et al. Sep 2001 B1
6291273 Miyaki et al. Sep 2001 B1
6294100 Fan et al. Sep 2001 B1
6294830 Fjelstad Sep 2001 B1
6295977 Ripper et al. Oct 2001 B1
6297548 Moden et al. Oct 2001 B1
6303984 Corisis Oct 2001 B1
6303997 Lee Oct 2001 B1
6306685 Liu et al. Oct 2001 B1
6307272 Takahashi et al. Oct 2001 B1
6309909 Ohgiyama Oct 2001 B1
6316822 Vekateshwaran et al. Nov 2001 B1
6316838 Ozawa et al. Nov 2001 B1
6323550 Martin et al. Nov 2001 B1
6326243 Suzuya et al. Dec 2001 B1
6326244 Brooks et al. Dec 2001 B1
6326678 Karmezos et al. Dec 2001 B1
6335564 Pour Jan 2002 B1
6337510 Chun-Jen et al. Jan 2002 B1
6339252 Niones et al. Jan 2002 B1
6339255 Shin Jan 2002 B1
6342730 Jung et al. Jan 2002 B1
6348726 Bayan et al. Feb 2002 B1
6355502 Kang et al. Mar 2002 B1
6359221 Yamada et al. Mar 2002 B1
6362525 Rahim Mar 2002 B1
6369447 Mori Apr 2002 B2
6369454 Chung Apr 2002 B1
6373127 Baudouin et al. Apr 2002 B1
6377464 Hashemi et al. Apr 2002 B1
6380048 Boon et al. Apr 2002 B1
6384472 Huang May 2002 B1
6388336 Venkateshwaran et al. May 2002 B1
6395578 Shin et al. May 2002 B1
6399415 Bayan et al. Jun 2002 B1
6400004 Fan et al. Jun 2002 B1
6410979 Abe Jun 2002 B2
6414385 Huang et al. Jul 2002 B1
6420779 Sharma et al. Jul 2002 B1
6421013 Chung Jul 2002 B1
6423643 Furuhata et al. Jul 2002 B1
6429508 Gang Aug 2002 B1
6437429 Su et al. Aug 2002 B1
6444499 Swiss et al. Sep 2002 B1
6448633 Yee et al. Sep 2002 B1
6452279 Shimoda Sep 2002 B2
6459148 Chun-Jen et al. Oct 2002 B1
6464121 Reijinders Oct 2002 B2
6465883 Oloffson Oct 2002 B2
6472735 Isaak Oct 2002 B2
6475646 Park et al. Nov 2002 B2
6476469 Huang et al. Nov 2002 B2
6476474 Hung Nov 2002 B1
6482680 Khor et al. Nov 2002 B1
6483178 Chuang Nov 2002 B1
6492718 Ohmori et al. Dec 2002 B2
6495909 Jung et al. Dec 2002 B2
6498099 McClellan et al. Dec 2002 B1
6498392 Azuma Dec 2002 B2
6507096 Gang Jan 2003 B2
6507120 Lo et al. Jan 2003 B2
6518089 Coyle Feb 2003 B2
6525942 Huang et al. Feb 2003 B2
6528893 Jung et al. Mar 2003 B2
6534849 Gang Mar 2003 B1
6545332 Huang Apr 2003 B2
6545345 Glenn et al. Apr 2003 B1
6552421 Kishimoto et al. Apr 2003 B2
6559525 Huang May 2003 B2
6566168 Gang May 2003 B2
6580161 Kobayakawa Jun 2003 B2
6583503 Akram et al. Jun 2003 B2
6585905 Fan et al. Jul 2003 B1
6603196 Lee et al. Aug 2003 B2
6624005 DiCaprio et al. Sep 2003 B1
6627977 Foster Sep 2003 B1
6646339 Ku Nov 2003 B1
6667546 Huang et al. Dec 2003 B2
6677663 Ku et al. Jan 2004 B1
6686649 Matthews et al. Feb 2004 B1
6696752 Su et al. Feb 2004 B2
6700189 Shibata Mar 2004 B2
6713375 Shenoy Mar 2004 B2
6757178 Okabe et al. Jun 2004 B2
6800936 Kosemura et al. Oct 2004 B2
6812552 Islam et al. Nov 2004 B2
6818973 Foster Nov 2004 B1
6858919 Seo et al. Feb 2005 B2
6867492 Auburger et al. Mar 2005 B2
6876068 Lee et al. Apr 2005 B1
6878571 Isaak et al. Apr 2005 B2
6897552 Nakao May 2005 B2
6927478 Paek Aug 2005 B2
6967125 Fee et al. Nov 2005 B2
6995459 Lee et al. Feb 2006 B2
7002805 Lee et al. Feb 2006 B2
7005327 Kung et al. Feb 2006 B2
7015571 Chang et al. Mar 2006 B2
7045396 Crowley et al. May 2006 B2
7053469 Koh et al. May 2006 B2
7075816 Fee et al. Jul 2006 B2
7102209 Bayan et al. Sep 2006 B1
7109572 Fee et al. Sep 2006 B2
7185426 Hiner et al. Mar 2007 B1
7193298 Hong et al. Mar 2007 B2
7211471 Foster May 2007 B1
7242081 Lee Jul 2007 B1
7245007 Foster Jul 2007 B1
7253503 Fusaro et al. Aug 2007 B1
8058715 Roa et al. Nov 2011 B1
20010008305 McClellan et al. Jul 2001 A1
20010014538 Kwan et al. Aug 2001 A1
20020011654 Kimura Jan 2002 A1
20020024122 Jung et al. Feb 2002 A1
20020027297 Ikenaga et al. Mar 2002 A1
20020038873 Hiyoshi Apr 2002 A1
20020072147 Sayanagi et al. Jun 2002 A1
20020111009 Huang et al. Aug 2002 A1
20020140061 Lee Oct 2002 A1
20020140068 Lee et al. Oct 2002 A1
20020140081 Chou et al. Oct 2002 A1
20020158318 Chen Oct 2002 A1
20020163015 Lee et al. Nov 2002 A1
20020167060 Buijsman et al. Nov 2002 A1
20030006055 Chien-Hung et al. Jan 2003 A1
20030030131 Lee et al. Feb 2003 A1
20030059644 Datta et al. Mar 2003 A1
20030064548 Isaak Apr 2003 A1
20030073265 Hu et al. Apr 2003 A1
20030102537 McLellan et al. Jun 2003 A1
20030164554 Fee et al. Sep 2003 A1
20030168719 Cheng et al. Sep 2003 A1
20030198032 Collander et al. Oct 2003 A1
20040027788 Chiu et al. Feb 2004 A1
20040056277 Karnezos Mar 2004 A1
20040061212 Karnezos Apr 2004 A1
20040061213 Karnezos Apr 2004 A1
20040063242 Karnezos Apr 2004 A1
20040063246 Karnezos Apr 2004 A1
20040065963 Karnezos Apr 2004 A1
20040080025 Kasahara et al. Apr 2004 A1
20040089926 Hsu et al. May 2004 A1
20040164387 Ikenaga et al. Aug 2004 A1
20040253803 Tomono et al. Dec 2004 A1
20060087020 Hirano et al. Apr 2006 A1
20060097402 Pu et al. May 2006 A1
20060157843 Hwang Jul 2006 A1
20060186524 Aiba et al. Aug 2006 A1
20060216868 Yang et al. Sep 2006 A1
20060231939 Kawabata et al. Oct 2006 A1
20070023202 Shibata Feb 2007 A1
20080230887 Sun et al. Sep 2008 A1
20090001599 Foong et al. Jan 2009 A1
Foreign Referenced Citations (87)
Number Date Country
19734794 Aug 1997 DE
0393997 Oct 1990 EP
0459493 Dec 1991 EP
0720225 Mar 1996 EP
0720234 Mar 1996 EP
0794572 Oct 1997 EP
0844665 May 1998 EP
0936671 Aug 1999 EP
0989608 Mar 2000 EP
1032037 Aug 2000 EP
55163868 Dec 1980 JP
5745959 Mar 1982 JP
58160096 Aug 1983 JP
59208756 Nov 1984 JP
59227143 Dec 1984 JP
60010756 Jan 1985 JP
60116239 Aug 1985 JP
60195957 Oct 1985 JP
60231349 Nov 1985 JP
6139555 Feb 1986 JP
61248541 Nov 1986 JP
629639 Jan 1987 JP
6333854 Feb 1988 JP
63067762 Mar 1988 JP
63188964 Aug 1988 JP
63205935 Aug 1988 JP
63233555 Sep 1988 JP
63249345 Oct 1988 JP
63289951 Nov 1988 JP
63316470 Dec 1988 JP
64054749 Mar 1989 JP
1106456 Apr 1989 JP
1175250 Jul 1989 JP
1205544 Aug 1989 JP
1251747 Oct 1989 JP
2129948 May 1990 JP
369248 Jul 1991 JP
3177060 Aug 1991 JP
3289162 Dec 1991 JP
4098864 Mar 1992 JP
5129473 May 1993 JP
5166992 Jul 1993 JP
5283460 Oct 1993 JP
6061401 Mar 1994 JP
692076 Apr 1994 JP
6140563 May 1994 JP
652333 Sep 1994 JP
6252333 Sep 1994 JP
6260532 Sep 1994 JP
7297344 Nov 1995 JP
7312405 Nov 1995 JP
8064364 Mar 1996 JP
8083877 Mar 1996 JP
8125066 May 1996 JP
964284 Jun 1996 JP
8222682 Aug 1996 JP
8306853 Nov 1996 JP
98205 Jan 1997 JP
98206 Jan 1997 JP
98207 Jan 1997 JP
992775 Apr 1997 JP
9260568 Oct 1997 JP
9293822 Nov 1997 JP
10022447 Jan 1998 JP
10199934 Jul 1998 JP
10256240 Sep 1998 JP
11307675 Nov 1999 JP
2000150765 May 2000 JP
20010600648 Mar 2001 JP
2002519848 Jul 2002 JP
200203497 Aug 2002 JP
2003243595 Aug 2003 JP
2004158753 Jun 2004 JP
941979 Jan 1994 KR
19940010938 May 1994 KR
19950018924 Jun 1995 KR
19950041844 Nov 1995 KR
19950044554 Nov 1995 KR
19950052621 Dec 1995 KR
1996074111 Dec 1996 KR
9772358 Nov 1997 KR
100220154 Jun 1999 KR
20000072714 Dec 2000 KR
20000086238 Dec 2000 KR
20020049944 Jun 2002 KR
9956316 Nov 1999 WO
9967821 Dec 1999 WO
Non-Patent Literature Citations (3)
Entry
National Semiconductor Corporation, “Leadless Leadframe Package,” Informational Pamphlet from webpage, 21 pages, Oct. 2002, www.national.com.
Vishay, “4 Milliohms in the So-8: Vishay Siliconix Sets New Record for Power MOSFET On-Resistance,” Press Release from webpage, 3 pages, www.vishay.com/news/releases, Nov. 7, 2002.
Patrick Mannion, “MOSFETs Break out of the Shackles of Wire Bonding,” Informational Packet, 5 pages, Electronic Design, Mar. 22, 1999 vol. 47, No. 6, www.elecdesign.com/1999/mar2299/ti/0322ti1.shtml.
Continuations (1)
Number Date Country
Parent 12351690 Jan 2009 US
Child 13246564 US