Claims
- 1. A method of manufacturing a semiconductor device comprising the steps of:
(a) preparing a semiconductor chip having a plurality of semiconductor elements and a row of external terminals on a main surface thereof; (b) preparing a wiring substrate having a wiring substrate base, a first array of bump lands, a second array of bump lands, the wiring substrate base being provided with an opening positioned between the first and second array of bump lands, and a plurality of leads respectively forming bridge connections between the first array of bump lands and the second array of bump lands over the opening; (c) positioning the wiring substrate over the main surface of the semiconductor chip such that the opening is positioned over the row of external terminals; (d) cutting the plurality of leads at respective portions thereof over the opening and bonding each of the plurality of leads on corresponding one of the external terminals through the opening, respectively.
- 2. A method of manufacturing a semiconductor device according to claim 1, further comprising the steps of:
(e) sealing the row of external terminals and the plurality of leads bonded with the external terminals by potting method through the opening.
- 3. A method of manufacturing a semiconductor device according to claim 1,
wherein each of the plurality of leads has a notch located at the bridging portion thereof over the opening, and wherein, in step (d), each of the plurality of leads is cut at the notch thereof.
- 4. A method of manufacturing a semiconductor device according to claim 1, wherein the minimum interval of the external terminals is smaller than the minimum interval of the bump lands.
- 5. A method of manufacturing a semiconductor device according to claim 1, wherein, in step (c), the wiring substrate is positioned over the main surface of the semiconductor chip through an elastic layer.
- 6. A method of manufacturing a semiconductor device according to claim 1, further comprising a step of:
(e) providing bump electrodes on each of the bump lands of the first and second array of bump lands, respectively.
- 7. A method of manufacturing a semiconductor device according to claim 5,
wherein each of the plurality of leads has a notch located at the bridging portion thereof over the opening, and wherein, in step (d), each of the plurality of leads is cut at the notch thereof.
- 8. A method of manufacturing a semiconductor device according to claim 7, further comprising the steps of:
(e) sealing the row of external terminals and the plurality of leads bonded with the external terminals by potting method through the opening.
- 9. A method of manufacturing a semiconductor device according to claim 8, further comprising a step of:
(f) providing bump electrodes on each of the bump lands of the first and second array of bump lands, respectively.
- 10. A method of manufacturing a semiconductor device according to claim 5, wherein the minimum interval of the external terminals is smaller than the minimum interval of the bump lands.
- 11. A method of manufacturing a semiconductor device comprising the steps of:
(a) preparing a semiconductor chip having a plurality of semiconductor elements and an external terminal on the main surface, (b) preparing a wiring substrate comprising a wiring substrate base, a bump land, an anchor wiring, the wiring substrate base being provided with an opening between the bump land and the anchor wiring, and a lead forming a bridge connection between the bump land and the anchor wiring over the opening, wherein the anchor wiring is wider than the lead; (c) positioning the wiring substrate over the main surface of the semiconductor chip such that the opening is positioned over the external terminal; and (d) cutting the lead at a portion thereof over the opening and bonding the lead on the external terminal through the opening.
- 12. A method of manufacturing a semiconductor device according to claim 11, wherein, in step (c), the wiring substrate is positioned over the main surface of the semiconductor chip through an elastic layer.
- 13. A method of manufacturing a semiconductor device comprising the steps of:
(a) preparing a semiconductor chip having a plurality of semiconductor elements and a row of external terminals on a main surface thereof; (b) preparing a wiring substrate comprising a wiring substrate base, a plurality of bump lands, a plurality of anchor wirings, the wiring substrate base having an opening positioned between the plurality of bump lands and the plurality of anchor wirings, and a plurality of leads respectively forming bridge connections between the plurality of bump lands and the plurality of anchor wirings, over the opening, wherein the plurality of anchor wirings are wider than the plurality of leads; (c) positioning the wiring substrate over the main surface of the semiconductor chip such that the opening is positioned over the row of external terminals; and (d) cutting the plurality of leads at respective portions thereof over the opening and bonding each of the plurality of leads on corresponding ones of the external terminals through the opening, respectively.
- 14. A method of manufacturing a semiconductor device according to claim 13,
wherein, in step (c), the wiring substrate is positioned over the main surface of the semiconductor chip through an elastic layer.
- 15. A method of manufacturing a semiconductor device according to claim 14,
wherein each of the plurality of leads has a notch located at the bridging portion thereof over the opening, and wherein, in step (d), each of the plurality of leads is cut at the notch thereof.
- 16. A method of manufacturing a semiconductor device according to claim 15, further comprising a step of:
(e) providing bump electrodes on each of the bump lands of the first and second array of bump lands, respectively.
- 17. A method of manufacturing a semiconductor device according to claim 16, further comprising a step of:
(e) sealing the row of external terminals and the plurality of leads bonded with the external terminals by potting method through the opening.
- 18. A method of manufacturing a semiconductor device according to claim 15, further comprising a step of:
(e) sealing the row of external terminals and the plurality of leads bonded with the external terminals by potting method through the opening.
- 19. A method of manufacturing a semiconductor device according to claim 18, further comprising a step of:
(f) providing bump electrodes on each of the bump lands of the first and second array of bump lands, respectively.
Priority Claims (1)
Number |
Date |
Country |
Kind |
8-66637 |
Mar 1996 |
JP |
|
Parent Case Info
[0001] This is a division of U.S. Ser. No. 09/449,834, filed Nov. 26, 1999, which, in turn, is a continuation of U.S. Ser. No. 08/822,833, filed Mar. 21, 1997, and the disclosures of which are incorporated herein by reference.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09449834 |
Nov 1999 |
US |
Child |
09770494 |
Jan 2001 |
US |
Continuations (1)
|
Number |
Date |
Country |
Parent |
08822933 |
Mar 1997 |
US |
Child |
09449834 |
Nov 1999 |
US |