The present invention relates to a semiconductor device and a method for producing the same.
When producing a semiconductor device, there has conventionally known a technique that arranges a plurality of diced semiconductor chips on a wafer substrate and seals the semiconductor chips with a thermosetting mold resin (Patent Document 1). The semiconductor chip is sealed within an insulating layer by a thermosetting process of the mold resin, which has a problem of an occurrence of a positional shift of the semiconductor chips placed on the wafer due to a shrinkage effect of the resin and a thermal expansion effect of the wafer during the thermosetting process. In the case of employing a process of resin sealing after the semiconductor chips are disposed on the wafer, a chip surface and a mold surface do not always become flush to possibly cause a level difference therebetween, and thus, there lies a problem that the level difference causes various failures when a redistribution layer is formed on the chip surface.
In order to avoid the above-described problem, there has been proposed, for example, a technique that provides a recess on a substrate, three-dimensionally provides wirings on a surface inside the recess, mounts a semiconductor chip on the wirings, and connects electrodes of the semiconductor chip to the wirings (Patent Document 2). Further in the technique of Patent Document 2, the vicinities of the connected positions between the semiconductor chip and the wirings are at least sealed with resin, and external connected portions of the respective wirings are partly exposed.
Patent Document 1: JP-A-2015-053468
Patent Document 2: JP-A-2000-164759
As in the technique described in Patent Document 2, three-dimensionally providing the wirings (the redistribution layer) from the inside over to the outside of the recess of the substrate is associated with a technical difficulty, and has a problem of causing an increased producing cost and a deterioration in yield. Three-dimensionally forming the wirings lengthens connection paths of the wirings, and therefore, there also is a problem of disadvantageous electric property.
Therefore, one of objectives of the present invention is to provide a semiconductor device that ensures suppressing the occurrence of a positional shift of a semiconductor chip during resin sealing and forming a redistribution layer easily and accurately, and a method for producing the same.
A first aspect of the present invention relates to a semiconductor device. The semiconductor device according to the present invention at least includes a substrate, a circuit element, and a redistribution layer. The substrate is formed of a cured thermosetting resin and has one or a plurality of recesses. The circuit element is disposed in the recess of the substrate. Examples of the “circuit element” are a semiconductor chip, such as an LSI, and an electronic element, such as a wireless antenna, an optical sensor, and a resistive element. The redistribution layer is electrically connected to the circuit element on an opening side of the recess. That is, the recess of the substrate is formed of the opening, side surfaces, and a bottom surface, and the redistribution layer is formed on the opening side on an opposite side of the bottom surface among them. The redistribution layer is preferred to be planarly formed.
As in the above-described configuration, the recess is formed on the already-heat-cured substrate, and the circuit element, such as the semiconductor chip, is disposed there in the present invention. In view of this, even when the circuit element is sealed with the thermosetting mold resin, the occurrence of the positional shift of the circuit element caused by the shrinkage effect of the resin during the thermosetting process can be avoided. Since the already-heat-cured one is used for the substrate, an expansion of the substrate during the thermosetting process of the mold resin can be suppressed. Furthermore, planarly forming the redistribution layer on the opening side of the recess eliminates the need for providing a three-dimensional wiring as in the technique of Patent Document 2, thereby ensuring easily and accurately forming the redistribution layer.
Conventionally, the thermosetting resin (the mold resin) is a material that has been developed to mainly seal the circuit element, and, generally, placing the circuit element in a mold and performing the thermosetting process after pushing an uncured thermosetting resin into the mold seals the circuit element inside the resin. The present invention uses the thermosetting resin, not for the usage of sealing the circuit element, but for just forming a base material for disposing the circuit element. Accordingly, in the present invention, the thermosetting resin is used not for the original sealing usage but is used only for forming the substrate (also referred to as a wafer or a panel) with the recess, and curing of the thermosetting resin is completely terminated by a phase where the circuit element is mounted on the substrate. The circuit element disposed on the substrate has its circuit formed by forming the redistribution layer thereafter. When the thermosetting resin is used in a conventional way, as described above, the problem, such as a positional shift of the circuit element, is caused by a shrinkage of the resin associated with curing. The present invention ensures overcoming disadvantage of such a thermosetting resin.
In the semiconductor device according to the present invention, the substrate may have the plurality of recesses having different depths. Thus differentiating the depths of the recesses ensures disposing a plurality of kinds of circuit elements with different thicknesses on the substrate.
In the semiconductor device according to the present invention, one or a plurality of recesses may be formed on both a first surface and a second surface of the substrate. Thus providing the recesses on both the surfaces of the substrate ensures an improved integration of the circuit elements.
In the semiconductor device according to the present invention, at least one of the recesses of the substrate may have its bottom surface formed into a recessed curved surface. Note that, the “curved surface” includes one having a curved surface shaped cross-sectional surface, other than a hemisphere surface or a parabolic-curved surface. In this case, it is preferred that a wireless antenna or an optical sensor is disposed as, for example, the circuit element in the recess having the bottom surface formed into the recessed curved surface. Thus, the bottom surface of the recess of the substrate can be formed into a curved surface shape so as to match the shape of the circuit element disposed there. In particular, disposing the wireless antenna on the bottom surface formed into a recessed curved surface causes the bottom surface to function like a parabola antenna, and the wireless antenna can receive a weak wireless signal at high sensitivity or at a wide angle. Disposing the optical sensor on the bottom surface formed into a recessed curved surface ensures causing the bottom surface to function like a wide-angle lens and also improving detection sensitivity. Furthermore, disposing the optical sensor in the recess of the substrate ensures causing a Chief Ray Angle (CRA) of this sensor to be a small angle, and therefore, ensures achieving a low CRA of, for example, 30 degrees or less with a physical structure of the substrate.
In the semiconductor device according to the present invention, at least one of the recesses of the substrate may have its bottom surface formed into a projected curved surface. In this case, in the recess having the bottom surface formed into a projected curved surface, a wireless antenna or an optical sensor is preferably disposed as the circuit element. Thus, the bottom surface of the recess of the substrate can be formed into a curved surface shape so as to match the shape of the circuit element disposed there. In particular, disposing the wireless antenna on the bottom surface formed into a projected curved surface ensures outputting the wireless signal at a wide angle, and therefore, the number of elements of the wireless antenna disposed there can be reduced. Disposing the optical sensor on the bottom surface formed to be the projected curved surface ensures contributing to an expanded detection area and improved sensitivity.
In the semiconductor device according to the present invention, the substrate may have a conductor material disposed in the recess to such that the conductor material passes through in a thickness direction of the substrate. That is, the substrate may have a hole portion formed in the recess, and the conductor material may be filled inside the hole portion. As the “conductor material”, a material having both or at least one of conductive property and thermal conductivity is used. Thus, providing the hole portion for disposing the circuit element in the recess and disposing the conductor material in the hole portion ensures forming a conduction on a back surface side of the circuit element or ensures efficiently releasing a heat emitted by the circuit element.
In the semiconductor device according to the present invention, the substrate may have the conductor material disposed in a peripheral area of the recess such that the conductor material passes through in the thickness direction of the substrate. Thus, a through-via can be formed in the peripheral area of the recess.
In the semiconductor device according to the present invention, the thermosetting resin before curing preferably has a thermal conductivity of 0.5 W/mk or more. Using the resin having high thermal conductivity of 0.5 w/mk or more ensures effectively discharging the heat generation from the circuit element internally implanted.
In the semiconductor device according to the present invention, the thermosetting resin preferably includes one or two or more of silica, alumina, aluminum nitride, and boron nitride. Thus, an epoxy resin in which one type or two or more types of silica, alumina, aluminum nitride, and boron nitride are filled can cause the thermal conductivity to be 1.2 W/mk or more, thereby ensuring further enhanced generated heat discharging effect.
Another configuration of the semiconductor device according to the present invention will be described. The semiconductor device according to the present invention includes a substrate, a plurality of circuit elements, a redistribution layer, and a through-via. The substrate is formed of a cured thermosetting resin, has a first surface and a second surface, and one or a plurality of recesses are formed on both the first surface and the second surface. The circuit elements are disposed in the respective recesses on both the first surface and the second surface. The redistribution layers are connected to the circuit elements on opening sides of the recesses on both the first surface and the second surface. The through-via is formed to pass through the substrate in a thickness direction in peripheral areas of the recesses. The redistribution layers on the first surface and the second surface are electrically connected via this through-via. Thus, by disposing the circuit elements in the recesses formed on both surfaces of the substrate and connecting each of the circuit elements to the redistribution layer, as well as disposing the through-via in the peripheral area of the recess of the substrate and connecting the redistribution layers on both surfaces of the substrate via this through-via, the circuit elements on both surfaces of the substrate are electrically connected. Accordingly, a degree of integration of the circuit elements can be improved.
A second aspect of the present invention relates to a method for producing a semiconductor device. In the production method according to the present invention, first, a substrate is formed by heat-curing a thermosetting resin after molding the thermosetting resin into a shape having one or a plurality of recesses (a first step). Next, a circuit element is disposed in the recess of the substrate (a second step). Next, a redistribution layer is connected to the circuit element on an opening side of the recess (a third step). In view of this, the semiconductor device according to the first aspect described above can be efficiently produced.
In the production method according to the present invention, in the step of disposing the circuit element, an adhesive agent with insulating property may be disposed in the recess or on the circuit element to join the substrate and the circuit element with the adhesive agent. Note that, the “adhesive agent” referred to herein widely includes, for example, an adhesive member in a film form besides an adhesive agent in a liquid or in a paste. Thus, using the adhesive agent with insulating property for joining the substrate and the circuit element ensures accurately joining the circuit element in the recess of the substrate and simultaneously forming the insulating layer in the peripheral area of the circuit element with the adhesive agent.
In the production method according to the present invention, in the step of disposing the circuit element, an adhesive agent with conductive property may be disposed in the recess or on the circuit element to join the substrate and the circuit element with the adhesive agent. Using the adhesive agent with conductive property for joining the substrate and the circuit element ensures a conduction from the back surface of the circuit element. Using the conductive paste that uses metal powders as the adhesive agent ensures achieving high thermal conductive property to ensure obtaining a satisfactory heat dissipation characteristic.
The production method according to the present invention may further include a step of causing at least one of the recesses to make a through-hole by drilling the substrate from a second surface side on an opposite side of a first surface on which the recess of the substrate is disposed (a fourth step). While as described above, the recess of the substrate can be obtained by molding the thermosetting resin (a compression method and a transfer method), drilling a part of these recesses from the opposite surface side ensures efficiently forming the through-hole (the through-via).
In the production method according to the present invention, the step of forming the substrate may be a step of forming the substrate by heat-curing a thermosetting resin after molding the thermosetting resin into a shape having one or a plurality of recesses and one or a plurality of through-holes. Accordingly, the recess and the through-hole can be simultaneously formed on the substrate.
In the production method according to the present invention, the step of forming the substrate may bring a thermosetting resin into pressure contact with a surface of a plate member having a projecting portion with conductive property, heat-cure the thermosetting resin with the thermosetting resin surrounding a peripheral area of the projecting portion, and cut off a portion excluding the projecting portion of the plate member, so as to cause the projecting portion to function as a through-via passing through the substrate made of the thermosetting resin in a thickness direction. This ensures forming the through-via on the substrate with a simple step.
With the present invention, the occurrence of a positional shift of a semiconductor chip during resin sealing can be suppressed, and a redistribution layer can be easily and accurately formed.
The following describes embodiments of the present invention using the drawings. The present invention is not limited to the embodiments described below and includes ones appropriately changed in an obvious range by those skilled in the art from the following embodiments.
The substrate 10 can be obtained by performing a thermosetting process after molding an uncured thermosetting resin into a predetermined shape. Accordingly, the substrate 10 is formed of a cured thermosetting resin. As the thermosetting resin, for example, an epoxy resin, a polyimide resin, a phenol resin, a cyanate resin, a polyester resin, an acrylic resin, a bismaleimide resin, a benzoxazine resin, or a mixed resin of one type or two or more types of these can be used.
More specifically describing, as the thermosetting resin that forms the substrate 10, it is preferred to use a material that satisfies the conditions: a glass-transition temperature (Tg) of 125° C. or more (ideally 150° C. or more); a decomposition temperature of 260° C. or more; a room temperature elastic modulus of 500 MPa or more; and a linear expansion coefficient of 60 ppm/° C. or less. Selecting such a material renders the substrate 10 made of the thermosetting resin after curing highly heat resistant, low in linear expansion rate, and high in elastic modulus, thereby ensures obtaining excellent properties compared with a general resin and reducing an introduction cost of the substrate 10 to low. It is also preferred that the thermal conductivity of the uncured thermosetting resin is 0.5 w/mk or more. Using the resin with the high thermal conductivity of 0.5 w/mk or more ensures effectively discharging the generated heat from the circuit element internally implanted. For example, it is possible to cause the thermal conductivity to be 1.2 W/mk or more in an epoxy resin filled with one type or two or more types of silica, alumina, aluminum nitride, and boron nitride.
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In the recess 11 of the substrate 10, its side surface 11b is preferred to be provided with a taper angle. For example, an angle θ formed by the bottom surface 11a and the side surface 11b of the recess 11 is preferred to be 91 to 100 degrees or 92 to 95 degrees. In view of this, the circuit element 20 is easily disposed in the recess 11. Also, after molding the thermosetting resin into a predetermined shape of the substrate 10 using a metallic mold, the completed substrate 10 is easily removed from the metallic mold.
The substrate 10 may be provided with through-holes 12 that pass through from a front surface to a back surface in order to obtain a conduction between the front surface and the back surface. The through-hole 12 may be formed together with the recess on the substrate when the substrate with the recess is molded by a mold construction method as described later. The through-hole 12 can also be drilled at any desired position of the substrate 10 using, for example, a drill, punching, etching, sand-blasting, and a laser.
Although the method for producing the substrate 10 is not particularly limited, particularly, molding by the compression method as illustrated in
In the compression method, as illustrated in
In the transfer method, as illustrated in
In the recesses 11 of the substrate 10, the respective circuit elements 20 are disposed. Examples of the circuit element 20 include a semiconductor chip and an electronic element. Examples of the semiconductor chip include a Large Scale Integration (LSI), an Integrated Circuit (IC), and a transistor. Examples of the electronic element includes a wireless antenna, an optical sensor, a condenser, a coil, and a resistive element. The circuit element 20 has electrode pads 21, and is electrically connected to the redistribution layers 40 via these electrode pads 21. As illustrated in
Within the recesses 11 of the substrate 10, respective insulating layers 30 for sealing the circuit elements 20 are formed. The insulating layer 30 is configured of, for example, an insulating material, such as a known mold resin and ceramic. For example, after joining the circuit element 20 in the recess 11 of the substrate 10, a thermosetting mold resin (uncured) is filled within this recess 11, and thereafter performing the thermosetting process ensures sealing the circuit element 20 within the mold resin. Disposing the circuit element 20 within the recess 11 ensures avoiding the occurrence of the positional shift of the circuit element 20 when the mold resin is filled.
On the opening side of the recess 11 of the substrate 10, the redistribution layer 40 is formed, and the electrode pad 21 of the circuit element 20 is connected to this redistribution layer 40. The redistribution layer 40 electrically connects any desired circuit elements 20, and this forms an electric circuit. A known method is simply used for the method for forming the redistribution layer 40. For example, the redistribution layer 40 may be formed by forming a plating resist on a surface of the substrate 10 to form a resist pattern to have an opening in a predetermined wiring shape, and thereafter, forming a seed layer or the like, and performing an electrolytic plating process or an electroless plating process. Solder balls may be mounted on the redistribution layer 40. The solder ball can be connected to, for example, a package substrate (not illustrated).
A conductor material is filled in the through-hole 12 of the substrate 10, and this forms a through-via 50. For the conductor material, a material having known electrical conductivity and thermal conductivity, such as metal, can be employed. Examples of the conductor material include copper, silver, aluminum, and the like. Forming the through-via 50 ensures connecting the wafers in a vertical direction via the conductor material, and thus, a plurality of the semiconductor chips can be three-dimensionally integrated.
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Note that, for the adhesive agent 31, it is not limited to the one with insulating property, but one with conductive property may be used. The adhesive agents 31 with conductive property include, for example, a conductive paste containing metal powders. Use of the conductive adhesive agent ensures a conduction from the back surface of the circuit element 20. Filling the conductive adhesive in the peripheral area of the circuit element 20 ensures obtaining high thermal conductive property.
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As the conductor material 60 filled within the hole portion 14, a material that has both or at least one of conductive property and thermal conductivity is used. Examples of the conductor material 60 include a metallic material, such as copper, silver, aluminum, and the like. The conductor material 60 filled in the hole portion 14 is directly in contact with the circuit element 20 to play a role to release the heat emitted from the circuit element 20 or electrically connect the circuit element 20 to another circuit. In the example illustrated in
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The redistribution layers 40 are formed on the front surface and the back surface of the substrate 10, and the circuit elements 20 on each of the surfaces are electrically connect to the redistribution layers 40. The through-vias 50 are provided from the front surface over to the back surface of the substrate 10, and this through-via 50 electrically connects the redistribution layer 40 on the front surface of the substrate 10 to the redistribution layer 40 on the back surface. In view of this, electric circuits are established on both surfaces of the substrate 10.
In the second embodiment, insulating films 70 are formed so as to cover the redistribution layers 40 on both surfaces of the substrate 10. The insulating film 70 almost entirely covers the semiconductor device 100 except for a part of openings 71. The opening 71 of the insulating film 70 is disposed so as to expose metallic materials that constitute the redistribution layers 40 on the front surface and/or the back surface of the substrate 10. Accordingly, another semiconductor device or circuit element can be connected to the redistribution layer 40 via the opening 71 of the insulating film 70.
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In the present description, the embodiments of the present invention have been described above by referring to the drawings to express the content of the present invention. However, the present invention is not limited to the above-described embodiments and encompasses changed forms and improved forms obvious for those skilled in the art based on the matters described in the present description.
The present invention may be preferably used in production of a semiconductor device.
10 . . . substrate
10′ . . . thermosetting resin
11 . . . recess
11
a . . . bottom surface
11
b . . . side surface
11
c . . . step portion
12 . . . through-hole
13 . . . burr
14 . . . hole portion
15 . . . recess for through-hole
20 . . . circuit element
21 . . . electrode pad
30 . . . insulating layer
31 . . . adhesive agent
32 . . . photosensitive resin film
40 . . . redistribution layer
41 . . . solder ball
50 . . . through-via
60 . . . conductor material
70 . . . insulating film
71 . . . opening
100 . . . semiconductor device
210 . . . upper metallic mold
211 . . . protrusion portion
212 . . . injection port
220 . . . lower metallic mold
221 . . . depression portion
300 . . . mask sheet
400 . . . plate member
410 . . . metal layer
411 . . . outer frame portion
412 . . . projecting portion
413 . . . surrounded region
420 . . . resin layer
Filing Document | Filing Date | Country | Kind |
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PCT/JP2019/048857 | 12/13/2019 | WO | 00 |
Number | Date | Country | |
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62785993 | Dec 2018 | US |