Semiconductor device, electronic device and fabrication method of the same

Abstract

A semiconductor device includes a lower pad layer, an insulating layer and an upper pad layer. The lower pad layer is provided on a semiconductor substrate. The insulating layer is away from a surrounding of the lower pad layer so that a space having a recess on a surface between the lower pad layer and the insulating layer is formed. The upper pad layer covers over the lower pad layer and the space, extends to an upper face of the insulating layer, and has an area larger than that of the lower pad layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

Preferred embodiments of the present invention will be described in detail with reference to the following drawings, wherein:

FIG. 1A and FIG. 1B illustrate a cross sectional view of a semiconductor device in accordance with a conventional embodiment;

FIG. 2A and FIG. 2B illustrate a problem of the conventional embodiment;

FIG. 3A through FIG. 3E illustrate a cross sectional view showing a fabrication process of a semiconductor device in accordance with a first embodiment;

FIG. 4A through FIG. 4D illustrate a cross sectional view showing a fabrication process of a semiconductor device in accordance with the first embodiment;

FIG. 5 illustrates a cross sectional view of the semiconductor device in accordance with the first embodiment;

FIG. 6 illustrates a cross sectional view of a semiconductor device in accordance with another example of the first embodiment;

FIG. 7 illustrates a cross sectional view of an electronic device in accordance with a second embodiment; and

FIG. 8 illustrates a die shear intensity of the electronic device in accordance with the second embodiment.

Claims

1. A semiconductor device comprising: a lower pad layer provided on a semiconductor substrate;an insulating layer that is away from a surrounding of the lower pad layer so that a space having a recess on a surface between the lower pad layer and the insulating layer is formed; andan upper pad layer that covers over the lower pad layer and the space, that extends to an upper face of the insulating layer, and that has an area larger than that of the lower pad layer.

2. The semiconductor device as claimed in claim 1, wherein: the lower pad layer has a first pad layer provided on the semiconductor substrate and a second pad layer provided on the first pad layer; andthe semiconductor device has a lower insulating layer that is provided between the semiconductor substrate and the insulating layer and that covers a part of an upper face of the first pad layer.

3. The semiconductor device as claimed in claim 1, wherein an upper face and a side face of the upper pad layer is covered with Au.

4. The semiconductor device as claimed in claim 1 further comprising a connecting terminal provided on the upper pad layer.

5. An electronic device comprising: a lower pad layer provided on a semiconductor substrate;an insulating layer that is away from a surrounding of the lower pad layer so that a space having a recess on a surface between the lower pad layer and the insulating layer is formed;an upper pad layer that covers over the lower pad layer and the space, that extends to an upper face of the insulating layer, and that has an area larger than that of the lower pad layer; anda mount portion on which the semiconductor substrate is mounted.

6. The semiconductor device as claimed in claim 5, wherein: the lower pad layer has a first pad layer provided on the semiconductor substrate and a second pad layer provided on the first pad layer; andthe semiconductor device has a lower insulating layer that is provided between the semiconductor substrate and the insulating layer and that covers a part of an upper face of the first pad layer.

7. The semiconductor device as claimed in claim 5 further comprising a connecting terminal provided on the upper pad layer, wherein the semiconductor substrate is mounted on the mount portion with the connecting terminal.

8. The semiconductor device as claimed in claim 5 further comprising a connecting terminal provided on the mount portion on which the semiconductor substrate is mounted, wherein the semiconductor substrate is mounted on the mount portion with the connecting terminal.

9. A fabrication method of a semiconductor device comprising: forming a lower pad layer on a semiconductor substrate;forming an insulating layer that is away from a surrounding of the lower pad layer so that a space having a recess on a surface between the lower pad layer and the insulating layer is formed; andforming an upper pad layer that covers over the lower pad layer and the space, that extends to an upper face of the insulating layer, and that has an area larger than that of the lower pad layer.

10. The method as claimed in claim 9, wherein: the step of forming the lower pad layer comprises forming a first pad layer on the semiconductor substrate and forming a second pad layer on the first pad layer; andthe method further comprises forming a lower insulating layer on the semiconductor substrate so as to cover a part of an upper face of the first pad layer; andthe step of forming the insulating layer comprises forming the insulating layer on the lower insulating layer.

11. The method as claimed in claim 9, wherein the step of forming the upper pad layer comprises forming a metal layer on a top face of the upper pad layer.

12. The method as claimed in claim 9 further comprising forming a connecting terminal on the upper pad layer.

13. A fabrication method of an electronic device comprising: forming a lower pad layer on a semiconductor substrate;forming an insulating layer that is away from a surrounding of the lower pad layer so that a space having a recess on a surface between the lower pad layer and the insulating layer is formed;forming an upper pad layer that covers over the lower pad layer and the space, that extends to an upper face of the insulating layer, and that has an area larger than that of the lower pad layer; andmounting the semiconductor substrate on a mount portion.

14. The method as claimed in claim 13, whrein: the step of forming the lower pad layer comprises forming a first pad layer on the semiconductor substrate and forming a second pad layer on the first pad layer; andthe method further comprises forming a lower insulating layer on the semiconductor substrate so as to cover a part of an upper face of the first pad layer; andthe step of forming the insulating layer comprises forming the insulating layer on the lower insulating layer.

15. The method as claimed in claim 13 further comprising forming a connecting terminal on the upper pad layer, wherein the step of mounting the semiconductor substrate on the mount portion comprises mounting the semiconductor substrate on the mount portion with the connecting terminal.

16. The method as claimed in claim 13 further comprising forming a connecting terminal on the mount portion on which the substrate is mounted, wherein the step of mounting the semiconductor substrate on the mount portion comprises mounting the semiconductor substrate on the mount portion with the connecting terminal.