Semiconductor device having a plurality of semiconductor constructs

Information

  • Patent Application
  • 20070158857
  • Publication Number
    20070158857
  • Date Filed
    January 08, 2007
    17 years ago
  • Date Published
    July 12, 2007
    16 years ago
Abstract
A semiconductor device includes a plurality of semiconductor constructs, each of the semiconductor constructs including a semiconductor substrate and external connection electrodes provided on an upper surface of the semiconductor substrate. The semiconductor substrates of the semiconductor constructs are different in a planar-size. The plurality of semiconductor constructs are stacked from bottom to top in descending order of planar-sizes of the semiconductor substrates included in the plurality of semiconductor constructs. An insulating film at least is provided around one semiconductor construct disposed on the top of the plurality of semiconductor constructs and on another semiconductor construct disposed under the one semiconductor construct. Each of the upper surfaces of the plurality of external connection electrodes is exposed from the one semiconductor construct and from the insulating film.
Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS


FIG. 1 is a plan view of a semiconductor device as a first embodiment of this invention;



FIG. 2 is a sectional view along the line II-II of FIG. 1;



FIG. 3 is a sectional view of initially prepared components in one example of a method of manufacturing the semiconductor device shown in FIG. 2;



FIG. 4 is a sectional view of a step following FIG. 3;



FIG. 5 is a sectional view of a step following FIG. 4;



FIG. 6 is a sectional view of a step following FIG. 5;



FIG. 7 is a sectional view of a step following FIG. 6;



FIG. 8 is a sectional view of a step following FIG. 7;



FIG. 9 is a sectional view of a step following FIG. 8;



FIG. 10 is a sectional view of a step following FIG. 9;



FIG. 11 is a sectional view of a step following FIG. 10;



FIG. 12 is a sectional view of a semiconductor device as a second embodiment of this invention;



FIG. 13 is a sectional view of a predetermined step in one example of a method of manufacturing the semiconductor device shown in FIG. 12;



FIG. 14 is a sectional view of a step following FIG. 13;



FIG. 15 is a sectional view of a semiconductor device as a third embodiment of this invention;



FIG. 16 is a sectional view of a semiconductor device as a fourth embodiment of this invention;



FIG. 17 is a sectional view of a semiconductor device as a fifth embodiment of this invention; and



FIG. 18 is a sectional view of a semiconductor device as a six embodiment of this invention.


Claims
  • 1. A semiconductor device comprising: (i) a plurality of semiconductor constructs, each of the semiconductor constructs including a semiconductor substrate and a plurality of external connection electrodes provided on an upper surface of the semiconductor substrate, the semiconductor substrates of the semiconductor constructs being different in a planar-size, the plurality of semiconductor constructs being stacked from bottom to top in descending order of planar-sizes of the semiconductor substrates included in the plurality of semiconductor constructs;(ii) an insulating film at least provided around one semiconductor construct disposed on the top of the plurality of semiconductor constructs and on another semiconductor construct disposed under the one semiconductor construct,each of the upper surfaces of the plurality of external connection electrodes being exposed from the one semiconductor construct and from the insulating film.
  • 2. The semiconductor device according to claim 1, wherein said another semiconductor construct includes the plurality of external connection electrodes in a peripheral portion of an upper surface thereof; andsaid one semiconductor construct is provided in an area on the another semiconductor construct where the plurality of external connection electrodes are not disposed.
  • 3. The semiconductor device according to claim 2, wherein each of the plurality of external connection electrodes of said another semiconductor construct includes one first bump electrode; andsaid insulating film is provided to cover outer peripheral surfaces of the plurality of first bump electrodes.
  • 4. The semiconductor device according to claim 3, wherein each of the plurality of external connection electrodes of said one semiconductor construct includes one second bump electrode;the one semiconductor construct includes a second sealing film provided to cover outer peripheral surfaces of the plurality of second bump electrodes; andthe insulating film is provided around the one semiconductor construct.
  • 5. The semiconductor device according to claim 3, wherein each of the plurality of external connection electrodes of said one semiconductor construct includes one second bump electrode; andthe insulating film is provided to cover outer peripheral surfaces of the plurality of second bump electrodes.
  • 6. The semiconductor device according to claim 3, wherein a solder ball is provided on each of the first and second bump electrodes.
  • 7. A semiconductor device comprising: (i) a plurality of semiconductor constructs, each of the semiconductor constructs including a semiconductor substrate and a plurality of external connection electrodes provided on an upper surface of the semiconductor substrate, the semiconductor substrates of the semiconductor constructs being different in a planar-size, said plurality of semiconductor constructs being stacked from bottom to top in descending order of planar-sizes of the semiconductor substrates included in the plurality of semiconductor constructs;(ii) an insulating film at least provided around one semiconductor construct disposed on the top of the plurality of semiconductor constructs, and on another semiconductor construct disposed under the one semiconductor construct; and(iii) a plurality of upper layer wiring lines electrically connected to the plurality of external connection electrodes, respectively,all of the plurality of upper layer wiring lines being formed on the one semiconductor construct and on the insulating film.
  • 8. The semiconductor device according to claim 7, wherein said another semiconductor construct includes the plurality of external connection electrodes in a peripheral portion of an upper surface thereof; andsaid one semiconductor construct is provided in an area on the another semiconductor construct where the plurality of external connection electrodes are not disposed.
  • 9. The semiconductor device according to claim 8, wherein each of the plurality of external connection electrodes of said another semiconductor construct includes a first bump electrode;said another semiconductor construct has a first sealing film provided to cover outer peripheral surfaces of the plurality of first bump electrodes; andeach of the plurality of first upper layer wiring lines among said plurality of upper layer wiring lines, electrically connected to the plurality of external connection electrodes of said another semiconductor construct is provided to be connected to an upper surface of one of the plurality of first bump electrodes via one of a plurality of holes provided in the insulating film.
  • 10. The semiconductor device according to claim 9, wherein each of the plurality of external connection electrodes of said one semiconductor construct includes a second bump electrode; andeach of the plurality of second upper layer wiring lines among the plurality of upper layer wiring lines, electrically connected to the plurality of external connection electrodes of said one semiconductor construct is provided on the one semiconductor construct to be connected to an upper surface of one of the plurality of second bump electrodes.
  • 11. The semiconductor device according to claim 9, wherein each of the plurality of external connection electrodes of said one semiconductor construct includes one second bump electrode;the insulating film is provided to cover the plurality of second bump electrodes; andeach of the plurality of second upper layer wiring lines among the plurality of upper layer wiring lines, electrically connected to the plurality of external connection electrodes of said one semiconductor construct is provided on the insulating film to be connected to an upper surface of the bump electrode of said one semiconductor construct via one of a plurality of holes provided in the insulating film.
  • 12. The semiconductor device according to claim 9, further comprising: a plurality of third bump electrodes provided to be electrically connected to electrical connection parts of the plurality of upper layer wiring lines, respectively; andan overcoat film provided to cover outer peripheral surfaces of the plurality of third bump electrodes.
  • 13. The semiconductor device according to claim 12, wherein a solder ball is provided on each of the third columnar electrodes.
  • 14. The semiconductor device according to claim 9, comprising: an overcoat film covering the plurality of upper layer wiring lines without covering the electrical connection parts thereof.
  • 15. The semiconductor device according to claim 14, wherein a solder ball is provided on each of the electrical connection parts of the plurality of upper layer wiring lines.
  • 16. The semiconductor device according to claim 3, wherein each of the plurality of external connection electrodes of said another semiconductor construct further includes one first connection pad, and one wiring line connecting the one first connection pad and one of the plurality of first bump electrodes.
  • 17. The semiconductor device according to claim 9, wherein each of the plurality of external connection electrodes of said another semiconductor construct further includes one first connection pad, and one wiring line connecting the one first connection pad and one of the plurality of first bump electrodes.
  • 18. The semiconductor device according to claim 4, wherein each of the plurality of external connection electrodes of the one semiconductor construct further includes one second connection pad, and one second wiring line connecting the one second connection pad and one of the plurality of second bump electrodes.
  • 19. The semiconductor device according to claim 10, wherein each of the plurality of external connection electrodes of the one semiconductor construct further includes one second connection pad, and one second wiring line connecting the one second connection pad and one of the plurality of second bump electrodes.
  • 20. A semiconductor device comprising: (i) a first semiconductor construct having a first semiconductor substrate, and a plurality of first external connection electrodes provided on the first semiconductor substrate;(ii) a second semiconductor construct having a second semiconductor substrate, a plurality of second external connection electrodes provided on the second semiconductor substrate, and a second sealing film;the first semiconductor substrate being larger in a planar-size than the second semiconductor substrate,the second semiconductor construct being stacked on or over the first semiconductor construct,(iii) an insulating film provided around the second semiconductor construct and on the first semiconductor construct,each of the upper surfaces of the plurality of second external connection electrodes penetrating the second sealing film is exposed from the second sealing film,each of the upper surfaces of the plurality of first external connection electrodes penetrating the insulating film is exposed from the insulating film.
  • 21. A semiconductor device comprising: (i) a first semiconductor construct having a first semiconductor substrate, a plurality of first external connection electrodes provided on the first semiconductor substrate, and a first sealing film;(ii) a second semiconductor construct having a second semiconductor substrate, a plurality of second external connection electrodes provided on the second semiconductor substrate, and a second sealing film;the first semiconductor substrate being larger in a planar-size than the second semiconductor substrate,the second semiconductor construct being stacked on or over the first semiconductor construct,all of the plurality of first external connection electrodes being formed to penetrate the first sealing film,all of the plurality of second external connection electrodes being formed to penetrate the second sealing film,(iii) an insulating film provided around the second semiconductor construct and on the first semiconductor construct;(iv) a plurality of first upper layer wiring lines electrically connected to the plurality of first external connection electrodes, respectively, and formed on the insulating film; and(v) a plurality of second upper layer wiring lines electrically connected to the plurality of second external connection electrodes, respectively, and formed on the second semiconductor construct.
Priority Claims (1)
Number Date Country Kind
2006-002017 Jan 2006 JP national