This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2010-213390, filed Sep. 24, 2010, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device provided with a rear protective film on the other side of a semiconductor substrate and a manufacturing method of the same.
2. Description of the Related Art
What is called a chip size package (CSP) is known from Jpn. Pat. Appln. KOKAI Publication No. 2006-229112. This semiconductor device comprises a semiconductor substrate. A wiring line is provided on the upper surface of an insulating film which is provided on the semiconductor substrate. A columnar external connection electrode is provided on the upper surface of a land of the wiring line. A sealing film made of a resin is provided on the upper surface of the insulating film including the wiring line around the external connection electrode. A solder bump is provided on the upper surface of the external connection electrode. A rear protective film made of a resin is provided on the lower surface of the semiconductor substrate.
According to Jpn. Pat. Appln. KOKAI Publication No. 2006-229112, an insulating film, a wiring line, an external connection electrode, and a sealing film are first formed on a semiconductor substrate in a wafer state (hereinafter referred to as a semiconductor wafer). The lower side of the semiconductor wafer is then ground to reduce the thickness of the semiconductor wafer. A rear protective film is then formed on the lower surface of the semiconductor wafer. A solder bump is then formed on the upper surface of the external connection electrode. The sealing film, the semiconductor wafer, and the rear protective film are then cut along dicing streets, thereby obtaining semiconductor devices.
Although not described in Jpn. Pat. Appln. KOKAI Publication No. 2006-229112, a blade used for the dicing comprises a grindstone produced by molding a binder containing abrasive grains (e.g., diamond grains) into a disk. Depending on processing conditions, the concentration of the abrasive grains needs to be selected. That is, depending on the concentration of the abrasive grains, load applied to each abrasive grain during cutting changes, and the likelihood of self-sharpening (appearance of new abrasive grains in response to the abrasion of the binder caused by cutting) changes. Thus, extra force is applied to some cutting targets, and the cut surfaces of such cutting targets are easily chipped.
Therefore, it is not preferable to cut the resin sealing film, the semiconductor wafer, and the resin rear protective film with one kind of blade. Accordingly, the resin sealing film and the upper side of the semiconductor wafer may be cut with a resin cutting blade, while the rest of the semiconductor wafer and the resin rear protective film may be cut with a semiconductor cutting blade lower in the concentration of abrasive grains than the resin cutting blade. This inhibits the chipping of the cut surface of the semiconductor wafer.
However, if the resin rear protective film is cut with the semiconductor cutting blade, this blade is gradually clogged with the resin. If the semiconductor wafer is cut with the blade being clogged with the resin, the cut surface of the semiconductor wafer is chipped. To avoid such a situation, test cutting called precutting that uses a precut substrate (a dummy of an object to be processed) is needed to stabilize the cutting performance of the blade. However, the problem is that frequent precutting with the blade shortens the life of the blade.
It is therefore an object of the present invention to inhibit the chipping of the cut surface of a semiconductor wafer, slow the clogging of a semiconductor cutting blade with a resin, and reduce the frequency of precutting, thereby prolonging the life of the semiconductor cutting blade. Alternatively, it is an object of the present invention to provide a semiconductor device manufacturing method capable of cutting a semiconductor wafer without using a semiconductor cutting blade, and a semiconductor device thereby obtained.
According to one aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate; a sealing film provided on one side of the semiconductor substrate; and a rear protective film provided on the other side of the semiconductor substrate except for at least its outer edge.
According to another aspect of the present invention, there is provided a semiconductor device manufacturing method comprising: forming a sealing film on one side of a semiconductor wafer and forming a rear protective film on the other side thereof; forming an opening in a part of the rear protective film corresponding to a dicing street; forming, with a first blade, a trench in at least a part of the sealing film corresponding to the dicing street; and dicing, with a second blade, at least the semiconductor wafer in a part corresponding to the dicing street.
According to another aspect of the present invention, there is provided a semiconductor device manufacturing method comprising: forming a sealing film on one side of a semiconductor wafer and forming a rear protective film on the other side thereof; forming an opening in a part of the rear protective film corresponding to a dicing street; forming, with a first blade, a trench in at least a part of the sealing film corresponding to the dicing street; and dividing, by stealth dicing, at least the semiconductor wafer in a part corresponding to the dicing street.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention, and together with the general description given above and the detailed description of the embodiments given below, serve to explain the principles of the invention.
Although not shown, elements that constitute an integrated circuit having a predetermined function, such as a transistor, a diode, a resistor, and a condenser are formed on the upper surface of the silicon substrate 1. Connection pads 4 made of, for example, an aluminum-based metal and connected to the elements of the integrated circuit are provided in the peripheral part of the upper surface of the silicon substrate 1.
A passivation film (insulating film) 5 made of, for example, silicon oxide or silicon nitride is provided on the upper surface of the silicon substrate 1 except for the peripheral part of the silicon substrate 1 and the centers of the connection pads 4. The center of the connection pad 4 is exposed via an opening 6 provided in the passivation film 5. A protective film (insulating film) 7 made of, for example, a polyimide resin is provided on the upper surface of the passivation film 5. An opening 8 is provided in a part of the protective film 7 corresponding to the opening 6 of the passivation film 5.
Wiring lines 9 are provided on the upper surface of the protective film 7. The wiring line 9 has a two-layer structure composed of a foundation metal layer 10 made of, for example, copper and provided on the upper surface of the protective film 7, and an upper metal layer 11 made of copper and provided on the upper surface of the foundation metal layer 10. One end 9a of the wiring line 9 is connected to the connection pad 4 via the openings 6 and 8 of the passivation film 5 and the protective film 7. The other end of the wiring line 9 is a land 9h. An extension line 9c intervenes between the end 9a and the land 9b. A columnar external connection electrode 12 made of copper is provided on the upper surface of the land 9b of the wiring line 9.
A sealing film 13 made of, for example, an epoxy resin or polyimide resin containing a silica filler is provided on the upper surface of the peripheral part of the silicon substrate 1 except for the outer edge 2 and on the upper surface of the protective film 7 including the wiring line 9 around the external connection electrode 12. In this case, the side surface of the sealing film 13 is flush with the vertical surface of the outer edge 2. Here, the external connection electrode 12 is provided so that its upper surface is flush with or several μm lower than the upper surface of the sealing film 13. A solder bump is provided on the upper surface of the external connection electrode 12.
Now, one example of a method of manufacturing this semiconductor device is described. First, as shown in
In this case, the sealing film 13 is made of a resin such as an epoxy resin or polyimide resin containing a silica filler. In
Then, the assembly shown in
Then, as shown in
Then, as shown in
In this case, if this affixing step is performed in a vacuum chamber (not shown), a part of the adhesive layer 26 of the dicing tape 24 enters the opening 23 of the rear protective film 3 and is bonded to at least part of the lower surface of the semiconductor wafer 21 exposed through the opening 23. This can ensure that the lower surface of the semiconductor wafer 21 exposed through the opening 23 is bonded to the dicing tape 24. As a result, the stability of cutting operation in a later-described dicing process can be higher. The dicing tape 24 is essential to keep semiconductor devices together when the semiconductor wafer 21 is completely divided into semiconductor devices in the end.
Then, a dicing machine shown in
Then, the dicing frame jig 42 is lowered so that a later-described first blade 27 does not contact the dicing frame jig 42, and the dicing frame 40 is thereby drawn to a position slightly lower than the lower surface of the semiconductor wafer 21. Further, the semiconductor wafer 21 is vacuum-drawn to the upper surface of the chuck table 41 via the dicing tape 24.
Then, as shown in
Then, as shown in
In this case, the upper side of the adhesive layer 26 has to be only slightly cut to completely divide into semiconductor devices. Clogging when the upper side of the adhesive layer 26 is cut with the second blade 29 is mentioned. In contrast to the thickness of the film 25 of the dicing tape 24 which is about 80 μm, the thickness of the adhesive layer 26 is as small as about 5 to 10 μm. Therefore, as compared with the cutting of the rear protective film 3 having a thickness of 20 to 40 μm, the cutting of the adhesive layer 26 having a small thickness causes slight clogging but has little influence.
The second blade 29 is designed for silicon cutting. However, the opening 23 is formed in advance in the rear protective film 3 made of, for example, an epoxy resin. Therefore, the rear protective film 3 is less cut with the second blade 29 owing to the opening 23, and the second blade 29 is at a much lower risk of being clogged with the resin, thereby making it possible to inhibit the chipping of the cut surface of the semiconductor wafer 21. When the entire lower surface of the semiconductor wafer 21 is covered with the rear protective film 3, the chipping of the cut surface of the semiconductor water 21 can be further prevented. It is, however, preferable that the width of the opening (W1) 23 of the rear protective film 3 be equal to the width of the second blade 29 for cutting the semiconductor wafer 21 to form the second trench (W3) 30 for dicing. This makes it possible to reduce the frequency of precutting with the second blade 29 and prolong the life of the second blade 29.
On the other hand, in the condition shown in
Now, one example of a method of manufacturing this semiconductor device is described. First, after the step shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
In this case, the stealth dicing is used, and no blade is used, so that the disadvantage associated with the use of the blade can be eliminated. The stealth dicing provides a low running cost and still provides a high dicing speed, and neither chips the semiconductor wafer nor produces dust. If the divided silicon substrates 1 and others are then picked up from the dicing tape 24, the semiconductor devices shown in
The solder bump 14 is not exclusively formed at the time described in the first and second embodiments. That is, as shown in
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
Number | Date | Country | Kind |
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2010-213390 | Sep 2010 | JP | national |