1. Field of the Invention
The present invention relates to a semiconductor package and a method for making the same, and more particularly to a semiconductor package having signal coupling pads and a method for making the same.
2. Description of the Related Art
A new technique referred to as “proximity communication” overcomes the limitations of conductive electrical interconnections by using capacitive coupling to provide communications between two chips. This technique provides higher input/output pads densities than traditional wire-bonding and flip-chip bonding input/output pads (about 100 times greater). To achieve proximity communication, the input/output pads disposed on an active surface of each chip are placed face-to-face, and the gap between the input/output pads of different chips must be controlled with extreme accuracy, which is a big challenge.
Therefore, it is necessary to provide a semiconductor package and a method for making the same to solve the above problems.
The present invention is directed to a semiconductor package. The semiconductor package comprises a substrate, at least one first chip, a conductive adhesive, at least one second chip and a dielectric layer. The substrate has a receiving surface and a plurality of substrate pads disposed on the receiving surface. The first chip is attached and electrically connected to the receiving surface of the substrate, and comprises a first active surface, a first back surface, a plurality of first signal coupling pads, a plurality of first chip pads and a redistribution layer. The first back surface faces the receiving surface of the substrate. The first signal coupling pads are disposed adjacent to the first active surface. The first chip pads are disposed adjacent to the first active surface. The redistribution layer extends from the first chip pad to a side surface of the first chip.
The conductive adhesive is disposed between the substrate pad of the substrate and the redistribution layer on the side surface of the first chip. The second chip has a plurality of metal bumps thereon and being attached and electrically connected to the receiving surface of the substrate by the metal bumps. The second chip comprises a second active surface and a plurality of second signal coupling pads. The second active surface faces the receiving surface of the substrate. The second signal coupling pads are disposed adjacent to the second active surface, and capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip. The dielectric layer is provided between the first active surface and the second active surface.
The present invention is further directed to a method for making a semiconductor package. The method comprises, the following steps: (a) providing a substrate having a receiving surface; (b) providing at least one first chip having a dielectric layer thereon, wherein the first chip has a first active surface, a first back surface and a plurality of first signal coupling pads, and the first signal coupling pads are disposed adjacent to the first active surface, and the dielectric layer is disposed on the first active surface of the first chip; (c) attaching and electrically connecting the first chip to the receiving surface of the substrate, wherein the first back surface of the first chip faces the receiving surface of Ale substrate; and (d) attaching and electrically connecting at least one second chip to the receiving surface of the substrate by a plurality of metal bumps thereon, the second chip has a second active surface and a plurality of second signal coupling pads, the second active surface faces the receiving surface of the substrate and contacts the dielectric layer, the second signal coupling pads are disposed adjacent to the second active surface and capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip.
The present invention is further directed to a method for making a semiconductor package. The method comprises the following steps: (a) providing a substrate having a receiving surface; (b) attaching and electrically connecting at least one first chip to the receiving surface of the substrate, wherein the first chip has a first active surface, a first back surface and a plurality of first signal coupling pads, the first back surface faces the receiving surface of the substrate, and the first signal coupling pads are disposed adjacent to the first active surface; and (c) providing at least one second chip having a dielectric layer thereon, wherein the second chip has a second active surface, a plurality of metal bumps and a plurality of second signal coupling pads, the second signal coupling pads and the metal bumps are disposed adjacent to the second active surface, and the dielectric layer is disposed on the second active surface of the second chip; and (d) attaching and electrically connecting the second chip to the receiving surface of the substrate by the metal bumps, the second active surface faces the receiving surface of the substrate, the dielectric layer contacts the first active surface of the first chip, the second signal coupling pads are capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip.
Whereby, the gap between the first signal coupling pads of the first chip and the second signal coupling pads of the second chip is controlled by the thickness of the dielectric layer. Therefore, the mass-production yield of the semiconductor package is increased.
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The first chip 12 is attached and electrically connected to the receiving surface 111 of the substrate 11. The first chip 12 comprises a first active surface 121, a first back surface 122, a plurality of first signal coupling pads 123 a plurality of first chip pads 124 and a redistribution layer 125. The first back surface 122 faces the receiving surface 111 of the substrate 11. The first signal coupling pads 123 are disposed adjacent to the first active surface 121. The first chip pads 124 are disposed adjacent to the first active surface 121 and electrically connected to the substrate pads 112, and more particularly, at an edge of the first chip 12. The redistribution layer 125 extends to a side surface 126 of the first chip 12 for connecting the first chip pads 124 and the substrate pads 112.
The second chip 15 is attached and electrically connected to the receiving surface 111 of the substrate 11 by the metal bumps 16. The second chip 15 comprises a second active surface 151 and a plurality of second signal coupling pads 152. The second active surface 151 faces the receiving surface 111 of the substrate 11. The second signal coupling pads 152 and the metal bumps 16 are disposed adjacent to the second active surface 151. The second signal coupling pads 152 are capacitively coupled to the first signal coupling pads 123 of the first chip 12, so as to provide proximity communication between the first chip 12 and the second chip 15.
The dielectric layer 13 is provided between the first active surface 121 and the second active surface 151. In the embodiment, the dielectric layer 13 is a photo-resist layer. In other embodiment, the dielectric layer 13 may be a passivation layer. The conductive adhesive 14 is disposed between the substrate pad 112 of the substrate 11 and the redistribution layer 125 on the side surface 126 of the first chip 12, so as to electrically connect the substrate 11 and the first chip 12. In the embodiment, the conductive adhesive 14 is a solder paste. In other embodiment, the conductive adhesive 14 may be an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP).
Whereby, the gap between the first signal coupling pads 123 of the first chip 12 and the second signal coupling pads 152 of the second chip 15 is controlled by the thickness of the dielectric layer 13 rather than by the metal bumps 16. Use of the dielectric layer 13 would allow immediate and more accurate control of the gap between the first signal coupling pads 123 and the second signal coupling pads 152 under 20 μm. That is, the thickness of dielectric layer 13 is less than about 20 μm. It is to be noted that the metal bumps 16 are not used to control the gap between the first signal coupling pads 123 and the second signal coupling pads 152. In the embodiment, the number of the second chip 15 is one, the size of the second chip 15 is larger than that of the first chip 12, and the second signal coupling pads 152 are disposed at a center portion of the second chip 15. In other embodiment, as shown in
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It should be noted that the first chip 12 and the second chip 15 communicate with each other through proximity communication between the first signal coupling pads 123 and the second signal coupling pads 152, instead of direct electrical connections; however, electrical power or ground is transmitted between the first chip 12 and the second chip 15 through direct electrical connections (the metal bumps 16).
In order to achieve the function of proximity communication, part of the first chip 12 and the second chip 15 are placed face-to-face in a manner that aligns the transmitter circuit with the receiver circuit in extremely close proximity, for example, with only microns of separation between them. The signals between the transmitter circuit and the receiver circuit may be transmitted by inductive or capacitive coupling with low overall communication cost.
Take transmission by capacitive coupling for example. The first signal coupling pads 123 of the first chip 12 and the second signal coupling pads 152 of the second chip 15 are aligned with each other. Since the first signal coupling pads 123 and the second signal coupling pads 152 are not in physical contact with each other, there are capacitances between the first signal coupling pads 123 of the first chip 12 and the second signal coupling pads 152 of the second chip 15. It is this capacitive coupling that provides signal paths between the first chip 12 and the second chip 15. Changes in the electrical potential of the first signal coupling pads 123 of the first chip 12 cause corresponding changes in the electrical potential of the corresponding second signal coupling pads 152 of the second chip 15. Suitable drivers of the transmitter circuit and sensing circuits of the receiver circuit in the first chip 12 and the second chip 15 make communication through this small capacitance possible.
In the present invention, the gap between the first signal coupling pads 123 of the first chip 12 and the second signal coupling pads 152 of the second chip 15 is controlled by the thickness of the dielectric layer 13. Therefore, such control is very accurate, and the mass-production yield of the semiconductor packages 1, 2 is increased.
While several embodiments of the present invention have been illustrated and described, various modifications and improvements can be made by those skilled in the art. The embodiments of the present invention are therefore described in an illustrative but not restrictive sense. It is intended that the present invention should not be limited to the particular forms as illustrated, and that all modifications which maintain the spirit and scope of the present invention are within the scope defined by the appended claims.