Claims
- 1. A semiconductor system comprising:
a plurality of contiguous semiconductor devices formed from a semiconductor substrate, where each of said semiconductor devices is separated from an adjacent semiconductor device by a scribe lane; a signal line; and a plurality of electrical connections, each electrically coupling a different one of said plurality of contiguous semiconductor devices to said signal line.
- 2. The semiconductor system of claim 1, wherein said plurality of contiguous semiconductor devices are housed in a single package.
- 3. The semiconductor system of claim 1, wherein said plurality of contiguous semiconductor devices, at least part of said signal line, and said plurality of electrical connections are housed in a single package.
- 4. The semiconductor system of claim 1, wherein said plurality of contiguous semiconductor devices are memory devices.
- 5. The semiconductor system of claim 1, wherein each of said plurality of contiguous semiconductor devices is independently operable.
- 6. The semiconductor system of claim 1, wherein each of said plurality of contiguous semiconductor devices includes at least one input/output (i/o) node.
- 7. The semiconductor system of claim 6, wherein each of said plurality of electrical connections couples each at least one input/output (i/o) node with said signal line.
- 8. The semiconductor system of claim 1, wherein said signal line forms at least part of a multidrop bus.
- 9. The semiconductor system of claim 1, wherein said plurality of contiguous semiconductor devices are mounted on a substrate.
- 10. The semiconductor system of claim 9, wherein said signal line is formed on said substrate.
- 11. The semiconductor system of claim 9, wherein said substrate is selected from a group consisting of: a printed circuit board, a thin-film substrate, a flexible tape, a polyimide tape, and any combination of the aforementioned.
- 12. The semiconductor system of claim 9, wherein patterned metal traces are formed on said substrate by at least part of said signal line and said plurality of electrical connections.
- 13. The semiconductor system of claim 1, wherein each of said electrical connections has a controlled impedance between 20 Ohms and 100 Ohms.
- 14. The semiconductor system of claim 1, wherein each of said electrical connections has a controlled impedance that matches an impedance of an external circuit board within about 30%.
- 15. A semiconductor module comprising:
a signal line; at least two contiguous semiconductor devices formed from a semiconductor substrate, where adjacent semiconductor devices define a scribe lane there between, and where each of said semiconductor devices is electrically coupled to said signal line.
- 16. The semiconductor system of claim 15, wherein said plurality of contiguous semiconductor devices are housed in a single package.
- 17. The semiconductor system of claim 15, wherein said plurality of contiguous semiconductor devices, at least part of said signal line, and said plurality of electrical connections are housed in a single package.
- 18. The semiconductor system of claim 15, wherein said plurality of contiguous semiconductor devices are memory devices.
- 19. The semiconductor system of claim 15, wherein each of said plurality of contiguous semiconductor devices is independently operable.
- 20. The semiconductor system of claim 15, wherein each of said plurality of contiguous semiconductor devices includes at least one input/output (i/o) node.
- 21. The semiconductor system of claim 20, wherein each of said plurality of electrical connections couples each at least one input/output (i/o) node with said signal line.
- 22. The semiconductor system of claim 15, wherein said signal line forms at least part of a multidrop bus.
- 23. The semiconductor system of claim 15, wherein said plurality of contiguous semiconductor devices are mounted on a substrate.
- 24. The semiconductor system of claim 23, wherein said signal line is formed on said substrate.
- 25. The semiconductor system of claim 23, wherein said substrate is selected from a group consisting of: a printed circuit board, a thin-film substrate, a flexible tape, a polyimide tape, and any combination of the aforementioned.
- 26. The semiconductor system of claim 23, wherein patterned metal traces are formed on said substrate by at least part of said signal line and said plurality of electrical connections.
- 27. The semiconductor system of claim 15, wherein each of said electrical connections has a controlled impedance between 20 Ohms and 100 Ohms.
- 28. The semiconductor system of claim 15, wherein each of said electrical connections has a controlled impedance that matches an impedance of an external circuit board within about 30%.
- 29. A semiconductor module comprising:
a package; a signal line disposed at least partially within said package; a plurality of contiguous memory devices disposed within said package and formed from a single semiconductor substrate, where each of said semiconductor devices is electrically coupled to signal line.
- 30. The semiconductor system of claim 29, wherein said plurality of contiguous semiconductor devices are memory devices.
- 31. The semiconductor system of claim 29, wherein each of said plurality of contiguous semiconductor devices is independently operable.
- 32. The semiconductor system of claim 29, wherein each of said plurality of contiguous semiconductor devices includes at least one input/output (i/o) node.
- 33. The semiconductor system of claim 32, wherein each of said plurality of electrical connections couples each at least one input/output (i/o) node with said signal line.
- 34. The semiconductor system of claim 29, wherein said signal line forms at least part of a multidrop bus.
- 35. The semiconductor system of claim 29, wherein said plurality of contiguous semiconductor devices are mounted on a substrate.
- 36. The semiconductor system of claim 35, wherein said signal line is formed on said substrate.
- 37. The semiconductor system of claim 35, wherein said substrate is selected from a group consisting of: a printed circuit board, a thin-film substrate, a flexible tape, a polyimide tape, and any combination of the aforementioned.
- 38. The semiconductor system of claim 35, wherein patterned metal traces are formed on said substrate by at least part of said signal line and said plurality of electrical connections.
- 39. The semiconductor system of claim 29, wherein each of said electrical connections has a controlled impedance between 20 Ohms and 100 Ohms.
- 40. The semiconductor system of claim 29, wherein each of said electrical connections has a controlled impedance that matches an impedance of an external circuit board within about 30%.
Parent Case Info
[0001] The present patent application is a continuation of, and claims priority to, U.S. patent application Ser. No. 10/045,864 filed Jan. 9, 2002 that is a divisional of U.S. Pat. No. 6,404,660 dated Jun. 11, 2002, both of which are incorporated herein by reference.
Divisions (1)
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Number |
Date |
Country |
Parent |
09471305 |
Dec 1999 |
US |
Child |
10045864 |
Jan 2002 |
US |
Continuations (1)
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Number |
Date |
Country |
Parent |
10045864 |
Jan 2002 |
US |
Child |
10410390 |
Apr 2003 |
US |