Information
-
Patent Grant
-
6347901
-
Patent Number
6,347,901
-
Date Filed
Monday, November 1, 199925 years ago
-
Date Issued
Tuesday, February 19, 200222 years ago
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Inventors
-
Original Assignees
-
Examiners
- Browne; Lynne H.
- Garcia; Ernesto
Agents
- Salzman & Levy
- Fraley; Lawrence R.
-
CPC
- H01L24/12 - Structure, shape, material or disposition of the bump connectors prior to the connecting process
- B23K3/06 - Solder feeding devices Solder melting pans
- B23K35/0222 - for use in soldering, brazing
- H01L21/4853 - Connection or disconnection of other leads to or from a metallisation
- H01L23/49816 - Spherical bumps on the substrate for external connection
- H01L24/02 - Bonding areas ; Manufacturing methods related thereto
- H01L24/11 - Manufacturing methods
- H05K1/111 - Pads for surface mounting
- H05K3/3436 - having an array of bottom contacts
- B23K35/0233 - Sheets, foils
- H01L2224/0401 - Bonding areas specifically adapted for bump connectors
- H01L2224/13099 - Material
- H01L2924/01005 - Boron [B]
- H01L2924/01006 - Carbon [C]
- H01L2924/01013 - Aluminum [Al]
- H01L2924/01029 - Copper [Cu]
- H01L2924/01033 - Arsenic [As]
- H01L2924/01079 - Gold [Au]
- H01L2924/01327 - Intermediate phases
- H01L2924/014 - Solder alloys
- H01L2924/14 - Integrated circuits
- H05K2201/0373 - Conductors having a fine structure
- H05K2203/0405 - Solder foil, tape or wire
- Y02P70/611 - the product being a printed circuit board [PCB]
- Y02P70/613 - involving the assembly of several electronic elements
- Y10T403/477 - Fusion bond, e.g., weld, etc.
- Y10T403/479 - Added bonding material, e.g., solder, braze, etc.
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US Classifications
Field of Search
US
- 403 270
- 403 272
- 228 1411
- 228 155
- 228 167
- 228 563
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International Classifications
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Abstract
A method and article of fabrication is described featuring a solder layer having a serpentine, interrupted, or interdigitated boundary. The non-planar design of the boundary layer increases the fatigue life of the solder joint by limiting the damage caused by micro-cracking. This irregularity of the solder boundary constrains the propagation of cracks by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path along which the crack propagates.
Description
FIELD OF THE INVENTION
The present invention relates to soldering techniques and, more particularly, to a solder method that enhances solder interconnects by eliminating solder joint failures caused by micro-cracking at or near the solder intermetallic interface.
BACKGROUND OF THE INVENTION
The fatigue life of solder interconnects is often poor, because cracks develop near an intermetallic layer. The damaging process is due to the build-up of inelastic deformation (creep) that leads to cavity nucleation, growth, and coalescence along grain boundaries. The increasing damage tends to produce micro-cracks at the boundaries. These boundary micro-cracks are disposed roughly normal to the direction of maximum tensile stress.
The factors that influence the aforementioned damage include: (a) the shape of the joint, which influences the stress concentration at the free joint boundaries; (b) the build-up of intermetallics, which are known to locally increase stress in solder at and above the intermetallic layer; and (c) the local coefficient of thermal expansion (CTE) mismatch between the pad and the solder.
It is also observed that dissolved copper, gold, or other metallic pad coating materials locally contaminate solder. The contaminants increase the solder brittleness, making the solder susceptible to micro-cracking, when compared with bulk behavior.
The present invention seeks to increase the fatigue life of the solder joint, by limiting the damage caused by micro-cracking in the solder joint. This objective is achieved by redistributing the stresses in solder, thus constraining the cracks. Such containment can be accomplished by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path length along which the crack is to propagate. The solder layer can be designed to include a serpentine, interrupted, or interdigitated boundary. The method can be applied to ball grid arrays, column grid arrays, surface mount technology (SMT) joints, etc.
DISCUSSION OF THE RELATED ART
In U.S. Pat. No. 5,242,569, issued to Kang et al, on Sept. 7, 1993, for THERMOCOMPRESSION BONDING IN INTEGRATED CIRCUIT PACKAGING, a thermocompression bonding method is described that allows bonding to be achieved at lower temperatures. The process produces a soft, deformable layer of metal that is free of dendritic protrusions.
In U.S. Pat. No. 5,172,473, issued to Burns et al, on Dec. 22, 1992, for METHOD OF MAKING CONE ELECTRICAL CONTACT, a method of achieving improved electrical contact is illustrated. Contact is improved by generating cone-shaped projections upon a mating surface. The cones enhance ohmic contact by intermeshing and wiping.
In U.S. Pat. No. 5,118,299, issued to Burns et al, on Jun. 2, 1992, for CONE ELECTRICAL CONTACT, an electrical interconnection is shown featuring two detachable surfaces having intermeshing cone projections. The cones
In U.S. Pat. No. 3,881,799, issued on May 6, 1975, to Elliott et al, for RESILIENT MULTI-MICRO POINT METALLIC JUNCTION, a dynamic interfacing contact device is disclosed. The device provides multiple points of contact between opposing parallel surfaces of a pair of conductors. The points of contact are provided by a number of spaced-apart, metal protrusions.
In U.S. Pat. No. 4,751,563, issued to the common assignee, a microminiaturized electrical interconnection device is described. Electrical connection on a first pad is tangentially raised at about sixty degrees and brought into intimate contact with a second metallic layer.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a method and article of fabrication, featuring a solder layer that comprises a serpentine, interrupted, or interdigitated boundary. The non-planar design of the boundary layer increases the fatigue life of the solder joint, by limiting the damage caused by micro-cracking. This irregularity of the solder boundary constrains the propagation of cracks by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path length along which the crack propagates.
It is an object of this invention to provide a method and article of fabrication that improves the fatigue life of solder joints.
It is another object of the invention to produce a solder joint that constrains cracking along the intermetallic boundary.
BRIEF DESCRIPTION OF THE DRAWINGS
A complete understanding of the present invention may be obtained by reference to the accompanying drawings, when considered in conjunction with the subsequent detailed description, in which:
FIG. 1
illustrates a side view of the edge of the solder boundary of a prior art metallic pad;
FIG. 2
depicts a plan view of the micro-crack propagation at the solder boundary layer, using the solder configuration of
FIG. 1
;
FIG. 2
a
is a greatly enlarged photograph of actual solder pads with defects represented in
FIG. 2
;
FIGS. 3
a
through
3
g
show a plan view of seven embodiments of the pad configuration of this invention; and
FIG. 4
illustrates a plan view of the micro-crack propagation at the solder boundary layer, using the pad configuration of
FIG. 3
a.
DESCRIPTION OF THE PREFERRED EMBODIMENT
Generally speaking, the invention features a method as well as solder pad configurations which increase the fatigue life of the solder joint. The method and pad configurations reduce the damage which is normally caused by micro-cracking at the solder and near intermetallic interface. This irregularity of the pad surface constrains the propagation of cracks by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path along which the crack propagates.
Now referring to
FIG. 1
, a plan view of a prior art metallic pad
10
is illustrated. The straight edge
12
of the solder boundary experiences adjacent micro-cracking
14
in solder near the intermetallic layer, as shown in FIG.
2
. The micro-crack
14
tends to propogate, because there is no constraint against its growth.
Referring to
FIGS. 3
a
through
3
g
, a plan view of a plurality of irregularly shaped strips of solder
16
,
17
,
18
,
19
,
21
,
22
, and
23
respectively, is depicted.
FIG. 3
a
depicts an undulating or serpentine strip of pad
16
;
FIG. 3
b
shows an undulating or serpentine strip of solder
17
having a straight base strip
17
a
;
FIG. 3
c
illustrates an interdigitated strip of pad
18
;
FIG. 3
d
depicts a strip of pad
19
having a curved edged, central digit
19
a
;
FIG. 3
e
depicts a pad having raised, concentric walls
21
a
and
21
b
,
FIG. 3
f
shows a pad
22
having a raised cross-shaped feature
22
a
; and
FIG. 3
g
illustrates a pad
23
having a plurality of foreshortened substantially cylindrical protrusions
23
a
disposed perpendicularly with respect to the major plane of the pad
23
.
Referring to
FIG. 4
, a solder joint at the intermetallic boundary is shown, using the serpentine solder configuration depicted in
FIG. 3
a
. It will be observed that the respective micro-cracking
20
at each intermetallic boundary is following a circuitous or meandering path. The lengthening of the crack pathway increases the useful life of the solder joint. Other pad configurations are shown in
FIGS. 3
b
through
3
d
. As before, this results in micro-crack pathways which are interrupted, lengthened, or constrained. In similar manner, these configurations are expected to increase fatigue life of the solder joint, as is that of the solder design shown in
FIG. 3
a.
Since other modifications and changes varied to fit particular operating requirements and environments will be apparent to those skilled in the art, the invention is not considered limited to the examples chosen for the purpose of disclosure, and covers all changes and modifications which do not constitute departures from the true spirit and scope of this invention.
Having thus described the invention, what is desired to be protected by Letters Patent is presented in the subsequently appended claims.
Claims
- 1. A solder structure at an intermetallic boundary that disrupts, constrains, or shortens cracking at said intermetallic boundary, said intermetallic boundary being defined by a solder joint, and a boundary surface, said solder structure increasing fatigue life of the solder joint, said solder structure comprising a solder strip having a serpentine configuration aligned contiguously along said boundary surface.
- 2. A method of reducing fatigue failure in a soldered joint by soldering that disrupts, constrains, or shortens cracking at an intermetallic boundary, whereby fatigue life of a solder joint is increased, comprising the steps of:a) placing solder at a pad contiguously along said intermetallic boundary; and b) providing a contiguous serpentine solder layer during bonding along said intermetallic boundary of said pad in order to increase fatigue life of said solder joint.
US Referenced Citations (13)
Foreign Referenced Citations (3)
Number |
Date |
Country |
120762 |
Oct 1984 |
EP |
2047150 |
Nov 1980 |
GB |
3-270235 |
Dec 1991 |
JP |