Patent Application
20140284795
The present application claims priority to Korean patent application number 10-2013-0029536 filed on Mar. 20, 2013, in the Korean Intellectual Property Office, which is incorporated herein by reference in its entirety.
1. Technical Field
The present invention relates generally to a semiconductor technology, and more particularly, to a semiconductor package and a method for manufacturing the same.
2. Related Art
Recent trends in the electronic industry are based on manufacturing products in such a way as to accomplish weight reduction, device miniaturization, high speed operation, multi-functionality, high performance, high reliability, and low manufacturing cost. Therefore, package assembling technology is considered an important technology in product design.
The package assembling technology is used to protect a semiconductor chip, formed with integrated circuits, from external environment and to allow the semiconductor chip to be easily mounted on a substrate, thereby ensuring the semiconductor chip's reliability in operation. In such package assembling technology, a wire bonding process or flip chip bonding process is used to connect a semiconductor chip with a substrate.
In a wire bonding process, a bonding pad of a semiconductor and a connection pad of a substrate are connected using a wire. However, wire bonding process may cause problems such as wire sweeping, short-circuiting between wires, wire sagging, and the like. The wire bonding process has further problems such as high manufacturing costs due to the use of gold as the wire material, increase in process time due to the physical process of connecting the wire to respective bonding pads and connection pads, and lower operation speeds due to high inductance of the wires. Moreover, the wire bonding process has problems with increased package thickness due to a wire loop, reduction in mounting density, and design margin of the mother board.
In a flip chip bonding process, a bonding pad of a semiconductor and a connection pad of a substrate are connected using a bump formed on the bonding pad. Unfortunately, a flip chip bonding process increases the manufacturing cost due to an increase in wafer processing time required in forming bumps on a semiconductor chip. Additionally, a flip chip bonding process causes damage to the bumps due to the stress caused by difference in coefficient of thermal expansion between a semiconductor chip and a substrate. Furthermore, in a flip chip bonding process, an underfill resin is filled in a gap between a semiconductor chip and a substrate in order to prevent bumps from being damaged. However, since the gap between the semiconductor chip and the substrate is very narrow, a void may form when the underfill resin is filled in the gap, causing a void crack, thereby lowering the product's reliability. Furthermore, a flip chip bonding process causes the bumps to become invisible as the underfill resin is filled in the gap, making visible inspection on the connection status of the bumps impossible.
Various embodiments are generally directed to a semiconductor package capable of being manufactured with simple processes and having improved mechanical and electrical reliability, and a method for manufacturing the same.
In an embodiment of the present invention, a semiconductor package includes: a substrate having a plurality of connection pads; a semiconductor chip provided with a plurality of bonding pads on a first surface thereof and attached onto the substrate in a face-down position so that the bonding pads are positioned right above the corresponding connection pads; and thermoplastic conductive members introduced between the substrate and the semiconductor chip such that the bonding pad and the corresponding connection pad may be electrically connected.
The thermoplastic conductive members may include solder balls.
The substrate may include a plurality of grooves formed on a first surface which faces the semiconductor chip. The connection pads may be formed on the bottom of the respective grooves.
The thermoplastic conductive members may be introduced into the respective grooves, filling the grooves and projecting over the first surface of the substrate.
The semiconductor package may further include an adhesive member formed between the substrate and the first surface of the semiconductor chip such that the substrate and the semiconductor chip are attached to each other. The adhesive member may be cut on both edges in a saw-toothed shape to form a plurality of recesses so that the recesses of the adhesive member expose the respective connection pads of the substrate.
The semiconductor package may further include a gap retaining member embedded in the adhesive member.
In an embodiment of the present invention, a method for manufacturing a semiconductor package may include: providing a substrate having connection pads; attaching a semiconductor chip formed with a plurality of bonding pads on a first surface onto the substrate in a face-down position so that the bonding pads are positioned right above the corresponding connection pads; attaching thermoplastic conductive members outside the semiconductor chip on the substrate; and thermally blowing the thermoplastic conductive members to introduce the thermoplastic members between the substrate and the semiconductor chip such that the connection pad and the corresponding bonding pad are electrically connected.
Attaching the semiconductor chip onto the substrate may be performed by an adhesive member positioned in between the substrate and the semiconductor chip.
The method may further include dotting flux outside the semiconductor chip on the substrate before attaching the thermoplastic conductive members.
The method may further include hardening and removing the thermoplastic conductive members after thermally blowing the thermoplastic conductive members.
An electronic system including a controller, an interface, an input/output unit, and a memory device coupled with one another through a bus, the memory device including a semiconductor package may comprise: a substrate having a plurality of connection pads; a semiconductor chip provided with a plurality of bonding pads on a first surface thereof and attached onto the substrate in a face-down position so that the bonding pads are positioned right above the corresponding connection pads; and thermoplastic conductive members introduced between the substrate and the semiconductor chip such that the bonding pad and the connection pad corresponding thereto may be electrically connected.
A memory system may comprise: a memory controller; and a memory device including a semiconductor package comprising: a substrate having a plurality of connection pads; a semiconductor chip provided with a plurality of bonding pads on a first surface thereof and attached onto the substrate in a face-down position so that the bonding pads are positioned right above the corresponding connection pads; and thermoplastic conductive members introduced between the substrate and the semiconductor chip such that the bonding pad and the connection pad corresponding thereto may be electrically connected.
A computing system may comprise: a central processing unit; random access memory; an input device; and a memory system having a memory device including a semiconductor package comprising: a substrate having a plurality of connection pads; a semiconductor chip provided with a plurality of bonding pads on a first surface thereof and attached onto the substrate in a face-down position so that the bonding pads are positioned right above the corresponding connection pads; and thermoplastic conductive members introduced between the substrate and the semiconductor chip such that the bonding pad and the connection pad corresponding thereto may be electrically connected.
Hereafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Referring to
The substrate 10 may have a first surface 11 and a second surface 12 which is opposite to the first surface 11. The substrate 10 may include a plurality of grooves 13 and a plurality of connection pads 14. The substrate 10 may include ball lands 15 and external connection terminals 16.
A chip mounting region CR for attaching a semiconductor chip 20 thereto is defined on the first surface 11 of the substrate 10. A plurality of grooves 13 may be formed on the surface of the chip mounting region CR, along both edges of the chip mounting region CR. In order to allow the thermoplastic conductive members 30, which will be described later, to be smoothly introduced into the insides of the grooves 13, each of the grooves 13 may extend outside of the chip mounting region CR, and one end of each groove 13 may be placed outside the chip mounting region CR.
The connection pads 14 may be formed on the bottom of the respective grooves 13 in the chip mounting region CR. The ball lands 15 may be formed on the second surface 12 of the substrate 10. External connection terminals 16 such as solder balls may be attached onto the ball lands 15. Though not shown, the substrate 10 may include a plurality of wiring layers, the layers themselves being connected through vias. The connection pads 14 and the ball lands 15 may be electrically connected by way of the wiring layers and vias.
The semiconductor chip 20 may have a first surface 21, a second surface 22, side surfaces 23, a circuit unit 24, and a plurality of bonding pads 25.
The first surface 21 is opposite to the second surface 22 and the side surfaces 23 connect the first surface 21 with the second surface 22. The circuit unit 24 may include a data storage section for storing data and a data processing section for processing the data, and may consist of semiconductor elements, e.g. transistors, capacitors, fuses and the like, that are required for the operation of the chip. The bonding pads 25 serve as electrical contacts of the circuit unit 24 electrically connecting the circuit unit 24 with the outside, and are formed in the first surface 21 of the semiconductor chip 20 along both edges of the semiconductor chip 20.
The semiconductor chip 20 is attached onto the chip mounting region CR in a face-down position so that the bonding pads 25 correspond to the respective grooves 13 of the substrate 10.
The adhesive member 40 may be formed between the chip mounting region CR of the substrate 10 and the first surface 21 of the semiconductor chip 20 such that the substrate 10 and the semiconductor chip 20 are attached to each other. The adhesive member 40 may be a nonconductive adhesive tape or a nonconductive adhesive paste.
The thermoplastic conductive members 30 may flow into the respective grooves 13 such that the connection pad 14 and corresponding the bonding pad 25 are electrically connected with each other. In an embodiment, the thermoplastic conductive members 30 fill in the grooves 13 and are projected over the first surface 11 of the substrate 10. The thermoplastic conductive members 30 may be formed of a solder ball. Although the thermoplastic conductive members 30 are described and shown as being formed of a solder ball in an embodiment, material for the thermoplastic conductive members 30 is not limited to the solder ball, and any conductive material can be used provided that the conductive material is heated and/or melted to have a lowered viscosity and is then cooled down and/or rehardened.
Hereafter, a method for manufacturing the semiconductor package in accordance with an embodiment of the present invention depicted in
Referring to
The substrate 10 may include ball lands 15 formed on the second surface 12 and external connection terminals 16 attached onto the respective ball lands 15. Though not shown, the substrate may include a plurality of wiring layers and, the layers themselves being connected through vias. The connection pads 14 and the ball lands 15 may be electrically connected by way of the wiring layers and vias.
In order to allow the thermoplastic conductive members 30, which will be described later, to be smoothly introduced into the insides of the grooves 13, each of the grooves 13 may extend outside of the chip mounting region CR and one end of each groove 13 may be placed outside the chip mounting region CR.
Referring to
Referring to
Referring to
Though not shown, the thermoplastic conductive members 30 are then hardened through a cooling process, and a deflux process is performed afterwards to remove the flux covering the thermoplastic conductive members 30. The deflux process may be performed in such a way as to remove the flux stuck to the surface of the thermoplastic conductive members 30 by spraying de-ionized water (DI water) on the thermoplastic conductive members 30 as the substrate 10 passes through a deflux machine.
Although not shown, after the deflux process is completed, the method for manufacturing a semiconductor package in accordance with an embodiment of the present invention may further comprise the formation of an encapsulating member on the first surface 11 of the substrate 10 such that the encapsulating member covers the semiconductor chip 20 to protect the semiconductor chip 20 from the external environment.
Referring to
The substrate 10 may have a first surface 11 and a second surface 12 which is opposite to the first surface 11. The substrate 10 may include a plurality of connection pads 14 formed on the first surface 11. The substrate 10 may further include ball lands 15 formed on the second surface 12 and external connection terminals 16 attached onto the respective ball lands 15. For example, a solder ball may be used as the external connection terminals 16. A chip mounting region CR for attaching the semiconductor chip 20 thereto is defined on the first surface 11 of the substrate 10. A plurality of connection pads 14 are formed on the chip mounting region CR along both edges of the chip mounting region CR. Though not shown, the substrate 10 may include a plurality of wiring layers, the layers themselves being connected through vias. The connection pads 14 and the ball lands 15 may be electrically connected by way of the wiring layers and vias.
The adhesive member 40 is formed on the chip mounting region CR of the substrate such that it exposes the connection members 14 of the substrate 10. The adhesive member 40 may be formed by cutting both edges of the adhesive member 40 in a saw-toothed shape such that a plurality of recesses 41, each recess exposing the individual connection pad 14, is formed at both sides of the substrate. Accordingly, the adhesive member 40 is attached onto the chip mounting region CR of the substrate 10 such that each of the recesses 41 exposes the corresponding connection pad 14. A nonconductive adhesive film or a nonconductive adhesive paste may be used as the adhesive member 40.
The gap retaining member 50 is employed within the adhesive member 40 in order to ensure the space between the substrate 10 and the semiconductor chip 20 and is formed.
The semiconductor chip 20 has a first surface 21, a second surface 22 and side surfaces 23, and includes a circuit unit 24 and a plurality of bonding pads 25. The first surface 21 is opposite to the second surface 22, and the side surfaces 23 connect the first surface 21 with the second surface 22. The circuit unit 24 may include a data storage section for storing data and a data processing section for processing the data. The circuit unit 24 may consist of semiconductor elements, e.g. transistors, capacitors, fuses and the like, that are required for the operation of the chip.
The bonding pads 25 serve as electrical contacts of the circuit unit 24 electrically connecting the circuit unit 24 with the outside, and are formed in the first surface 21 of the semiconductor chip 20 along both edges of the semiconductor chip 20.
The semiconductor chip 20 is attached onto the chip mounting region CR in a face-down position such that the bonding pads 25 correspond to the respective connection pads 14 of the substrate 10.
The thermoplastic conductive members 30 may flow into the recesses 41 of the adhesive member 40 such that the connection pad 14 of the substrate 10 and the bonding pad 25 of the corresponding semiconductor chip 20 are electrically connected with each other. The thermoplastic conductive members 30 may be formed of a solder ball. Although the thermoplastic conductive members 30 are described and shown as being formed of a solder ball in an embodiment of the present invention, a material for the thermoplastic conductive members 30 is not limited to the solder ball, and any conductive material can be used provided that the conductive material is heated and/or melted to have a lowered viscosity and is then cooled down and/or rehardened.
Hereafter, a method for manufacturing the semiconductor package in accordance with an embodiment of the present invention depicted in
Referring to
The substrate 10 may include ball lands 15 formed on the second surface 12, which is opposite to the first surface 11, and external connection terminals 16, e.g. solder balls on the respective ball lands 15. Though not shown, the substrate 10 may include a plurality of wiring layers, the layers themselves being connected through vias. The connection pads 14 and the ball lands 15 may be electrically connected by way of the wiring layers and vias.
Next, the adhesive member 40, with a plurality of recesses 41, each corresponding to the individual connection pad 14 of the substrate 10, is attached onto the chip mounting region CR of the substrate 10 such that each of the recesses 41 exposes the corresponding connection pad 14. A nonconductive adhesive film or a nonconductive adhesive paste may be used as the adhesive member 40 and a gap retaining member 50 may be embedded in the adhesive member 40.
Referring to
Referring to
Referring to
Though not shown, the thermoplastic conductive members 30 are then hardened through a cooling process, and a deflux process is performed afterwards to remove the flux covering the thermoplastic conductive members 30. The deflux process may be performed in such a way as to remove the flux stuck to the surface of the thermoplastic conductive members 30 by spraying DI water on the thermoplastic conductive members as the substrate 10 passes through a deflux machine.
Although not shown, after the deflux process is completed, the method for manufacturing a semiconductor package in accordance with an embodiment of the present invention may further comprise the formation of an encapsulating member on the first surface 11 of the substrate 10 such that the encapsulating member covers the semiconductor chip 20 to protect the semiconductor chip 20 from the external environment.
As described above, since the connection pads and the bonding pads of the semiconductor chip are electrically connected by introducing the thermoplastic conductive members into the space between the substrate and the semiconductor chip by way of the thermal blowing, the use of conventional wires becomes unnecessary. In doing so, the present invention provides significant and novel solutions to the problematic reliability and other issues associated with the use of conventional wires such as poor shape of wires, increase in production cost due to the use of expensive gold wires, delay in process time due to physically connecting the wire to the respective bonding pads and connection pads, lowering of the operation speed due to high inductance of the wire, increase in package size due to the wire loop (resulting from the reduction in the mounting density and design margin of the mother board), and increase in the production cost due to the formation of bumps and void cracks.
Referring to
The substrate 10 may have a first surface 11 and a second surface 12 which is opposite to the first surface 11. The substrate 10 may include a plurality of connection pads 14. The substrate 10 may further include ball lands 15 and external connection terminals 16. A chip mounting region CR for attaching the semiconductor chip 20 thereto is defined on the first surface 11 of the substrate 10. A plurality of connection pads 14 are formed outside the chip mounting region CR on the first surface 11 along both edges of the chip mounting region CR.
The ball lands 15 are formed on the second surface 12 of the substrate 10 and the external connection terminals 16 are attached onto the respective ball lands 15. For example, a solder ball may be used as the external connection terminals 16. Though not shown, the substrate 10 may include a plurality of wiring layers, the layers themselves being connected through vias. The connection pads 14 and the ball lands 15 may be electrically connected by way of the wiring layers and vias.
The semiconductor chip 20 may have a first surface 21, a second surface 22 and side surfaces 23, and may include a circuit unit 24 and bonding pads 25. The first surface 21 is opposite to the second surface 22, and the side surfaces 23 connect the first surface 21 with the second surface 22. The circuit unit 24 may include a data storage section for storing data and a data processing section for processing data, and may consist of semiconductor elements, e.g. transistors, capacitors, fuses and the like, that are required for the operation of the chip. The bonding pads 25 serve as electrical contacts of the circuit unit 24 for electrical connection of the circuit unit 24 with the outside, and are formed in the first surface 21 of the semiconductor chip 20 along both edges of the semiconductor chip 20. The semiconductor chip 20 is attached onto the chip mounting region CR in a face-up position by medium of the adhesive member 40 such that the bonding pads 25 are elevated and adjacent to the corresponding connection pads 14.
A plurality of thermoplastic conductive member 30 may be formed along both edges of the semiconductor chip 20 such that the bonding pad 25 and the corresponding connection pads 14 may be connected with each other. Although the thermoplastic conductive members 30 are described and shown as being formed of a solder ball in an embodiment of the present invention, material for the thermoplastic conductive members is not limited to the solder ball, and any conductive material can be used provided that the conductive material is heated and/or melted to have a lowered viscosity and is then cooled down and/or rehardened.
Hereafter, a method for manufacturing the semiconductor package in accordance with an embodiment of the present invention depicted in
Referring to
a semiconductor chip 20 formed with a plurality of bonding pads 25 along both edges of the surface 21 is attached onto the chip mounting region CR in a face-up position by medium of an adhesive member 40 such that the bonding pads 25 are elevated and adjacent to the corresponding connection pads 14 of the substrate 10. A nonconductive adhesive film or a nonconductive adhesive paste may be used as the adhesive member 40.
Referring to
Referring to
Though not shown, the thermoplastic conductive members 30 are then hardened through a cooling process, and a deflux process is performed afterwards to remove the flux covering the thermoplastic conductive members 30. The deflux process may be performed in such a way as to remove the flux stuck to the surface of the thermoplastic conductive members 30 by spraying DI water on the thermoplastic conductive members as the substrate 10 passes through a deflux machine. Although not shown, after the deflux process is completed, a process of forming an encapsulating member on the first surface 11 of the substrate 10 may be performed such that the encapsulating member covers the semiconductor chip 20 to protect the semiconductor chip 20 from the external environment.
The semiconductor device in accordance with various embodiments may be applied to a variety of electronic apparatuses.
As shown in
As shown in
For example, the controller 1310 may include at least any one of the following: one or more microprocessors, one or more digital signal processors, one or more microcontrollers, and logic devices capable of performing the same functions as these components. The memory device 1330 may include the semiconductor package according to various embodiments of the present invention. The input/output unit 1320 may include at least one selected among a keypad, a keyboard, a display device, and so forth. The memory device 1330 is a device for storing data. The memory device 1330 may store data and/or commands to be executed by the controller 1310 and the like.
The memory device 1330 may include a volatile memory device and/or a nonvolatile memory device, such as a flash memory. For example, a flash memory to which the technology of the present invention is applied may be mounted to an information processing system such as a mobile terminal or a desktop computer. The flash memory may be constituted by a solid state drive (SSD). In this case, the electronic system 1300 may stably store a large amount of data in a flash memory system.
The electronic system 1300 may further include an interface 1340 configured to transmit and receive data to and from a communication network. The interface 1340 may be a wired or wireless type. For example, the interface 1340 may include an antenna or a wired (or wireless) transceiver. Furthermore, though not shown, a person skilled in the art will readily appreciate that the electronic system 1300 may additionally include an application chipset, a camera image processor (CIP), an input/output unit, etc.
In
The memory device 120 may serve as a volatile memory device such as a dynamic random-access memory (DRAM) or a nonvolatile memory device such as a magnetoresistive RAM (MRAM), spin torque transfer MRAM (STT-MRAM), phase-change RAM (PCRAM), resistive RAM (ReRAM), or ferroelectric RAM (FeRAM). The memory device 120 may include the semiconductor package according to various embodiments of the present invention.
The memory controller 110 may control the memory device 120, and may include a static random-access memory (SRAM) 111, a central processing unit (CPU) 112, a host interface 113, an error correction code block (ECC) 114 and a memory interface 115. The SRAM 111 is used as an operation memory of the CPU 112, the CPU 112 performs control operation for data exchange of the memory controller 110, and the host interface 113 has data exchange protocol of a host accessed to the memory system 100. The ECC 114 detects and corrects error of data read from the memory device 120, and the memory interface 115 interfaces with the semiconductor memory device 120. The memory controller 110 may further include read-only memory (ROM) for storing data for interfacing with the host, etc.
The memory system 100 may be used as a memory card or a solid state disk SSD by combination of the memory device 120 and the memory controller 110. In the event that the memory system 100 is the SSD, the memory controller 110 communicates with an external device, e.g. host through one of various interface protocols such as USB, MMC, PCI-E, SATA, PATA, SCSI, ESDI, IDE, etc.
In
The output device or input device 240 may be a self-contained display in the case of a portable electronic device. The input device or output device 250 may be a physical keyboard or a virtual keyboard in the case of a portable electronic device such as i.e. a smartphone, tablet pc, labtop, etc. The portable electronic device may further include, without limitation, a trackball, touchpad, or other cursor control device combined with a selection control, such as a pushbutton, to select an item highlighted by cursor manipulation. The memory system 210 may include a memory device which comprises the semiconductor package according to various embodiments of the present invention as described in
Although specific embodiments of the present invention have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible without departing from the scope and the spirit of the invention as disclosed in the accompanying claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2013-0029536 | Mar 2013 | KR | national |
