1. Field of the Invention
The present invention relates to a circuit substrate and a circuit substrate manufacturing method and, in particular, to a circuit substrate on which an electronic component is to be mounted and a circuit substrate manufacturing method.
2. Description of the Related Art
Conventionally, when mounting an electronic component, such as an IC, on a circuit substrate, a mounting method as described below has been performed. Flat electrode pads are formed in an array on the main surface of the circuit substrate. On the other hand, solder bumps are formed in an array on the main surface of the IC. The IC is placed on the circuit substrate in such a manner that the solder bumps are positioned on the electrode pads, and then reflow is performed. Thus, the solder bumps are molten and then the solder bumps and electrode pads are fixed to each other. In this way, the IC is mounted on the circuit substrate.
However, when performing the above-mentioned mounting method, for example, the circuit substrate may become distorted by heat, since the thermal expansion coefficient of the circuit substrate is different from that of the IC. Thus, the circuit substrate and IC may make a poor connection with each other. For this reason, for semiconductor element substrates described in Patent Japanese Patent Publication No. 3203731 and Japanese Unexamined Patent Application Publication No. 08-88470, instead of flat electrode pads, column-shaped bumps are formed on the semiconductor element substrate so as to protrude from the main surface of the semiconductor element substrate.
Since the column-shaped bumps have a height unlike electrode pads, they have expansion/contraction properties.
Therefore, even if the circuit substrate becomes distorted by heat, the column-shaped bumps can absorb the distortion. As a result, the semiconductor element substrates described in Japanese Patent Publication No. 3203731 and Japanese Unexamined Patent Application Publication No. 08-88470 can prevent a poor connection between the circuit substrate and IC.
However, the above-mentioned semiconductor element substrates have a problem in that it is difficult to mount the IC on the circuit substrate accurately. Explanation will be made below with reference to the drawings.
As for the semiconductor element substrate 100, the IC 104 must be placed on the semiconductor element substrate 100 in such a manner that solder bumps 106 are aligned with column-shaped bumps 102, and then reflow must be performed.
However, due to formation accuracy of the column-shaped bumps 102 and solder bumps 106, distortion of the semiconductor element substrate 100, variations in the placement accuracy of the IC 104, or the like, the solder bumps 106 may be placed on the column-shaped bumps 102 so as to be misaligned with respect to the column-shaped bumps as shown in
Accordingly, preferred embodiments of the present invention provide a circuit substrate that includes protruding terminals and prevents a poor connection with an electronic component, such as an IC, and also provide a circuit substrate manufacturing method.
According to a preferred embodiment of the present invention, a circuit substrate on which an electronic component is to be mounted includes a substrate body and a terminal to be electrically connected to a bump located on the electronic component. The terminal is arranged to protrude from a mounting surface of the substrate body on which the electronic component is to be mounted. The terminal has a structure such that an area of a top surface of the terminal preferably is about 1.2 times a sectional area of the terminal located at the mounting surface of the substrate body.
According to a preferred embodiment of the present invention, the top surface of the terminal is wider than the section of the terminal located at the mounting surface of the substrate body. For this reason, a loss of contact between the terminal and solder bump due to shock within the period from alignment between the terminal and solder bump to performance of reflow is prevented. As a result, a poor connection between the electronic component and circuit substrate is prevented.
In a preferred embodiment of the present invention, a sectional area of a section of the terminal that is parallel or substantially parallel with the mounting surface, preferably increases from the section of the terminal at the mounting surface to a top surface of the terminal, and a change rate of the sectional area of the terminal at an area of the top surface is preferably larger than a change rate of the sectional area of the section of the terminal at the mounting surface.
In a preferred embodiment of the present invention, the substrate body may include a plurality of laminated ceramic layers and an internal conductive layer laminated together with the ceramic layers, and the terminal may be electrically connected to the internal conductive layer.
A preferred embodiment of the present invention provides a circuit substrate on which an electronic component is to be mounted. The circuit substrate includes a substrate body and a terminal to be electrically connected to a bump on the electronic component. The terminal is arranged to protrude from a mounting surface of the substrate body on which the electronic component is to be mounted. A sectional area of a section of the terminal that is parallel or substantially parallel with the mounting surface increases from a section at the mounting surface of the substrate body to a top surface of the terminal and a change rate of the sectional area of the terminal at an area of the top surface is larger than a change rate of the sectional area of the section of the terminal at the mounting surface of the substrate body.
According to another preferred embodiment of the present invention, a method for manufacturing a circuit substrate on which an electronic component is to be mounted and that includes a terminal to be electrically connected to a bump located on the electronic component includes the steps of forming, on a first sheet, a mask layer softer than the first sheet; making a through hole on the mask layer; filling the through hole with a conductor; obtaining a multilayer body by crimping a plurality of second sheets, the first sheet, and the mask layer onto one another in such a manner that the mask layer is the uppermost layer; and eliminating the mask layer from the multilayer body.
In a preferred embodiment of the present invention, a softening point of the mask layer may be lower than a softening point of the first sheet.
In a preferred embodiment of the present invention, in the step of crimping the first sheet, the second sheets, and the mask layer onto one another, crimping may be performed while applying heat at a temperature that is higher than a softening point of the mask layer and lower than a softening point of the first sheet.
In a preferred embodiment of the present invention, in the step of making the through hole, the through hole may be made by applying a laser beam from the mask layer.
In a preferred embodiment of the present invention, the first sheet and the second sheets may be ceramic green sheets, the mask layer may be made of a resin, and in the step of eliminating the mask layer, the mask layer may be burned off when firing the multilayer body.
In a preferred embodiment of the present invention, in the step of making the through hole, the through hole may be formed to pass through the first sheet and the mask layer.
In a preferred embodiment of the present invention, in the step of crimping the mask layer, the first sheet, and the second sheets onto one another, a mold may be pressed against the mask layer and the first sheet with an elastic body interposed therebetween.
According to a preferred embodiment of the present invention, the top surface of the terminal is wider than the section of the terminal on the mounting surface of the substrate body. Therefore, the electronic component and circuit substrate are prevented from making a poor connection with each other.
Other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings.
A configuration of a circuit substrate will be described below with reference to the drawings.
The circuit substrate 10 is a substrate on which the IC 50, which is an electronic component, is to be surface-mounted. As shown in
The multiple terminals 14 are formed in an array on the mounting surface of the substrate body 12 on which the IC 50 is to be mounted (hereafter simply referred to as the “mounting surface of the substrate body 12”), as protruding from the mounting surface and play a role of electrically connecting the circuit formed by the internal conductive layers 16 and the IC 50. For this reason, the terminals 14 are electrically connected to the internal conductive layers 16 inside the substrate body 12.
Also, the terminals 14 preferably are formed in such a manner that the area S1 of the top surface of each terminal 14 is larger than the sectional area S2 of each terminal 14 on the mounting surface of the substrate body 12. This prevents the column-shaped bumps 102 and solder bumps 106 from losing contact with each other due to shock as shown in
On the other hand, the IC 50 includes an IC body 52 and solder bumps 54. The IC body 52 is a body formed preferably by forming a circuit on a silicon substrate. The multiple solder bumps 54 are formed in an array on the mounting surface of the IC body 52 and serve as terminals for electrically connecting the circuit formed on the IC body 52 and the terminals 14.
The circuit substrate 10 and IC 50 configured as described above are preferably aligned with each other in such a manner that the terminals 14 and solder bumps 54 are brought into contact with each other, as shown in
A method for manufacturing the circuit substrate 10 configured as described above will be described below with reference to the drawings.
First, slurry obtained by mixing ceramic material powder containing barium oxide, silicon oxide, and alumina with a binder, a plasticizer, and a solvent is prepared. Next, this slurry is formed on a carrier film in the shape of a sheet using a sheet forming method, such as the doctor blade method, so as to obtain a ceramic green sheet. The ceramic green sheet is cut into predetermined sizes.
After the ceramic green sheet is completed, layers for constituting the substrate body 12 are manufactured. First, as shown in
Subsequently, conductive paste mainly containing a conductor, such as Cu or Ag, is screen-printed on the main surface of the ceramic green sheet 20 so as to form the internal conductive layers 16 in predetermined patterns. By performing the steps shown in
Next, a layer to be laminated in the uppermost layer of the substrate body 12 is made using the ceramic green sheet. Specifically, as shown in
After forming the mask layer 30, as shown in
Next, as shown in
Next, as shown in
Finally, the unfired multilayer body 40 is fired. At that time, the mask layer 30 is burned off (burned away) by the high temperature. The firing is preferably performed at the temperature of about 990° C. for about one hour, for example. Through the above-mentioned steps, the circuit substrate 10 as shown in
According to the circuit substrate 10, the area S1 of the top surface of each terminal 14 is larger than the sectional area S2 of each terminal 14 on the mounting surface of the substrate body 12. This prevents the column-shaped bumps 102 and solder bumps 106 from losing contact with each other as shown in
Table 1 shown below is a table showing the relationship between S1/S2 and the incidence of a poor connection (short) between the circuit substrate 10 and IC 50.
As the conditions of the experiment, the interval between the terminals 14 was set to about 0.3 mm, and the area S1 of the top surface of each terminal 14 was set to about 0.0314 mm2.
As is apparent from Table 1, when S1/S2 becomes about 1.2 or more, the short incidence decreases significantly. Accordingly, the area S1 is preferably about 1.2 times or more the sectional area S2.
Also, according to the circuit substrate 10, peeling off of the solder bumps 54 from the IC 50 after reflow is prevented. Explanation will be made below with reference to
Conventionally, as shown in
However, when increasing the size of the electrode pads 210′ without changing the size of solder bumps 206′, the contact area between each solder bump 206′ and the corresponding electrode pad 210′ is increased in accordance with the extent to which each electrode pad 210′ is upsized. As a result, as shown in
On the other hand, according to the circuit substrate 10, as shown in
Also, according to the circuit substrate 10, the terminals 14 and solder bumps 54 are prevented from losing contact with each other before reflow, and the adjacent solder bumps 54 can be prevented from becoming shorted to each other after reflow. Explanation will be made below with reference to the drawings.
The circuit substrate 310 shown in
Incidentally, the sectional area of each terminal 314 except for the vicinity of the top surface thereof is larger than the sectional area of each terminal 14 except for the vicinity of the top surface thereof. Therefore, the volume of each terminal 314 is larger than the volume of each terminal 14. If the volume of each solder bump 54 and that of each solder bump 354 are equal to each other, the external shape of each solder bump 354 after reflow becomes larger than the external shape of each solder bump 54 by the difference between the volume of each terminal 314 and that of each terminal 14, as shown in
As for the circuit substrate 10 shown in
While the mold lid 44 preferably is directly pressed against the mask layer 30 and ceramic green sheets 20 in
Table 2 shown below is a table showing the value of S1/S2 in a case where the elastic body 46 is used at the time of crimping and that in a case where the elastic body 46 is not used at the time of crimping. In this experiment, the temperature of the mold lid 44 at the time of crimping was set to approximate values of 48° C., 62° C., and 67° C. The pressure of the mold lid 44 was set to about 510 kg/cm2.
From Table 2, it is understood that, by interposing the elastic body 46, the value of the ratio of the area S1 of the top surface of each terminal 14 to the sectional area S2 of each terminal 14 on the mounting surface of the substrate body 12 can be increased more effectively. Also, from this experiment, it is understood that, by increasing the pressure, it is possible to deform the terminals 14 sufficiently even when performing crimping at a temperature equal to or less than the softening point of the material of the mask layer 30.
The terminals 14 may take shapes as shown in
However, in view of ease with which the terminals 14 are processed, as shown in
Accordingly, various preferred embodiments of the present invention are useful for a circuit substrate and a circuit substrate manufacturing method. In particular, preferred embodiments of the present invention are excellent in that an electronic component and a circuit substrate are prevented from making a poor connection with each other.
While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
Number | Date | Country | Kind |
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2007-231313 | Sep 2007 | JP | national |
Number | Date | Country | |
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Parent | PCT/JP2008/065894 | Sep 2008 | US |
Child | 12717170 | US |