A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
The present invention relates generally to the field of electronic assembly and more specifically, but not exclusively, to prototyping and assembly of electronic products without the use of solder.
Prototyping, including rapid prototyping, technology has been developed to help expedite the production of numerous products to expose design issues before committing to hard tooling. These methods have largely been reserved for mechanical products; however, they have not been suitably applied to the creation of electronic assemblies and electronic products that do not require solder.
The assembly of electronic products, and more specifically the permanent assembly of electronic components to printed circuit boards, has involved the use of some form of relatively low-temperature solder alloy (e.g., tin/lead or Sn63/Pb37) since the earliest days of the electronics industry. The reasons are manifold but the most important one has been the ease of mass joining of thousand of electronics interconnections between printed circuit and the leads of many electronic components.
Lead is a highly toxic substance, exposure to which can produce a wide range of well-known adverse health effects. Of importance in this context, fumes produced from soldering operations are dangerous to workers. The process may generate a fume which is a combination of lead oxide (from lead based solder) and colophony (from the solder flux). Each of these constituents has been shown to be potentially hazardous. In addition, if the amount of lead in electronics were reduced, it would also reduce the pressure to mine and smelt it. Mining lead can contaminate local ground water supplies. Smelting can lead to factory, worker, and environmental contamination.
Reducing the lead stream would also reduce the amount of lead in discarded electronic devices, lowering the level of lead in landfills and in other less secure locations. Because of the difficulty and cost of recycling used electronics, as well as lax enforcement of legislation regarding waste exports, large amounts of used electronics are sent to countries such as China, India, and Kenya, which have lower environmental standards and poorer working conditions.
Thus, there are marketing and legislative pressures to reduce tin/lead solders. In particular, the Directive on the Restriction of the Use of Certain Hazardous Substances in Electrical and Electronic Equipment (commonly referred to as the Restriction of Hazardous Substances Directive or RoHS), was adopted in February 2003 by the European Union. The RoHS directive took effect on Jul. 1, 2006, and is required to be enforced and become law in each member state. This directive restricts the use of six hazardous materials, including lead, in the manufacture of various types of electronic and electrical equipment. It is closely linked with the Waste Electrical and Electronic Equipment Directive (WEEE) 2002/96/EC, which sets collection, recycling and recovery targets for electrical goods and is part of a legislative initiative to solve the problem of huge amounts of toxic electronic device waste.
RoHS does not eliminate the use of lead in all electronic devices. In certain devices requiring high reliability, such as medical devices, continued use of lead alloys is permitted. Thus, lead in electronics continues to be a concern. The electronics industry has been searching for a practical substitute for tin/lead solders. The most common substitutes in present use are SAC varieties, which are alloys containing tin (Sn), silver (Ag), and copper (Cu).
SAC solders also have significant environmental consequences. For example, mining tin is disastrous, both locally and globally. Large deposits of tin are found in the Amazon rain forest. In Brazil, this has led to the introduction of roads, clearing of forest, displacement of native people, soil degradation, and creation of dams, tailing ponds, and mounds, and smelting operations. Perhaps the most serious environmental impact of mining tin in Brazil is the silting up of rivers and creeks. This degradation modifies forever the profile of animal and plant life, destroys gene banks, alters the soil structure, introduces pests and diseases, and creates an irrecoverable ecological loss.
Worldwide ecological problems stemming from mismanagement of Brazil's environment are well known. These range from pressures on global warming from the destruction of rain forest to the long term damage to the pharmaceutical industry by the destruction of animal and plant life diversity. Mining in Brazil is simply one example of the tin industry's destructive effects. Large deposits and mining operations also exist in Indonesia, Malaysia, and China, developing countries where attitudes toward economic development overwhelm concerns for ecological protection.
SAC solders have additional problems. They require high temperatures, wasting energy, are brittle, and cause reliability problems. The melting temperature is such that components and circuit boards may be damaged. Correct quantities of individual alloy constituent compounds are still under investigation, and the long term stability is unknown. Moreover, SAC solder processes are prone to the formation of shorts (e.g., “tin whiskers”) and opens if surfaces are not properly prepared. Whether tin/lead solder or a SAC variety is used, dense metal adds both to the weight and height of circuit assemblies. Therefore, there is a need for a substitute for the soldering process and its attendant environmental and practical drawbacks.
While solder alloys have been most common, other joining materials have been proposed and/or used, such as so-called “polymer solders”, which are a form of conductive adhesive. Moreover, there have been efforts to make connections separable by providing sockets for components. There have also been electrical and electronic connectors developed to link power and signal carrying conductors described with various resilient contact structures, all of which require constant applied force or pressure.
At the same time, there has been a continual effort to put more electronics into ever smaller volumes. As a result, over the last few years there has been interest within the electronics industry in various methods for integrated circuit (IC) chip stacking within packages and the stacking of IC packages themselves, all with the intent of reducing assembly size in the Z or vertical axis. There has also been an ongoing effort to reduce the number of surface mounted components on a printed circuit board (PCB) by embedding certain components, mostly passive devices, inside the circuit board.
In the creation of IC packages, there has also been an effort to embed active devices by placing unpackaged IC devices directly inside a substrate and interconnecting them by drilling and plating directly to the chip contacts. While such solutions offer benefits in specific applications, the input/output (I/O) terminals of the chip can be very small and very challenging to make such connections accurately. Moreover, the device after manufacturing may not successfully pass burn in testing, making the entire effort valueless after completion.
Another area of concern is in management of heat, as densely packaged ICs may create a high energy density that can reduce the reliability of electronic products.
The present invention provides a prototyping method which can be integrated with a reverse interconnection process (RIP) as detailed in this patent application counterparts. Stand-in components are placed onto a carrier. The components are scanned with a suitable system, such as a computerized laser, to measure and record the measurements of the structure in X, Y and Z dimensions.
Data from the measurement step is used to create a three-dimensional structure in either positive or negative format, depending on what methods will be used in subsequent processing. Material can be ablated employing a laser, for example, or etched or milled from a blank with a machine tool, to create either a positive or negative master. Optionally, having created a master from one surface of a blank, the process can be repeated on another surface of the blank. After initial creation, negative masters can be used to mold positive masters and vice versa.
For prototyping, the negative masters can support production components, preferably pre-tested and burned in, including electrical, electronic, electro-optical, electromechanical and user interface devices with external I/O contacts, for subsequent processing and interconnection with conductive circuits. Also, negative masters can be suitable for small volume production. For a larger quantity of circuit assemblies, negative masters can be created from positive masters. That is, the masters produced can form the basis for creating tooling for mass production.
Once a negative master is positioned, components can be placed into apertures formed in the master. Then additional RIP steps can be employed to create circuit assemblies as detailed in the applications cited above. RIP comprises encapsulating a set of electronic components in electrically insulating material with leads exposed, covering the leads with a layer of electronically insulating covering material, creating vias extending from a surface of the layer of the covering material to the leads (thus exposing the leads), filling the vias with electrically conductive material and forming traces among the vias. Repeated steps of applying more electronically insulating covering material over the traces, accessing traces and/or leads by additional vias, filling the additional vias with electronically conductive material, and forming new traces will result in a total number of desired circuit connections.
Electronic assemblies without solder can be created as detailed in U.S. patent application Ser. No. 12/119,287 and U.S. patent application Ser. No. 12/187,323, beginning with the process detailed above for creating negative masters. Components are placed or glued with leads up into negative master apertures. This sub-assembly is encapsulated with a solder mask, dielectric, or electrically insulating covering material with holes, known as vias, formed or drilled through the covering material to the components' leads, conductors, and terminals. As an alternative to vias, encapsulating material can be removed (for example by ablating, etching, or milling) to a depth exposing the leads. Vias, if present, can be filled with electrically conductive material and/or traces formed on a resulting sub-assembly and the encapsulation and the process of forming or drilling vias repeated as desired to build up additional circuit layers. Optionally, the negative master can be removed, thus leaving the encapsulating material as support.
Alternatively, components can be placed or glued into the apertures with leads down. Then the components can be encapsulated as indicated above. Vias can then be created, if not pre-formed, through the negative master, instead of through the encapsulating material, to the leads and/or to circuit layers built within the negative master. As above, vias are not required; material can be removed from the negative master to expose leads. Even encapsulating material is optional; components can be placed or glued, for example, into apertures.
The master can also be created as a frame with circuitry subsequently built up as detailed in U.S. patent application Ser. No. 12/200,749. A negative master created as a frame containing aperture(s) is positioned on and joined to a temporary or permanent substrate. A pick and place machine, for example, places electrical component(s) into respective aperture(s) with the leads of the component(s) positioned on and attached to the substrate. Then an encapsulant electrically insulating, but preferably thermally conductive, envelops the component(s). At this point, a temporary substrate can be removed, exposing component leads. Or, if components are mounted on a permanent substrate, vias extend from the surface to the leads. With leads exposed, the completed sub-assembly can be incorporated into various forms.
In another example of the process of forming assemblies from the sub-assembly described in this application, component terminals are connected to a first side of a firmament with an anisotropic conductor. A pattern is applied to a second side of the firmament. And portions of the firmament are removed based on the pattern, such that remaining portions of the firmament form an electrical circuit interconnecting the component terminals of the electronic components. See U.S. patent application Ser. No. 12/170,426.
The negative master can be temporary so that following the creation of the sub-assembly or assembly, it can be removed. Also, electrically encapsulating material or covering material can be flexible so that when the negative master is removed or selectively thinned, the assembly can be bent into a desired shape. See U.S. patent application Ser. No. 12/163,870 and U.S. Patent Application No. 61/075,238.
Components can be placed in aperature(s) in a first and a second master, each encapsulated and further RIP circuit layers built up on each master. These two masters can be mated front to front, front to back, or back to back. See U.S. patent application Ser. No. 12/191,544.
Within negative master aperture(s), components can be stacked upon each other and electrically interconnected and integrated. See U.S. patent application Ser. No. 12/184,086.
In combination with the above methods and assemblies, components can be placed further in communication with one or more printed circuit board(s). After creating the negative master, placing component(s) therein, optionally encapsulating the components(s), exposing component lead(s), optionally removing the negative master, and building up RIP layers, component leads can be registered with respective printed circuit board leads. Then an electrically conductive joining material with intermediate conductors can be placed in communication with both component leads and the printed circuit board. Thus, encapsulated components, joining material, and the printed circuit board are in electrical communication by means of conductors. The electrically conductive joining material can be surrounded by an adhesive joining material to provide additional support. See U.S. patent application Ser. No. 12/182,043. The order of the above steps can be changed and still be within the scope of this invention. For example, after the printed circuit board is joined with the component lead(s), the negative master can be removed.
Monolithic molded flexible electronic methods can be employed and assemblies formed, starting with the process detailed in this application, as described in U.S. patent application Ser. No. 12/405,773. That is, in summary, masters formed as described above can form a first mold portion and a second mold potion that mate together to form an interior chamber, wherein the combination mold has an injection port that connects into an injection channel that connects into the chamber. A plurality of electronic parts that have electronic contacts are populated onto the second mold portion, such that the electronic parts will be substantially contained in the chamber. The first and the second mold potions are then mated together and an insulating molding material in a liquid state is injected into the injection port and through the injection channel to fill the chamber. The molding material is hardened from the liquid state to a solid state, thereby embedding the plurality of electronic parts in the molding material as a monolithic sub-assembly. The monolithic sub-assembly is removed from the mold and one or more solderless conductive circuits are applied to the electronic contacts of the electronic parts, thereby providing the monolithic molded electronic assembly. The result is an article of manufacture made by this method.
Another result of the monolithic molded flexible electronic process is a circuit assembly including a plurality of electronic parts that have electronic contacts. The electronic parts are over-molded with a flexible hardening insulating molding material to a first thickness, to have areas between sub-pluralities of the electronic parts having a different second thickness, thereby forming a monolithic sub-assembly. And the monolithic sub-assembly has at least one solderless layer of conductive circuits interconnecting the electronic contacts of the electronic parts.
An advantage of the monolithic molded flexible electronic method is the ability to make an assembly that can be bent into desired shapes.
As will be apparent to one skilled in the art, the above methods and assemblies can be combined in various combinations and permutations.
These and other objects and advantages of the present invention will become clear to those skilled in the art in view of the description of the best presently known mode of carrying out the invention and the industrial applicability of the preferred embodiment as described herein and as illustrated in the figures of the drawings.
The purposes and advantages of the present invention will be apparent from the following detailed description in conjunction with the appended figures of drawings, in which:
a depicts a master creation system.
b depicts a two-sided negative master.
In the various figures of the drawings, like references are used to denote like or similar elements or steps.
In the following description and in the accompanying drawings, specific terminology and drawing symbols are set forth to provide a thorough understanding of the present invention. In some instances, the terminology and symbols can imply specific details that are not required to practice the invention.
A perspective view of a stand-in component assembly 200 is illustrated in
As shown in
System 410 can remove material from negative master 420 in a manner known in the art including milling, etching, or laser ablation.
As illustrated in
In master 420b, one or more pathways, such as pathways 445 (for electrical conductors, electrical wiring, fluid, or coolant, for example), can be formed to extend from one side to another side of carrier 100b. Pathways can extend horizontally through carrier 100b, as well as vertically.
Having described a preferred technique, modifications, for example, molding a master into a side of carrier 100b, will be apparent to one skilled in the art. Given the underlying inventive technique and resulting product, such equivalent modifications are within the scope and spirit of the invention.
The three-dimensional prototyping system 410 of
The production of prototyping assembly is accomplished by a series of steps. A perspective view of sub-assembly 800, shown in
In the example of sub-assembly 800, face up leads are shown flush with a surface of negative master 420a. In an alternative embodiment, leads such as lead 820 do not have to be flush with the surface.
While sub-assembly 800 shows production components 810 with their leads (such as lead 820), facing up, some or all components 810 can be inserted with their leads facing down. If leads are inserted facing down, access to them can be by way of laser ablation, milling, drilling, or etching through the negative master 420a.
At this point, sub-assembly 800 can be further developed by the reverse-interconnection process (RIP) and variations disclosed in the related patent applications cited above. For example, FIGS. 10, 11, 12, 13, 14, 15, 16, and 17 and accompanying detailed description in U.S. patent application Ser. No. 12/119,287 illustrate and describe a method and resulting apparatus of building up RIP circuitry. The techniques in that disclosure can be employed using sub-assembly 800 as an initial starting point.
In
U.S. patent application Ser. No. 12/184,086, referenced above, describes electronic components stacked upon each other and electrically interconnected and integrated through RIP. That is, to improve the density of electrical components in a circuit assembly, components can be overlapped.
Data gathered by system 300, shown in
Next, referring to
While the process and apparatuses have largely been described for prototyping, it can be suitable for small volume production. In addition, the masters produced can be used for creating tooling for mass production.
In regard to RIP assembly, negative master 420a can substitute for electrically insulating material 908 in FIG. 9 of U.S. patent application Ser. No. 12/119,287 ('287 application). Then various combinations, as illustrated in FIGS. 5, 6, 7, and 19, employing the steps (and sub-assemblies) illustrated in FIGS. 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, and 18, of the '287 application can be built, employing RIP, from negative master 420a of the present application (see also the accompanying detailed description of invention and drawings in '287 application).
In another example, negative master 420a can substitute for electrically insulating material 908 of FIG. 9 and electrically insulating material 2004 in FIG. 20 of U.S. patent application Ser. No. 12/163,870 ('870 application). Then various combinations illustrated in FIGS. 5, 6, 7, 17, 19, 21, employing the steps (and sub-assemblies) illustrated in FIGS. 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 29, 30, 31, 32, 33, and 34, of the '870 application can be built upon the sub-assembly 800 of the present application (see also accompanying detailed description of invention and drawings in '870 application).
In another example, negative master 420a can substitute for insulating material 908 of FIG. 9 of U.S. patent application Ser. No. 12/191,544 ('544 application). Then combinations illustrated in FIGS. 19, 22, 23, 25, 27, 29, 30, 32, and 33, employing the steps (and subassemblies) illustrated in FIGS. 24, 26, and 28, of the '544 application can be built upon the sub-assembly 800 of the present application (see also accompanying detailed description of invention and drawings in '544 application).
In yet another example, negative master 420a can substitute for top cover material 416 in FIG. 4 of U.S. patent application Ser. No. 12/170,426 ('426 application). Then the combination illustrated in
In a further example, negative master 420a can substitute for electrically insulating material 404 in FIG. 4 of U.S. patent application Ser. No. 12/182,043 ('043 application). Then the combination illustrated in FIG. 9, employing the steps (and sub-assemblies) illustrated in FIG. 8, of the '043 application can be built upon the sub-assembly 800 of the present application (see also accompanying detailed description of invention and drawings in '043 application).
In a further example, negative master 420a can substitute for insulating material 104 in FIG. 1 of U.S. patent application Ser. No. 12/184,086 ('086 application). Then the combinations illustrated in FIGS. 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10 in the '086 application can be built upon the sub-assembly 800 of the present application (see also accompanying detailed description of invention and drawings in '086 application).
In a further example, negative master 420a can substitute for electrically insulating material 404 in FIG. 4 of U.S. patent application Ser. No. 12/187,323 ('323 application). Then the combinations illustrated in FIGS. 5, 6, and 7 employing the steps (and apparatus) illustrated in FIG. 8 of the '323 application can be built upon the sub-assembly 800 of the present application (see also accompanying detailed description of invention and drawings in '323 application).
In a further example, negative master 420a can be thinned in places such as illustrated in FIG. 1E of U.S. patent application Ser. No. 12/405,773 ('773 application). Then a resulting structure illustrated in FIG. 1G employing the steps (and sub-assemblies) illustrated in FIGS. 1E, 1F, and 1G of the '773 application can be built upon the sub-assembly 800 of the present application (see also accompanying detailed description of invention and drawings in '773 application).
While the particular system, apparatus, and method for ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHOD FOR THEIR DESIGN, PROTOTYPING, AND MANUFACTURE as herein shown and described in detail, is fully capable of attaining the above-described objects of the invention, it is to be understood that it is the presently preferred embodiment of the present invention, and is thus representative of the subject matter which is broadly contemplated by the present invention, that the scope of the present invention fully encompasses other embodiments which can become obvious to those skilled in the art, and that the scope of the present invention is accordingly to be limited by nothing other than the appended claims, in which reference to an element in the singular means “at least one”. All structural and functional equivalents to the elements of the above-described preferred embodiment that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the present claims. Moreover, it is not necessary for a device or method to address each and every problem sought to be solved by the present invention, for it to be encompassed by the present claims. Furthermore, no element, component, or method step in the present disclosure is intended to be dedicated to the public, regardless of whether the element, component, or method step is explicitly recited in the claims.
This application claims the benefit of U.S. Provisional Application No. 61/075,238 filed Jun. 24, 2008, hereby incorporated by reference in its entirety. This application is a continuation-in-part application of pending U.S. patent application Ser. No. 12/119,287, ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHODS FOR THEIR MANUFACTURE; U.S. patent application Ser. No. 12/163,870, ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHODS FOR THEIR MANUFACTURE; U.S. patent application Ser. No. 12/191,544, ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHODS FOR THEIR MANUFACTURE; U.S. patent application Ser. No. 12/170,426, ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHODS FOR THEIR MANUFACTURE; U.S. patent application Ser. No. 12/182,043, ASSEMBLY OF ENCAPSULATED ELECTRONIC COMPONENTS TO A PRINTED CIRCUIT BOARD; U.S. patent application Ser. No. 12/187,323 SYSTEM FOR THE MANUFACTURE OF ELECTRONIC ASSEMBLIES WITHOUT SOLDER; U.S. patent application Ser. No. 12/200,749 ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHODS FOR THEIR MANUFACTURE; U.S. patent application Ser. No. 12/405,773 MONOLITHIC MOLDED FLEXIBLE ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHODS FOR THEIR MANUFACTURE; U.S. patent application Ser. No. 12/184,086 ELECTRONIC ASSEMBLIES WITHOUT SOLDER HAVING OVERLAPPING COMPONENTS; and U.S. patent application Ser. No. 12/410,362 ELECTRONIC ASSEMBLIES WITHOUT SOLDER AND METHOD FOR THEIR DESIGN, PROTOTYPING, AND MANUFACTURE, hereby incorporated by reference in their entirety.
Number | Date | Country | |
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61075238 | Jun 2008 | US |
Number | Date | Country | |
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Parent | 12119287 | May 2008 | US |
Child | 12429988 | US | |
Parent | 12163870 | Jun 2008 | US |
Child | 12119287 | US | |
Parent | 12191544 | Aug 2008 | US |
Child | 12163870 | US | |
Parent | 12170426 | Jul 2008 | US |
Child | 12191544 | US | |
Parent | 12182043 | Jul 2008 | US |
Child | 12170426 | US | |
Parent | 12187323 | Aug 2008 | US |
Child | 12182043 | US | |
Parent | 12200749 | Aug 2008 | US |
Child | 12187323 | US | |
Parent | 12405773 | Mar 2009 | US |
Child | 12200749 | US | |
Parent | 12184086 | Jul 2008 | US |
Child | 12405773 | US | |
Parent | 12410362 | Mar 2009 | US |
Child | 12184086 | US |