Claims
- 1. A semiconductor device of increased current capacity without an increased size; said semiconductor device comprising a lead frame, a semiconductor device die and a plurality of bonding wires; said lead frame comprising a thin generally flat conductive body having a die mounting pad and a plurality of parallel spaced external conductors; at least one of said parallel spaced external conductors having an enlarged bond wire post at one end thereof which is adjacent to but is spaced from said die mounting pad; the bottom of said die being fixed to the top surface of said die mounting pad; a plurality of said lead wires being bonded at one end thereof to the top surface of said die and at the other end thereof to said enlarged bond wire post; said plurality of spaced external conductors comprising three equally laterally spaced conductors which are disposed in the sequence of gate, source and drain conductors respectively for a power MOSFET and wherein said source conductor is the central conductor.
RELATED APPLICATION
[0001] This application is a division of U.S. patent application Ser. No. 09/103,035, filed Jun. 23, 1998 entitled HIGH CURRENT CAPACITY SEMICONDUCTOR DEVICE PACKAGE AND LEAD FRAME WITH LARGE AREA CONNECTION POSTS AND MODIFIED OUTLINE which is a non-provisional of U.S. Provisional Application No. 60/084,224 filed May 5, 1988.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60084224 |
May 1998 |
US |
Divisions (1)
|
Number |
Date |
Country |
Parent |
09103035 |
Jun 1998 |
US |
Child |
10243568 |
Sep 2002 |
US |