Claims
- 1. A high density integrated circuit package, comprising:
- (a) an integrated circuit element;
- (b) a protective casing surrounding said integrated circuit element, said casing having an upper surface, a lower surface and four sides;
- (c) a plurality of circuit conductor elements extending through at least one of said sides of said protective casing; and
- (d) a lead frame comprising a metal frame-work having bifurcated distal lead ends, wherein said metal frame-work is externally mounted against one of said lower or upper casing surfaces thereby being in direct heat exchange relationship with the upper or lower surface, and wherein said distal lead ends are electrically connected to selected ones of said plurality of circuit conductor elements.
- 2. A high density integrated circuit module, comprising:
- an assembly of a plurality of stacked lead-on-package configured integrated circuit packages, wherein each said package includes:
- (a) a plurality of circuit conductor elements extending from said package; and
- (b) an upper surface and a lower surface;
- and wherein said module further comprises:
- (c) an intermediate lead frame comprising a metal frame-work mounted between adjacent first and second packages, wherein one side of the metal frame-work is mounted against the upper side of the first package and the other side of the metal frame-work is mounted against the lower side of the second package, wherein said metal frame-work includes bifurcated distal lead ends and whereby said metal frame-work is mounted in direct heat exchange relationship to the upper and lower sides of the first and second packages.
- wherein said lead frame bifurcated distal lead ends on at least some of said stacked integrated circuit packages are electrically connected to selected ones of said plurality of circuit conductor elements.
- 3. The module of claim 2, wherein the metal frame-work is not embedded within a body member.
- 4. A high density integrated circuit module, comprising:
- (a) first and second stacked lead-on-package configured integrated circuit packages, wherein each said package includes:
- (i) a plurality of circuit conductor elements extending from said package; and
- (ii) an upper surface and a lower surface;
- (b) an intermediate lead frame comprising a metal frame-work mounted between the first and second packages, wherein one side of the metal frame-work is mounted against the upper side of the first package and the other side of the metal frame-work is mounted against the lower side of the second package, whereby said metal frame-work is mounted in direct heat exchange relationship to the upper and lower sides of the first and second packages; and
- (c) the metal frame-work having distal lead ends for conductively coupling circuit conductor elements from adjacent packages, wherein at least some of the distal lead ends are electrically connected to selected ones of said plurality of circuit conductor elements.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a continuation of Ser. No. 08/037830, filed Mar. 29, 1993 which is a continuation of U.S. application Ser. No. 08/526,470, filed Sep. 11, 1995, now U.S. Pat. No. 5,541,812, which is a divisional of U.S. application Ser. No. 08/445,848, filed May 22, 1995, U.S. Pat. No. 5,493,476, which is a divisional of U.S. application Ser. No. 08/206,829, filed Mar. 7, 1994, U.S. Pat. No. 5,455,740.
US Referenced Citations (18)
Foreign Referenced Citations (6)
Number |
Date |
Country |
0 298 211 A2 |
Feb 1989 |
EPX |
58-96756 |
Jun 1983 |
JPX |
58-112348 |
Jul 1983 |
JPX |
58-123741 |
Jul 1983 |
JPX |
4-71260 |
Mar 1992 |
JPX |
5343610 |
Dec 1993 |
JPX |
Non-Patent Literature Citations (6)
Entry |
IBM Technical Disclosure Bulletin "Stacked Surface Mount Package With Interposing Heat Sink" vol. 33 No. 1B, Jun. 1990. |
Catalog of Dense-Pac Microsystems, Inc. describing two products: DPS512X16A3 Ceramic 512K X 16 CMOS SRAM Module and DPS512X16AA3 High Speed Ceramic 512K X 16 CMOS SRAM Module, pp. 865-870. |
"High Density Memory Packaging Technology High Speed Imaging Applications," Dean Frew, Texas Instruments Inc., SPIE vol. 1346 Ultrahigh--and High--Speed Photography, Photonics, and Velocimetry '90, pp. 200-209. |
"Vertically-Integrated Package," Abstract, Alvin Weinberg, W. Kinzy Jones, IEEE, pp. 436-443. |
"3D Interconnection For Ultra-Dense Multichip Modules," Abstract, Christian Val, IEEE, pp. 540-547. |
IBM Technical Disclosure Bulletin, "Alterable Interposer Block for Personalizing Stacked Module Interconnecting," vol. 30, 30, No. 8, Jan. 1988. |
Divisions (2)
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Parent |
445848 |
May 1995 |
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Parent |
206829 |
Mar 1994 |
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Continuations (2)
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Parent |
037830 |
Mar 1993 |
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Parent |
526470 |
Sep 1995 |
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