Claims
- 1. A method for forming a grid array package for a semiconductor die comprising the steps of:
- attaching the semiconductor die to a surface of a substrate;
- attaching on an opposite surface of said substrate a first array of connection ports;
- fully encapsulating said substrate, die and first array of connection ports in a mold compound;
- removing a portion of said mold compound sufficient to expose portions of said first array of connection ports; and
- attaching a second array of connection ports to said exposed portions of said first array of connection ports.
- 2. The method of claim 1 further comprising, after the attaching step of said die, electrically connecting said die to said substrate using bonding wires.
- 3. The method of claim 1, wherein the step of attaching said second array of connection ports forms an array of solder balls.
- 4. The method of claim 1, wherein the step of attaching said first array of connection ports comprises the steps of:
- forming on said opposite surface of said substrate an array of attach pads; and
- attaching on said array of attach pads an initial array of connection ports.
- 5. The method of claim 4, wherein the step of forming said array of attach pads forms an array of solder attach pads, and wherein the step of attaching of said initial array of connection ports forms an array of solder balls.
- 6. The method of claim 4, wherein the step of attaching said initial array of connection ports forms an array of metal bumps.
- 7. The method of claim 4, wherein the step of attaching said initial array of connection ports forms an array of gold bumps.
- 8. The method of claim 4, wherein the step of attaching said initial array of connection ports forms an array of copper-gold alloy bumps.
- 9. The method of claim 4, wherein the step of attaching said initial array of connection ports comprises electroplating said array of attach pads to form said initial array of connection ports.
- 10. The method of claim 4, wherein the step of attaching said initial array of connection ports comprises stencil printing on said array of attach pads to form said initial array of connection ports.
- 11. The method of claim 1, wherein the encapsulating step is performed at a temperature of 180.degree. C.
- 12. A method for forming a grid array package for a semiconductor die comprising the steps of:
- attaching the semiconductor die to a surface of a substrate which terminates on an opposite surface with an integral array of connection ports;
- fully encapsulating said substrate, die and integral array of connection ports in a mold compound;
- removing a portion of said mold compound sufficient to expose portions of said integral array of connection ports; and
- attaching a second array of connection ports to said exposed portions of said integral array of connection ports.
- 13. The method of claim 12, wherein the step of attaching said second array of connection ports comprises attaching an array of solder balls to said exposed portions of said integral array of connection ports.
- 14. A method for forming a grid array package comprising the steps of:
- attaching a die to a surface of a substrate;
- forming on an opposite surface of said substrate an array of attach pads;
- positioning retracting pins over said array of attach pads;
- fully encapsulating in a mold compound said substrate, die, array of attach pads and portions of said retracting pins;
- removing said retracting pins to expose portions of said array of attach pads; and
- forming an array of connection ports over said exposed portions of said array of attach pads.
- 15. The method of claim 14, wherein the step of forming said array of attach pads forms an array of solder attach pads and the step of forming said array of connection ports forms an array of solder balls.
Priority Claims (1)
Number |
Date |
Country |
Kind |
9501669-7 |
Oct 1995 |
SGX |
|
RELATED APPLICATION
The subject matter of the present application is related to the subject matter of U.S. patent application Ser. No. 08/519,686, entitled "Apparatus For Dispensing Fluid In An Array Pattern", filed on even date herewith for Sarvotham M. BHANDARKAR, Kishore Kumar CHAKRAVORTY, Tai Chong CHAI and Jian Hua WU. Both this application and the above-noted related application are assigned to the same assignee. The contents of the above-noted related application are incorporated herein by reference.
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