Semiconductor chip package with attached electronic devices, and integrated circuit module having the same

Abstract

Provided are a semiconductor chip package with attached electronic devices, and an integrated circuit module having the same. The semiconductor chip packages may include a supporting substrate, input/output bonding pads arranged on a first plane of the supporting substrate, and device bonding pads arranged on the edges of the first plane or portions of the first plane adjacent to the edges. Accordingly, the mount area of a printed circuit board may be reduced, efficient routing may be possible, and the occurrence of package cracks may be reduced and/or prevented.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features and/or advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail example embodiments of the present invention with reference to the attached drawings in which:

FIG. 1 is a schematic view illustrating an example of a conventional semiconductor chip package and an integrated circuit module having the same;

FIG. 2 is a schematic view illustrating an example of a conventional semiconductor chip package and an integrated circuit module having the same;

FIG. 3 is a schematic view illustrating a semiconductor chip package and an integrated circuit module having the same according to an example embodiment of the present invention;

FIG. 4 is a view illustrating a plane of the semiconductor chip package of FIG. 3;

FIG. 5 is a schematic view of a semiconductor chip package and an integrated circuit module having the same according to an example embodiment of the present invention; and

FIG. 6 is a schematic view of a semiconductor chip package and an integrated circuit module having the same according to an example embodiment of the present invention.

Claims

1. A semiconductor chip package comprising: a supporting substrate;a plurality of input/output bonding pads arranged on a first plane of the supporting substrate; anda plurality of device bonding pads arranged on at least one of edges of the first plane and portions of the first plane adjacent to the edges.

2. The semiconductor chip package according to claim 1, further comprising: a semiconductor die including a plurality of input/output pads,wherein each of the plurality of input/output bonding pads are electrically connected to corresponding input/output pads of the semiconductor die.

3. The semiconductor chip package according to claim 1, wherein the semiconductor chip package has a ball grid array package structure.

4. The semiconductor chip package according to claim 1, wherein a plurality of solder balls having substantially a same size and ball pitch are attached to the input/output bonding pads.

5. The semiconductor chip package according to claim 1, wherein electronic devices including at least one of active devices and passive devices are attached to the device bonding pads.

6. The semiconductor chip package according to claim 5, wherein the electronic devices are at least one of smaller in size and same in size as the solder balls.

7. The semiconductor chip package according to claim 5, wherein the electronic devices are decoupling devices including at least one of capacitors and resistors.

8. The semiconductor chip package according to claim 2, wherein the device bonding pads are electrically connected with the input/output pads of the semiconductor die.

9. An integrated circuit module comprising: a semiconductor chip package according to claim 4;a plurality of electronic devices electrically connected with the device bonding pads; anda printed circuit board electrically connected with the semiconductor chip package through the plurality of solder balls, but not electrically connected with the electronic devices.

10. The integrated circuit module according to claim 9, wherein the printed circuit board includes circuit pattern routing for mounting at least one second semiconductor chip package.

11. The integrated circuit module according to claim 10, wherein the at least one second semiconductor chip package has a ball grid array package structure.

12. The integrated circuit module according to claim 9, wherein the plurality of electronic devices includes at least one of active devices and passive devices.

13. The integrated circuit module according to claim 9, wherein each of the plurality of electronic devices are smaller in size or same in size as the plurality of solder balls.

14. The integrated circuit module according to claim 9, wherein the plurality of electronic devices are decoupling devices including at least one of capacitors and resistors.

15. An integrated circuit module comprising: a semiconductor chip package according to claim 1; anda semiconductor die including a plurality of input/output pads,wherein the plurality of device bonding pads are electrically connected with the plurality of input/output pads of the semiconductor die.

16. An integrated circuit module comprising: a semiconductor chip package according to claim 1;a printed circuit board; andan interposer providing an electrical connection between the semiconductor chip package and the printed circuit board.

17. The integrated circuit module according to claim 16, further comprising: a plurality of first solder balls connected between the plurality of input/output pads of the supporting substrate and the interposer;a plurality of second solder balls connected between the interposer and the printed circuit board; anda plurality of electronic devices connected to the plurality of device bonding pads,wherein the plurality of first solder balls are smaller in size than the plurality of electronic devices.

18. A semiconductor chip package comprising: a supporting substrate;a plurality of input/output bonding pads arranged on a first plane of the supporting substrate;a semiconductor die including input/output pads, the input/output pads of the semiconductor die being connected to the input/output bonding pads; anda plurality of protrusions having a length and being arranged on at least one of edges of the first plane and portions adjacent to the edges.

19. The semiconductor chip package according to claim 18, wherein the semiconductor chip package has a ball grid array package structure and includes solder balls having a same size and same ball pitch that are attached to the input/output bonding pads.

20. The semiconductor chip package according to claim 19, wherein the protrusions are at least one of smaller in size and same in size as the solder balls in size.

21. The semiconductor chip package according to claim 18, wherein the protrusions include at least one of decoupling capacitors and resistors.