Semiconductor device and method for manufacturing the same

Information

  • Patent Application
  • 20070232056
  • Publication Number
    20070232056
  • Date Filed
    August 16, 2006
    18 years ago
  • Date Published
    October 04, 2007
    17 years ago
Abstract
It is an object of the present invention to provide a semiconductor device with high performance and reliability, in which peeling off of interconnection layers or conductive layers due to thermal stress developed during packaging of a semiconductor substrate is suppressed, and thus electrical break down is prevented and an efficient method for manufacturing the semiconductor device. The semiconductor device of the present invention is characterized by having a semiconductor substrate, an interconnection layer 12, a first conductive layer 15, an interlayer insulating film 16 and a second conductive layer 17. The method for manufacturing the semiconductor device of the present invention is characterized by containing at least forming an interconnection layer, forming a first conductive layer, forming an interlayer insulating film and forming a second conductive layer so as to be electrically connected to the first conductive layer.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a cross sectional view showing Example 1 of the semiconductor device of the present invention.



FIG. 2A is a perspective view showing the first and the second conductive layers and vias in Example 1 of the semiconductor device of the present invention.



FIG. 2B is a perspective view showing the first and the second conductive layers and vias in another Example of the method for manufacturing the semiconductor device of the present invention.



FIG. 3 is a first view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 4 is a second view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 5 is a third view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 6 is a fourth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 7 is a fifth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 8 is a sixth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 9 is a seventh view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 10 is an eighth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 11 is a ninth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 12 is a tenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 1.



FIG. 13 is a first view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 14 is a second view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 15 is a third view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 16 is a fourth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 17 is a fifth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 18 is a sixth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 19 is a seventh view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 20 is an eighth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 21 is a ninth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 22 is a tenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 23 is an eleventh view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 24 is a twelfth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 25 is a thirteenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 26 is a fourteenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 27 is a fifteenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 28 is a sixteenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 29 is a seventeenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 30 is an eighteenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 31 is a nineteenth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 32 is a twentieth view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 33 is a twenty first view showing an exemplary method for manufacturing the semiconductor device of the present invention of Example 2.



FIG. 34 is a schematic view showing a conventional semiconductor device.


Claims
  • 1. A semiconductor device, comprising: a semiconductor substrate;an interconnection layer formed over the semiconductor substrate;a first conductive layer formed over the interconnection layer;an interlayer insulating film formed over the first conductive layer; anda second conductive layer formed over the interlayer insulating film so as to be electrically connected to the first conductive layer.
  • 2. The semiconductor device according to claim 1, wherein the first conductive layer is connected to other semiconductor substrate through an external terminal.
  • 3. The semiconductor device according to claim 1, wherein the first conductive layer and the second conductive layer are electrically connected to each other by a number of vias passing through the interlayer insulating film.
  • 4. The semiconductor device according to claim 1, wherein the second conductive layer has wider area than the first conductive layer.
  • 5. The semiconductor device according to claim 1, wherein the first and the second conductive layers have any one of circular, elliptical and polygonal shape.
  • 6. The semiconductor device according to claim 3, wherein the vias are vertically disposed in the vicinity of an outer periphery of the first conductive layer and the second conductive layer.
  • 7. The semiconductor device according to claim 6, wherein the vias have approximately the same magnitude and are vertically disposed at approximately regular intervals.
  • 8. The semiconductor device according to claim 3, wherein the vias are in any one of columnar form, prismatic form and plate-like form.
  • 9. The semiconductor device according to claim 1, wherein the vicinity of the outer periphery of the second conductive layer is coated with a resin film.
  • 10. The semiconductor device according to claim 9, wherein at least two layers of the resin film is formed.
  • 11. The semiconductor device according to claim 1, wherein the interconnection layer comprises a multilayer interconnection structure having the interlayer insulating film.
  • 12. The semiconductor device according to claim 1, wherein the material for the first conductive layer and the second conductive layer is at least one selected from the group consisting of Al, Ni and Cu.
  • 13. The semiconductor device according to claim 1, wherein the material for the interlayer insulating film is at least one selected from the group consisting of polyimide resins, polyamide resins, epoxy resins, polybenzoxazole resins, benzocyclobutene resins, SiN and SiO2.
  • 14. The semiconductor device according to claim 9, wherein the material for the resin film is at least one selected from the group consisting of polyimide resins, polyamide resins, epoxy resins, polybenzoxazole resins, benzocyclobutene resins, SiN and SiO2.
  • 15. The semiconductor device according to claim 2, wherein the external terminal is electrically connected to the second conductive layer through a barrier metal layer.
  • 16. The semiconductor device according to claim 15, wherein the material for the barrier metal layer is at least one selected from the group consisting of Ni, Cu, Cu—Ni and Ti—Cu.
  • 17. The semiconductor device according to claim 1, wherein at least one conductive layer is further disposed over the second conductive layer.
  • 18. A method for manufacturing the semiconductor device, comprising: forming an interconnection layer over a semiconductor substrate;forming a first conductive layer over the interconnection layer;forming an interlayer insulating film over the first conductive layer; andforming a second conductive layer over the interlayer insulating film so as to be electrically connected to the first conductive layer.
  • 19. The method for manufacturing the semiconductor device according to claim 18, wherein the forming the second conductive layer comprises forming vias which electrically connect between the first conductive layer and the second conductive layer.
Priority Claims (1)
Number Date Country Kind
2006-095737 Mar 2006 JP national