BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a plan view showing the structure of a semiconductor device according to a first embodiment of the present invention;
FIG. 2 is a sectional view taken along the line 100-100 in FIG. 1;
FIG. 3 is a sectional view taken along the line 200-200 in FIG. 1;
FIGS. 4 to 6 are sectional views for illustrating a process of fabricating the semiconductor device according to the first embodiment of the present invention; FIG. 7 is a plan view for illustrating the process of fabricating the semiconductor device according to the first embodiment of the present invention;
FIG. 8 is a sectional view taken along the line 300-300 in FIG. 7;
FIG. 9 is a sectional view taken along the line 400-400 in FIG. 7;
FIG. 10 is a sectional view for illustrating the process of fabricating the semiconductor device according to the first embodiment of the present invention;
FIG. 11 is a plan view showing the structure of a semiconductor device according to a second embodiment of the present invention;
FIG. 12 is a sectional view taken along the line 500-500 in FIG. 11;
FIG. 13 is a sectional view taken along the line 600-600 in FIG. 11;
FIGS. 14 to 18 are sectional views for illustrating a process of fabricating the semiconductor device according to the second embodiment of the present invention;
FIG. 19 is a plan view for illustrating the process of fabricating the semiconductor device according to the second embodiment of the present invention;
FIG. 20 is a sectional view taken along the line 700-700 in FIG. 19;
FIG. 21 is a sectional view taken along the line 800-800 in FIG. 19;
FIG. 22 is a sectional view for illustrating the process of fabricating the semiconductor device according to the second embodiment of the present invention;
FIG. 23 is a sectional view showing the structure of a semiconductor device according to a third embodiment of the present invention;
FIG. 24 is a sectional view showing the structure of a semiconductor device according to a fourth embodiment of the present invention;
FIG. 25 is a sectional view showing the structure of a semiconductor device according to a fifth embodiment of the present invention;
FIG. 26 is a sectional view showing the structure of a semiconductor device according to a sixth embodiment of the present invention;
FIGS. 27 and 28 are sectional views showing the structures of samples employed in experiments conducted for confirming effects of the embodiments of the present invention;
FIGS. 29 and 30 are waveform diagrams showing results of FT-IR measurement before and after dipping in a plating solution and washing with pure water;
FIG. 31 is a graph showing leakage currents measured before and after dipping in the plating solution and washing with pure water;
FIG. 32 is a graph showing dielectric constants measured before and after dipping in the plating solution and washing with pure water;
FIG. 33 is a graph showing contact angles of an SiOC film (gas-liquid separation film) with respect to pure water and the plating solution; and
FIG. 34 is a waveform diagram showing results of FT-IR measurement conducted before and after annealing in a TMCT gas atmosphere.