Claims
- 1. A semiconductor device having a package of a single in-line type, comprising:
- a semiconductor chip;
- a package body that accommodates said semiconductor chip therewithin, said package body being defined by a pair of opposing major surfaces connected by a bottom wall, said bottom wall including a substantially planar edge part that extends substantially perpendicular to said major surfaces;
- a plurality of interconnection leads held by said package body so as to extend substantially perpendicularly to said edge surface, each of said interconnection leads being connected to said semiconductor chip electrically, each of said interconnection leads consisting of an inner lead part located inside said package body and an integral, outer lead part located outside said package body and having a distal end, said outer lead part being bent laterally, relatively to said inner lead part, in one of first and second directions that are opposite to each other and substantially perpendicular to said opposing major surfaces;
- a plurality of support legs, each of said support legs comprising an inner part located inside said package body and an outer part located outside said package body, said outer part of each said support leg being bent laterally in one of said first and second directions, relatively to said inner part thereof, and extending beyond the distal ends of said outer leads and supporting said package body, when placed on a substrate, in an upright position relatively to the substrate; and
- a reinforcement member provided in correspondence to each of said support legs, each said reinforcement member supporting said package body against tilting by contacting said package body.
- 2. A semiconductor device as claimed in claim 1 in which said inner parts of said plurality of support legs and said package body comprise a unitary structure.
- 3. A semiconductor device as claimed in claim 1 wherein each said reinforcement member comprises a projection on a corresponding one of said major surfaces which protrudes laterally therefrom.
- 4. A semiconductor device as claimed in claim 1 in which said outer lead parts of said interconnection leads extend beyond corresponding said major surfaces of the package body.
- 5. A semiconductor device as claimed in claim 1 in which said outer lead parts and said support legs are disposed substantially in a common plane.
- 6. A semiconductor device package of a single in-line type, comprising:
- a semiconductor chip;
- a package body housing the semiconductor chip therewithin and defined by a pair of spaced, opposing major sidewalls and a bottom wall extending between and interconnecting the opposing major sidewalls, a portion of the bottom wall comprising a planar edge surface which lies in a plane substantially transverse to the major sidewalls;
- a plurality of interconnection leads, each lead comprising an inner lead part disposed and secured within said package body and electrically connected to the semiconductor chip and an outer lead part extending integrally from the inner lead part, exteriorly of said package body, the respective inner lead parts of the plurality of interconnection leads being aligned in parallel relationship, intermediate the major sidewalls of the package body and the corresponding outer lead parts of the plurality of interconnection leads being bent, relatively to the corresponding inner lead parts and toward the bottom wall, so as to extend laterally in one of first and second, opposite directions from the planar edge surface;
- a plurality of support legs secured within the package body and disposed in correspondence to, and emerging from, the planar edge surface, an outer leg part of each support leg being bent and extending, exteriorly of the package body, laterally in a selected one of the first and second directions relatively to the planar edge surface, the outer leg parts of the support legs being of a longer dimension than the outer lead parts of the interconnection leads and supporting said package body when said outer leg parts are received on a supporting substrate and such that the pair of major sidewalls of the package is disposed in an erect position relatively to the substrate; and
- a reinforcement member provided in correspondence to each of said support legs, each said reinforcement member supporting said package body against tilting by contacting said package body.
- 7. The semiconductor device of claim 6, wherein said successive outer lead parts are bent in alternating succession in respective, said first and second opposite directions.
- 8. The semiconductor device of claim 6, wherein all of said outer lead parts are bent in a selected one of said first and second directions.
- 9. The semiconductor device package of claim 6, wherein said outer lead parts are arranged in plural groups, each group comprising plural outer lead parts, and wherein successive said groups of said outer lead parts are bent in alternating succession in respective, said first and second opposite directions.
- 10. The semiconductor device package of claim 6, wherein said outer lead parts have corresponding distal ends and said outer leg parts have corresponding distal ends, the distal ends of the outer leg parts being disposed laterally outwardly of the distal ends of the outer lead parts.
- 11. The semiconductor device package of claim 6, wherein the outer lead parts of said plurality of support legs are bent in alternating succession in respective, said first and second directions.
- 12. The semiconductor device package of claim 6 further comprising a lead frame embedded within said package body and supporting said semiconductor chip thereupon.
- 13. The semiconductor device package of claim 12, wherein at least selected support legs of said plurality of support legs are integral with said lead frame.
- 14. The semiconductor device of claim 6, wherein said lead frame has first and second mutually opposing major surfaces and wherein said semiconductor chip is mounted on the first major surface, further comprising;
- a second semiconductor chip, said second semiconductor chip being mounted on the second major surface of said lead frame.
Priority Claims (4)
Number |
Date |
Country |
Kind |
3-113483 |
May 1991 |
JPX |
|
3-162976 |
Jul 1991 |
JPX |
|
3-255415 |
Oct 1991 |
JPX |
|
4-52434 |
Mar 1992 |
JPX |
|
Parent Case Info
This application is a division of application No. 08/330,737, filed Oct. 28, 1994, abandoned, which is a continuation of 07/881,899, filed May 12, 1992, now abandoned.
US Referenced Citations (5)
Foreign Referenced Citations (16)
Number |
Date |
Country |
0333374 |
Sep 1989 |
EPX |
52-166467 |
Jun 1951 |
JPX |
60-241241 |
Nov 1985 |
JPX |
60-242653 |
Dec 1985 |
JPX |
61-174656 |
Aug 1986 |
JPX |
62-243348 |
Oct 1987 |
JPX |
63-169055 |
Jul 1988 |
JPX |
1-089353 |
Apr 1989 |
JPX |
1-166545 |
Jun 1989 |
JPX |
1-230254 |
Sep 1989 |
JPX |
1-230265 |
Sep 1989 |
JPX |
1-140844 |
Sep 1989 |
JPX |
2-110960 |
Apr 1990 |
JPX |
2-125651 |
May 1990 |
JPX |
3-104265 |
May 1991 |
JPX |
3-129866 |
Jun 1991 |
JPX |
Non-Patent Literature Citations (2)
Entry |
Patent Abstracts of Japan, vol. 11, No. 359 (E-559), Nov. 12, 1987 & JP-A-62 136 060 (Mitsubishi Electric Corp.), Jun. 19, 1987. |
Patent Abstracts of Japan, vol. 14, No. 324 (E-951), Jul. 11, 1990 & JP-A-02 109 357 (Sumitomo Special Metals Co.), Apr. 23, 1990. |
Divisions (1)
|
Number |
Date |
Country |
Parent |
330737 |
Oct 1994 |
|
Continuations (1)
|
Number |
Date |
Country |
Parent |
881899 |
May 1992 |
|