This application claims the priority benefit of Taiwan application serial no. 100150088, filed on Dec. 30, 2011. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
1. Field of the Disclosure
The disclosure relates to a bump structure and an electronic packaging solder joint structure and a fabricating method thereof. Particularly, the disclosure relates to a bump structure used to form an intermetallic compound, and an electronic packaging solder joint structure having the intermetallic compound and a fabricating method thereof.
2. Description of Related Art
In an electronic packaging process, commonly used solder joints is micro solder joints. The bonding method of the micro solder joints mainly uses an eutectic bonding and is an irreversible chemical reaction. Intermetallic compound (IMC) is formed by an interreaction between a part of the metal and the solder in the solder joint after eutectic bonding.
Because a general micro solder joint has a less content of the IMC therein, the micro solder joint has better flexibility and toughness, which leads to better capability in anti-mechanical stress, though the micro solder joint has a poor capability in anti-electromigration (EM).
In a situation of increasing heating time or temperature on purpose, or after a temperature cycling reliability testing process, the micro solder joint forms a great content of the IMC very fast due to a high temperature, and the solder has be totally transformed to the IMC. The micro solder joint having the great content of the IMC has hardness higher than that of the original micro solder joint, which has higher rigidity and is lack of flexibility, so that the micro solder joint having the great content of the IMC is liable to be damaged in the temperature cycling reliability testing process. However, the micro solder joint has a characteristic of mitigating an electromigration effect by increasing the content of the IMC.
Therefore, an electronic packaging solder joint structure having both of the characteristics of anti-mechanical stress and anti-electromigration effect is required to be developed, so as to improve reliability and performance of the solder joint.
The disclosure is directed to a bump structure, which is used to form an intermetallic compound with a specific shape.
The disclosure is directed to a method for fabricating an electronic packaging solder joint structure, by which the electronic packaging solder joint structure with better reliability and performance is fabricated.
The disclosure provides a bump structure including a substrate, a pad, an electrode and a protruding electrode. The pad is disposed on the substrate. The electrode is formed by a first metal material and is disposed on the pad. The protruding electrode is formed by a second metal material and is disposed on the electrode, wherein a cross-sectional area of the protruding electrode is less than a cross-sectional area of the electrode.
The disclosure provides an electronic packaging solder joint structure including a first substrate, a second substrate and a solder joint. The first substrate includes at least a first electrode disposed on the first substrate. The second substrate includes at least a second electrode disposed on the second substrate. The solder joint is disposed between the first electrode and the second electrode, and includes an intermetallic compound layer and a conductive material layer. The intermetallic compound layer is a continuous structure, and is directly connected to the first electrode and the second electrode. The conductive material layer is disposed around the intermetallic compound layer and covers the intermetallic compound layer.
The disclosure provides a method for fabricating an electronic packaging solder joint structure, which includes following steps. A first substrate is provided, and at least a first electrode, at least a first protruding electrode and at least a first conductive material have been formed on the first substrate, where the first protruding electrode is formed on the first electrode, and the first conductive material covers the first electrode and the first protruding electrode. A second substrate is provided, and at least a second electrode, at least a second protruding electrode and at least a second conductive material have been formed on the second substrate, where the second protruding electrode is formed on the second electrode, and the second conductive material covers the second electrode and the second protruding electrode. A bonding process is performed on the first substrate and the second substrate to connect the first protruding electrode and the second protruding electrode to form an intermetallic compound layer, where the intermetallic compound layer is a continuous structure, and is directly connected to the first electrode and the second electrode.
In order to make the aforementioned and other features and advantages of the disclosure comprehensible, several exemplary embodiments accompanied with figures are described in detail below.
The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure.
Referring to
A patterned photoresist layer 106a is formed on the substrate 100a, and the patterned photoresist layer 106a exposes the pad 102a. In the present embodiment, the patterned photoresist layer 106a further exposes a part of the passivation layer 104a. A material of the patterned photoresist layer 106a is, for example, positive photoresist or negative photoresist. The patterned photoresist layer 106a is, for example, formed through a photolithography process.
At least one electrode 108a is formed on the pad 102a and the passivation layer 104a exposed by the patterned photoresist layer 106a. A material of the electrode 108a is, for example, Cu, Ag, Ni, Al, Ti, W, Cr, Au, Zn, Bi, In or alloys thereof, etc. A method of forming the electrode 108a is, for example, electroplating. Although the electrode 108a is formed through the aforementioned method, the disclosure is not limited thereto.
Referring to
A patterned photoresist layer 110a is formed on the substrate 100a, and the patterned photoresist layer 110a exposes a part of the electrode 108a. A material of the patterned photoresist layer 110a is, for example, positive photoresist or negative photoresist. The patterned photoresist layer 110a is, for example, formed through a photolithography process.
Moreover, a metal stacking structure 116a formed by alternately stacking at least one metal layer 112a and at least one metal layer 114a is formed on the electrode 108a exposed by the patterned photoresist layer 110a. A material of the metal layer 112a is, for example, Cu, Ag, Ni, Al, Ti, W, Cr, Au, Zn, Bi, In or alloys thereof, etc., and a material of the metal layer 114a is, for example, Sn. A method of forming the metal layer 112a and the metal layer 114a is, for example, electroplating.
Referring to
A thermal process is performed on the metal stacking structure 116a, so that the metal layer 112a and the metal layer 114a react to form at least one protruding electrode 118a on the electrode 108a. A material of the protruding electrode 118a is, for example, an intermetallic compound, for example, CuxSny, NixSny, InxSny, ZnxSny or AuxSny, etc. The thermal process is, for example, a reflow process or an aging process. A heating temperature of the thermal process is, for example, 150° C.-300° C., and a heating time of the thermal process is, for example, 3 seconds to 60 minutes. Although the protruding electrode 118a is formed through the aforementioned method, the disclosure is not limited thereto.
A patterned photoresist layer 120a is formed on the substrate 100a, where the patterned photoresist layer 120a exposes the electrode 108a and the protruding electrode 118a. A material of the patterned photoresist layer 120a is, for example, positive photoresist or negative photoresist. The patterned photoresist layer 120a is, for example, formed through a photolithography process.
At least one conductive material 122a is formed to cover the electrode 108a and the protruding electrode 118a. A material of the conductive material 122a is, for example, Sn, SnAg or SnAgCu, etc., and a method of forming the conductive material 122a is, for example, electroplating.
Referring to
Now, the electrode 108a, the protruding electrode 118a and the conductive material 122a are formed on the substrate 100a, where the protruding electrode 118a is formed on the electrode 108a, and the conductive material 122a covers the electrode 108a and the protruding electrode 118a. Moreover, the pad 102a and the passivation layer 104a are further formed on the substrate 100a. The pad 102a is formed on the substrate 100a. The passivation layer 104a is formed on the substrate 100a and the pad 102a, and exposes a part of the pad 102a.
Here, a bump structure 123a is described with reference of
Referring to
Here, a bump structure 123b is described with reference of
Moreover, referring to
The intermetallic compound layer 124 is, for example, a column-like structure, and a material of the intermetallic compound layer 124 is, for example, CuxSny, NixSny, InxSny, ZnxSny or AuxSny, etc.
The intermetallic compound layer 124, for example, forms an electrical channel with the electrode 108a and the electrode 108b through a chemical bonding method.
The conductive material layer 126 is disposed around the intermetallic compound layer 124, and is connected to the intermetallic compound layer 124. Moreover, the conductive material layer 126 is, for example, connected to the electrode 108a and the electrode 108b. A material of the conductive material layer 126 is, for example, Sn, SnAg or SnAgCu, etc. A resistance coefficient of the intermetallic compound layer 124 is, for example, smaller than a resistance coefficient of the conductive material layer 126, so that when electrons flow through the solder joint 128, the electrodes flow towards the intermetallic compound layer 124 as far as possible, which may further improve the capability of anti-electromigration.
In the embodiment, although the intermetallic compound layer 124 having a column-like shape is taken as an example for descriptions, the disclosure is not limited thereto. In other embodiments, by selecting the materials of the electrode 108a and the electrode 108b, the electrode 108a and the electrode 108b can respectively react with the conductive material 122a and the conductive material 122b, and the intermetallic compound layer 124 can form an I-shape structure (similar to an intermetallic compound layer 128 of
According to the above embodiment, it is known that since the intermetallic compound layer 124 in the solder joint 128 is a continuous structure and is directly connected to the electrode 108a and the electrode 108b, and the conductive material layer 126 is disposed around the intermetallic compound layer 124, the electronic packaging solder joint structure may have both characteristics of anti-mechanical stress and anti-electromigration, so as to achieve better reliability and performance. Moreover, the method for fabricating the electronic packaging solder joint structure disclosed by the disclosure can be easily integrated with the existing processes.
Referring to
A patterned photoresist layer 206a is formed on the substrate 200a, and the patterned photoresist layer 206a exposes the pad 202a. In the present embodiment, the patterned photoresist layer 206a further exposes a part of the passivation layer 204a. A material of the patterned photoresist layer 206a is, for example, positive photoresist or negative photoresist. The patterned photoresist layer 206a is, for example, formed through a photolithography process.
At least one electrode 208a is formed on the pad 202a and the passivation layer 204a exposed by the patterned photoresist layer 206a. A material of the electrode 208a is, for example, Cu, Ag, Ni, Al, Ti, W, Cr, Au, Zn, Bi, In or alloys thereof, etc. A method of forming the electrode 208a is, for example, electroplating. Although the electrode 208a is formed through the aforementioned method, the disclosure is not limited thereto.
Referring to
A patterned photoresist layer 210a is formed on the substrate 200a, and the patterned photoresist layer 210a exposes a part of the electrode 208a. A material of the patterned photoresist layer 210a is, for example, positive photoresist or negative photoresist. The patterned photoresist layer 210a is, for example, formed through the photolithography process.
Moreover, a protruding electrode 212a is formed on the electrode 208a exposed by the patterned photoresist layer 210a. A material of the protruding electrode 212a is, for example, Cu, Ag, Ni, Al, Ti, W, Cr, Au, Zn, Bi, In or alloys thereof, etc. The materials of the protruding electrode 212a and the electrode 208a can be the same or different. A method of forming the protruding electrode 212a is, for example, electroplating. Although the electrode 212a is formed through the aforementioned method, the disclosure is not limited thereto.
Referring to
A patterned photoresist layer 214a is formed on the substrate 200a, and the patterned photoresist layer 214a exposes the electrode 208a and the protruding electrode 212a. A material of the patterned photoresist layer 214a is, for example, positive photoresist or negative photoresist. The patterned photoresist layer 214a is, for example, formed through a photolithography process.
At least one conductive material 216a is formed to cover the electrode 208a and the protruding electrode 212a. A material of the conductive material 216a is, for example, Sn, SnAg or SnAgCu, etc., and a method of forming the conductive material 216a is, for example, electroplating.
Referring to
Now, the electrode 208a, the protruding electrode 212a and the conductive material 216a are formed on the substrate 200a, where the protruding electrode 212a is formed on the electrode 208a, and the conductive material 216a covers the electrode 208a and the protruding electrode 212a. Moreover, the pad 202a and the passivation layer 204a are further formed on the substrate 200a. The pad 202a is formed on the substrate 200a. The passivation layer 204a is formed on the substrate 200a and the pad 202a, and exposes a part of the pad 202a.
Here, a bump structure 217a is described with reference of
Referring to
Here, a bump structure 217b is described with reference of
Moreover, referring to
In the embodiment, the intermetallic compound layer 218 is, for example, an I-shape structure, and a material of the intermetallic compound layer 218 is, for example, CuxSny, NixSny, InxSny, ZnxSny or AuxSny, etc.
The intermetallic compound layer 218, for example, forms an electrical channel with the electrode 208a and the electrode 208b through a chemical bonding method. Moreover, since the materials of the protruding electrode 212a and the electrode 208a can be the same or different, and the materials of the protruding electrode 212b and the electrode 208b can be the same or different, materials of the first portion 218a, the second portion 218b and the third portion 218c can be the same or different, which can be determined by those skilled in the art according to the product design.
The conductive material layer 220 is disposed around the intermetallic compound layer 218, and is connected to the intermetallic compound layer 218. Moreover, the conductive material layer 220 is, for example, isolated to the electrode 208a and the electrode 208b through the intermetallic compound layer 218. A material of the conductive material layer 220 is, for example, Sn, SnAg or SnAgCu, etc. A resistance coefficient of the intermetallic compound layer 218 is, for example, smaller than a resistance coefficient of the conductive material layer 220, so that when electrons flow through the solder joint 222, the electrodes flow towards the intermetallic compound layer 218 as far as possible, which may further improve the capability of anti-electromigration.
In the embodiment, although the intermetallic compound layer 218 having the I-shape is taken as an example for descriptions, the disclosure is not limited thereto. In other embodiments, by selecting the materials of the electrode 208a and the electrode 208b, the electrode 208a and the electrode 208b do not react with the conductive material 216a and the conductive material 216b, and the intermetallic compound layer 218 only has the first portion 218a formed through reaction between the protruding electrode 212a and the conductive material 216a and reaction between the protruding electrode 212b and the conductive material 216b to form a column-like structure (similar to the intermetallic compound layer 124 of
Similarly, since the intermetallic compound layer 218 in the solder joint 222 is a continuous structure and is directly connected to the electrode 208a and the electrode 208b, and the conductive material layer 220 is disposed around the intermetallic compound layer 218, the electronic packaging solder joint structure may better reliability and performance. Moreover, when the intermetallic compound layer 218 has the I-shape structure, the electrodes are forced to flow through the intermetallic compound layer 218, so as to further improve the capability of anti-electromigration. Moreover, the method for fabricating the electronic packaging solder joint structure disclosed by the disclosure can be easily integrated with the existing processes.
The electronic packaging solder joint structures provided by the aforementioned embodiments are described below with reference of
Referring to
According to the above embodiment, it is known that in the electronic packaging solder joint structure, since the intermetallic compound layer 124 in the solder joint 128 is a continuous structure and is directly connected to the electrode 108a and the electrode 108b, and the conductive material layer 126 is disposed around the intermetallic compound layer 124, the electronic packaging solder joint structure may have both characteristics of anti-mechanical stress and anti-electromigration, so as to achieve better reliability and performance.
Referring to
Similarly, in the electronic packaging solder joint structure, since the intermetallic compound layer 218 in the solder joint 222 is a continuous structure and is directly connected to the electrode 208a and the electrode 208b, and the conductive material layer 220 is disposed around the intermetallic compound layer 218, the electronic packaging solder joint structure may have both characteristics of anti-mechanical stress and anti-electromigration, so as to achieve better reliability and performance. Moreover, when the intermetallic compound layer 218 has the I-shape structure, the electrodes are forced to flow through the intermetallic compound layer 218, so as to further improve the capability of anti-electromigration.
In sum, the aforementioned embodiments at least has following characteristics:
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the disclosure cover modifications and variations of this disclosure provided they fall within the scope of the following claims and their equivalents.
Number | Date | Country | Kind |
---|---|---|---|
100150088 A | Dec 2011 | TW | national |
Number | Name | Date | Kind |
---|---|---|---|
5640052 | Tsukamoto | Jun 1997 | A |
5985692 | Poenisch et al. | Nov 1999 | A |
6297559 | Call et al. | Oct 2001 | B1 |
6356333 | Uchiyama | Mar 2002 | B1 |
6451875 | Suga et al. | Sep 2002 | B1 |
6583512 | Nakaoka et al. | Jun 2003 | B2 |
6642079 | Liu et al. | Nov 2003 | B1 |
6906427 | Tanaka et al. | Jun 2005 | B2 |
6938815 | Li | Sep 2005 | B2 |
7224067 | Suh | May 2007 | B2 |
7384863 | Shibata | Jun 2008 | B2 |
7436073 | Tanaka | Oct 2008 | B2 |
7462940 | Bauer et al. | Dec 2008 | B2 |
7528487 | Imai | May 2009 | B2 |
7629246 | Patwardhan et al. | Dec 2009 | B2 |
7939939 | Zeng et al. | May 2011 | B1 |
8330272 | Haba | Dec 2012 | B2 |
20020090756 | Tago et al. | Jul 2002 | A1 |
20070075435 | Suminoe et al. | Apr 2007 | A1 |
20070152331 | Kang et al. | Jul 2007 | A1 |
20070284741 | Hua et al. | Dec 2007 | A1 |
20080237314 | Yu et al. | Oct 2008 | A1 |
20100246150 | Wong et al. | Sep 2010 | A1 |
20110001250 | Lin et al. | Jan 2011 | A1 |
20110062580 | Liu et al. | Mar 2011 | A1 |
20110088935 | Ishimatsu et al. | Apr 2011 | A1 |
20110101523 | Hwang et al. | May 2011 | A1 |
20110101526 | Hsiao et al. | May 2011 | A1 |
20110285015 | Song et al. | Nov 2011 | A1 |
20110317385 | Zhou et al. | Dec 2011 | A1 |
20120025362 | Chandrasekaran et al. | Feb 2012 | A1 |
20120083113 | Arvin et al. | Apr 2012 | A1 |
20120156512 | Nakano et al. | Jun 2012 | A1 |
20120273951 | Getty et al. | Nov 2012 | A1 |
Number | Date | Country |
---|---|---|
101075595 | Nov 2007 | CN |
102142418 | Aug 2011 | CN |
102222747 | Oct 2011 | CN |
200607030 | Feb 2006 | TW |
200607416 | Feb 2006 | TW |
200633609 | Sep 2006 | TW |
201133733 | Oct 2011 | TW |
Entry |
---|
Chau-Jie Zhan, et al., “Assembly and reliability characterization of 3D chip stacking with 3Oum pitch lead-free solder micro bump interconnection,” IEEE Electronic Components and Technology Conference, 2010, pp. 1043-1049. |
Yu-Min Lin, et al.,“Electromigration in Ni/Sn intermetallic micro bump joint for 3D IC chip stacking”, IEEE Electronic Components and Technology Conference, 2011, pp. 351-357. |
Su-Tsai Lu, et al., “A Novel Compliant-Bump Structure for ACA-Bonded Chip-on-Flex (COF) Interconnects with Ultra-Fine Pitch”, IEEE Electronics Components and Technology Conference, 2009, pp. 1544-1551. |
Laura Frisk, et al., “Reliability of ACF Interconnections on FR-4 Substrates”, IEEE Transactions on components and packaging technologies, Mar. 2010, vol. 33, No. 1, pp. 138-147. |
Jong-Woong Kim, et al., “Reliability of adhesive interconnections for application in display module”, Microelectronic Engineering 84, 2007, pp. 2691-2696. |
“Office Action of Taiwan Counterpart Application”, issued on Mar. 19, 2014, p. 1-p. 6. |
“Office Action of Taiwan Counterpart Application”, issued on Aug. 8, 2014, p. 1-p. 6. |
Number | Date | Country | |
---|---|---|---|
20130168851 A1 | Jul 2013 | US |