Claims
- 1. A stack up assembly, comprising:
a voltage regulation module (VRM) circuit board having a first side and a second side; a thermally conductive plate having a first side and a second side, wherein the thermally conductive plate first side is thermally coupled to the second side of the VRM circuit board; and a microprocessor, having a first side and a second side, the microprocessor first side thermally coupled to the vapor plate second side.
- 2. The stack up assembly of claim 1, wherein the thermally conductive plate is a vapor plate.
- 3. The stack up assembly of claim 2, further comprising:
a socket, physically coupled to the second side of the microprocessor, the socket having a plurality of pins electrically coupled to the microprocessor; and an interposer circuit board, electrically coupled to the pins and coupled between the socket and the second side of the microprocessor.
- 4. The stack up assembly of claim 3, wherein the microprocessor is electrically coupled to the interposer circuit board by an organic land grid array.
- 5. The stack up assembly of claim 3, wherein the socket is electrically coupled to a motherboard.
- 6. The stack up assembly of claim 3, wherein the first side of the microprocessor faces in a downward direction.
- 7. The stack up assembly of claim 5, wherein the vapor plate is thermally coupled to a plate via thermal standoffs.
- 8. The stack up assembly of claim 1, wherein the VRM circuit board includes electrical components mounted on the first side.
- 9. The stack up assembly of claim 1, further comprising a thermally conductive material displaced between the microprocessor and the vapor plate.
- 10. The stack up assembly of claim 3, further comprising:
at least one power transmitting mechanical standoff, disposed between the VRM circuit board and the interposer board, providing electrical continuity between the VRM circuit board and the interposer board.
- 11. The stack up assembly of claim 10, wherein:
the interposer circuit board includes a power plane and a ground plane; the VRM board includes a power plane and a ground plane; the power transmitting mechanical standoff includes
a first portion electrically coupling the interposer power plane and the VRM power plane; and a second portion, coaxial disposed in relation to the first portion electrically coupling the interposer ground plane and the VRM power plane.
- 12. The stack up assembly of claim 11, further comprising:
a second VRM circuit board having a first side and a second side, wherein the thermally conductive plate first side is thermally coupled to the second side of the second VRM circuit board; a second microprocessor, having a first side and a second side, the microprocessor first side thermally coupled to the vapor plate second side.
- 13. The stack up assembly of claim 12, further comprising a frame, substantially surrounding the first VRM circuit board, the second VRM circuit board, the first microprocessor and the second microprocessor.
- 14. The stack up assembly of claim 13, wherein the frame is electrically and mechanically coupled to a motherboard.
- 15. The stack up assembly of claim 14, wherein the frame is further electrically and mechanically coupled to a plate, wherein the frame, plate, and motherboard, thus form a three dimensional electrically grounded structure substantially containing electromagnetic interference.
- 16. The stack up assembly of claim 15, wherein the thermally conductive plate extends external to the frame.
- 17. The stack up assembly of claim 16, further comprising a heat exchanger thermally coupled to the thermally conductive plate.
- 18. The stack up assembly of claim 17, wherein the heat exchanger is mechanically bonded to the thermally conductive plate.
- 19. The stack up assembly of claim 18, wherein the heat exchanger is brazed to the thermally conductive plate.
- 20. The stack up assembly of claim 18, wherein the heat exchanger is soldered to the thermally conductive plate.
- 21. The stack up assembly of claim 18, wherein the heat exchanger is thermally coupled to the thermally conductive plate by a thermally conductive polymer.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims benefit of the following U.S. Provisional Patent Applications, each of which are incorporated by reference herein:
[0002] application Ser. No. 60/187,777, entitled “NEXT GENERATION PACKAGING FOR EMI CONTAINMENT, POWER DELIVERY, AND THERMAL DISSIPATION USING INTER-CIRCUIT ENCAPSULATED PACKAGING TECHNOLOGY,” by Joseph T. DiBene II and David H. Hartke, filed Mar. 8, 2000;
[0003] application Ser. No. 60/196,059, entitled “EMI FRAME WITH POWER FEED-THROUGHS AND THERMAL INTERFACE MATERIAL IN AN AGGREGATE DIAMOND MIXTURE,” by Joseph T. DiBene II and David H. Hartke, filed Apr. 10, 2000;
[0004] application Ser. No. 60/219,813, entitled “HIGH CURRENT MICROPROCESSOR POWER DELIVERY SYSTEMS,” by Joseph T. DiBene II, filed Jul. 21, 2000;
[0005] application Ser. No. 60/232,971, entitled “INTEGRATED POWER DISTRIBUTION AND SEMICONDUCTOR PACKAGE,” by Joseph T. DiBene II and James J. Hjerpe, filed Sep. 14, 2000;
[0006] application Ser. No. 60/251,222, entitled “INTEGRATED POWER DELIVERY WITH FLEX CIRCUIT INTERCONNECTION FOR HIGH DENSITY POWER CIRCUITS FOR INTEGRATED CIRCUITS AND SYSTEMS,” by Joseph T. DiBene II and David H. Hartke, filed Dec. 4, 2000;
[0007] application Ser. No. 60/251,223, entitled “MICRO-I-PAK FOR POWER DELIVERY TO MICROELECTRONICS,” by Joseph T. DiBene II and Carl E. Hoge, filed Dec. 4, 2000; and
[0008] application Ser. No. 60/251,184, entitled “MICROPROCESSOR INTEGRATED PACKAGING,” by Joseph T. DiBene II, filed Dec. 4, 2000.
[0009] This patent application is also continuation-in-part of the following co-pending and commonly assigned patent applications, each of which applications are hereby incorporated by reference herein:
[0010] application Ser. No. 09/353,428, entitled “INTER-CIRCUIT ENCAPSULATED PACKAGING,” by Joseph T. DiBene II and David H. Hartke, filed Jul. 15, 1999;
[0011] application Ser. No. 09/432,878, entitled “INTER-CIRCUIT ENCAPSULATED PACKAGING FOR POWER DELIVERY,” by Joseph T. DiBene II and David H. Hartke, filed Nov. 2, 1999;
[0012] Application Ser. No. 09/727,016, entitled “EMI CONTAINMENT USING INTER-CIRCUIT ENCAPSULATED PACKAGING TECHNOLOGY” by Joseph T. DiBene II and David Hartke, filed Nov. 28, 2000;
[0013] Application Ser. No.______ entitled “METHOD AND APPARATUS FOR PROVIDING POWER TO A MICROPROCESSOR WITH INTEGRATED THERMAL AND EMI MANAGEMENT,” by Joseph T. DiBene II, David H. Hartke, James J. Hjerpe Kaskade, and Carl E. Hoge, filed Feb. 16, 2001; and
[0014] Application Ser. No.______ entitled “THERMAL/MECHANICAL SPRINGBEAM MECHANISM FOR HEAT TRANSFER FROM HEAT SOURCE TO HEAT DISSIPATING DEVICE,” by Joseph T. DiBene II, David H. Hartke, Wendell C. Johnson, and Edward J. Derian, filed Mar. 2, 2001.
[0015] This patent application is also related to Application Ser. No.______ entitled “METHOD AND APPARATUS FOR DELIVERING POWER TO HIGH PERFORMANCE ELECTRONIC ASSEMBLIES” by Joseph T. DiBene II, David H. Hartke, Carl E. Hoge, James M. Broder, Edward J. Derian, Joseph S. Riel, and Jose B. San Andres, filed on same date herewith, which application is hereby incorporated by reference herein.
Provisional Applications (7)
|
Number |
Date |
Country |
|
60187777 |
Mar 2000 |
US |
|
60196059 |
Apr 2000 |
US |
|
60219813 |
Jul 2000 |
US |
|
60232971 |
Sep 2000 |
US |
|
60251222 |
Dec 2000 |
US |
|
60251223 |
Dec 2000 |
US |
|
60251184 |
Dec 2000 |
US |
Continuation in Parts (3)
|
Number |
Date |
Country |
Parent |
09353428 |
Jul 1999 |
US |
Child |
09802329 |
Mar 2001 |
US |
Parent |
09432878 |
Nov 1999 |
US |
Child |
09802329 |
Mar 2001 |
US |
Parent |
09727016 |
Nov 2000 |
US |
Child |
09802329 |
Mar 2001 |
US |