BRIEF DESCRIPTION OF THE DRAWINGS
Reference may now be made to the following detailed description of preferred embodiments of the invention, taken in conjunction with the accompanying drawings, in which:
FIG. 1A illustrates, generally diagrammatically, a representation of a plated surface of an integrated circuit package leadframe having wires bonded thereto in accordance with the prior art and wherein the surface is normally subjected to high stresses, resulting in delamination phenomena with an encapsulant;
FIG. 1B illustrates, more specifically, a structure in accordance with the prior art, illustrating an embodiment of a leadframe as in FIG. 1A, showing the wire bond connection and encapsulant which are subjected to high delamination stresses;
FIG. 2 illustrates, generally diagrammatically, the surface structure of a leadframe of an integrated circuit package showing the modified recessed configuration for the connection of wire bonds pursuant to the invention;
FIG. 3 illustrates a plan view of a wire bond arrangement pursuant to the invention showing multiple wire bonds connected to a leadframe structure;
FIG. 4 illustrates a step during the fabrication of the leadframe integrated circuit surface pursuant to the invention;
FIG. 5 illustrates a subsequent fabrication step thereof; and
FIG. 6 illustrates the final configuration of the plated well or recessed portion of the leadframe surface, which is in a readiness for wire bonding and encapsulation in accordance with the present invention.
DETAILED DESCRIPTION OF THE INVENTION
Referring in detail to the drawings, and particularly FIGS. 1A and 1B, both relating to prior art structures for leadframe integrated circuit package wire bond connections, as shown in FIG. 1A, there is generally diagrammatically illustrated a portion of a leadframe 10 having a layer 12 of silver plating covering the surface of a substrate or base material 14, consisting of copper or other suitable leadframe materials or alloys. Connected by bonding to the silver layer 12 pursuant to a usual wire bonding method are metallic wires 16, in this instance, gold wires, with the connections being in the plane “A” of the upper surface 18 of the silver plating layer 12.
For example, as shown in are more specific prior art representation in FIG. 1B of the drawings, the wires 16, which are preferably gold wires, are at one end thereof connected or bonded to the upper surface 18 of the silver plating layer 12 on the copper leadframe 10, the latter of which has a die 20 through attachment material 22 fastened thereto, as is known in the art, and with the gold wires 16 having their upper or opposite ends connected thereto. The bottom surface of the copper leadframe 10 may include an exposed die paddle structure 24, as is known in the technology. The upper surface arrangement of the components, including the gold wires 16, the silver plating layer 12 on the copper leadframe and the die 20 are encapsulated within a suitable mold compound 26, such as an epoxy. This clearly indicates, as illustrated in FIGS. 1A and 1B of the drawings, that the connection or bonding of the gold wires 16 to the silver plating layer 12 on the copper leadframe 10 is located in a plane “A” coinciding with surface 18 covered by the epoxy material or encapsulant 26. Thus, during fabrication and subsequent operation of the integrated circuit package 30 formed by the aforementioned components, which are subjected to extensive heat cycles, due to the highly differing coefficients of thermal expansion of materials, especially between the silver plating layer 12 and the epoxy encapsulant 26, high shear stresses and possibly tensile stresses will be generated between the components at the surface plane “A”; tending to delaminate the epoxy compound 26 from the silver plating layer 12, thereby tending to separate the connections formed by the wire bonds, in effect, pull the gold wires 16 away from the silver plating layer 12, potentially causing a failure of the integrated circuit package or at least adversely affecting the reliability of the wire bonds.
In order to obviate or eliminate the potential delamination problem encountered by the generated high stresses which are at their greatest level at the upper surface of the leadframe 10 and, particularly, plane “A” of the upper surface 18 of the silver plating layer 12 to which they were previously bonded, the gold wires 16; as shown in FIG. 2, there is formed in the unplated surface 32 of the copper material of the leadframe 10 at least one recess or well 34 of suitable size or peripheral dimension. This well or wells 34, rather than the entire upper surface 32 of the leadframe 10 being covered with a silver plating layer 12, only has the silver plating 12 provided within the confines of the well or wells 34 itself or themselves, and with the gold wire or wires 16 being bonded to the bottom 38 of the wells recessed below the upper surface 32 of the leadframe 10. In effect, the wire bonding is recessed below the previous surface plane “A” as shown in FIGS. 1A and 1B.
Thereafter, an epoxy compound or encapsulant 40 is applied so as to encapsulate the entire IC package structure, as is known in the technology. However, in this instance, any thermal stresses which are generated due to differences in coefficients of expansion are at their maximum or highest at the upper unplated surface 32 of the copper leadframe 10, where adhesion is strong, whereas the stresses present at the bottom 38 of the recesses or wells 34 are at a much lower level, thereby increasing the reliability of the wire bond arrangements during subsequent operations irrespective of the encountered temperature cycles to which the leadframe-based IC package is subjected.
As illustrated in FIG. 3 of the drawings, there is shown a plan view of a typical leadframe 50 showing multiple pockets or wells 51 and multiplicities of wire bond connections 54 extending from the integrated circuit 52 into the respective wells, the latter of which are preferably plated with a metallic layer, such as silver or the like. In this instance, as illustrated by way of example, the leadframe 50, as shown diagrammatically, includes about 44 wire leads from the integrated circuit to the well structures 51, and about 100 wire leads to the exterior package leads 56, although numerous other quantities of wells, of diverse sizes, shapes and numbers of wire leads connected to each respective well may also be contemplated within the scope of the present invention, in conformance with the requirements for a particular integrated circuit package.
Illustrated in FIGS. 4-6 are sequential process steps in implementing the fabrication of the inventive leadframe structure. In this instance, as shown in FIG. 4, the leadframe 60, which is constituted of a copper base material, although other materials can be utilized, has an etching mask 62 applied to the upper surface 64 thereof. The etching mask 62 only allows for an opening 66 in the mask in the region in which a well or recess 68 for effecting the wire bonding is to be formed. The etching mask 62, as may be known in the technology, can be either a mechanical or chemical mask, and only the surface region or area 70 to be etched or recessed as defined by the opening 66 in the mask is subjected to etchant material. This area 70 on the leadframe surface 64 is designed to be as small as possible, but large enough to accommodate the silver plating material employed and to accommodate wire bonding process tolerances.
As shown in FIG. 5 of the drawings, the etchant material is adapted to etch out a well or pocket-like recess 68 (or plurality of wells) of predetermined configuration (or diverse configurations and sizes) in the copper material of the leadframe upper surface 64. Thereafter, as illustrated in FIG. 6 of the drawings, the etching mask 62 is removed from the leadframe 60, in a manner as is known in the technology, and a silver plating layer 72 is applied to only the bottom surfaces 74 and sidewalls 76 in the well or wells 68, with the upper surface 64 of the leadframe copper material of the leadframe 60 remaining in an uncoated or unplated state. This enables the (gold) wires (as shown in FIG. 2) to be bonded to the silver plating layer 72 within the confines of the well or wells 68, and thereafter, encapsulant material applied thereon. In lieu of etching it is also possible to form the wells 68 by means of mechanical processes, such as stamping or the like.
Consequently, by minimizing the silver or metallic plating layer area, as shown in FIG. 6 of the drawings, to the bottom 74 and possibly to the sidewalls 76 of the respective well or recess 68, which has been previously etched or stamped into the upper surface 64 of the copper leadframe 60, and with this area together with the wire bonds having been moved out of the plane subjected to a higher encountered stress, in effect, by being recessed below the surface 64 to which the major portion of the encapsulant is adhered, any potential delamination of the encapsulant with respect to the recessed or well areas will be significantly reduced, thereby improving upon the reliability of the wire bond and resultingly the integrity of the IC package.
Moreover, pursuant to the present invention, by not only reducing the stresses acting on the recessed surfaces for the wire bonding, this produces a more robust package and provides for localized and chemical locking features for the wire bonds into specific recessed regions provided for by the wells in the leadframe.
Although the invention has been described in connection with integrated circuit packages and copper leadframes, it is clearly applicable to all type wire bonds, which are traditionally most susceptible to thermal stress induced delamination failures. Moreover, there may be applicable to C4 or flip chip integrated circuit package connections in order to prevent the failure thereof caused by delamination between encapsulant epoxy materials and the surfaces having the C4 or flip chip connections formed thereon.
While the present invention has been particularly shown and described with respect to preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in forms and details may be made without departing from the scope and spirit of the present invention. It is therefore intended that the present invention not be limited to the exact forms and details described and illustrated, but fall within the scope of the appended claims.