Patent Application
20090301757
The present invention relates generally to integrated circuit (IC) packaging and, more particularly, to the implementation of bond wires for semiconductor devices.
The electronics industry continues to rely upon advances in semiconductor technology to realize higher-function devices in more compact areas. For many applications, realizing higher-functioning devices requires integrating a large number of electronic devices into a single silicon wafer. As the number of electronic devices per given area of the silicon wafer increases, the manufacturing process becomes more difficult.
Many varieties of semiconductor devices have been manufactured with various applications in numerous disciplines. Such silicon-based semiconductor devices often include metal-oxide-semiconductor field-effect transistors (MOSFET), such as p-channel MOS (PMOS), n-channel MOS (NMOS) and complementary MOS (CMOS) transistors, bipolar transistors, or BiCMOS transistors. Such MOSFET devices include an insulating material between a conductive gate and silicon-like substrate; therefore, these devices are generally referred to as IGFETs (insulated-gate FET).
Each of these semiconductor devices generally includes a semiconductor substrate on which a number of active devices are formed. The particular structure of a given active device can vary between device types. For example, in MOS transistors, an active device generally includes source and drain regions and a gate electrode that modulates current between the source/drain regions.
Furthermore, such devices may be digital or analog devices produced in a number of wafer fabrication processes, for example, CMOS, BiCMOS, Bipolar, etc. The substrates may be silicon, gallium arsenide (GaAs) or other substrate suitable for building microelectronic circuits thereon.
After undergoing the process of fabrication, the silicon wafer has a predetermined number of devices. These devices are tested and functional devices are collected and packaged.
The packaging of complex IC devices is increasingly playing a role in their ultimate performance. Many packages include a substrate upon which a device die is mounted on a predetermined die attach area surrounded by pad landings. The device die itself has bonding pads to facilitate its connection to the outside world via bond wires attached to respective bonding pads from their respective pad landings surrounding the die attach area. The pad landings connect to external contacts through electrical traces defined in the substrate. In some package types, the assembled device is protected from environmental damage through encapsulation in a suitable molding compound.
As devices grow in complexity the number of wire bonds approaches hundreds. Such complex products include laptop computers, portable digital assistants (PDAs), wireless telephones, automotive electronic control modules, etc.
Materials used in wire bonding of IC devices to package substrate are often precious metals or other costly materials. For instance, a common materials used in wire bonding include gold, aluminum, copper, palladium-alloy, platinum and silver. Gold has a number of properties making it eminently suitable, for example, its conductivity, corrosion resistance, and malleability. In particular, gold's malleability permits the user to form and draw out the metal into fine shapes, such as the microscopically fine bond wire used in IC devices. Additionally, gold bonds well with the various IC devices.
As the demand for complex electronics products increase, so does the consumption of the wire bonding materials. With increasing demand in the electronics and other industries coupled with a limited supply worldwide, the cost of the materials inexorably rises.
Various aspects of the present invention are directed to methods and arrangements for implementing bond wires in a manner that addresses and overcomes the above-mentioned issues.
Consistent with one example embodiment, the present invention is directed to a composite bond wire having an inner portion of the composite bond wire and an outer layer of conductive material. The electrical resistance of the outer layer has a lower electrical resistance than the electrical resistance of the inner portion.
Consistent with a further example embodiment, the present invention is directed to a method used for producing a composite bond wire suitable for an integrated circuit. A conductive material is melted and mixed with a ceramic material to create a mixture of the conductive material and the ceramic material. The mixture is used to create a composite bond wire.
The above summary of the present invention is not intended to describe each embodiment or every implementation of the present invention. Advantages and attainments, together with a more complete understanding of the invention, will become apparent and appreciated by referring to the following detailed description and claims taken in conjunction with the accompanying drawings.
The invention may be more completely understood in consideration of the following detailed description of various embodiments of the invention in connection with the accompanying drawings, in which:
While the invention is amenable to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the invention to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the scope of the invention as defined by the appended claims.
The present invention is believed to be applicable to a variety of integrated circuits and approaches involving bond wires. While the present invention is not necessarily limited to such applications, an appreciation of various aspects of the invention is best gained through a discussion of examples in such an environment.
Consistent with an example embodiment of the present invention, an integrated circuit device is constructed using one or more composite bond wires constructed of a mixture of a material having a high conductivity and submicron particles having a lower conductivity.
Another example embodiment of the present invention includes a method of constructing composite bond wires. A first material having a low conductivity is used to create a bond wire. The bond wire is coated with a layer of a second material having a high conductivity. The thickness of the layer is determined by the expected frequency of signals to be transmitted through the bond wires.
In a particular embodiment, the thickness of the second layer corresponds to the computation of the skin effect or skin depth of the bond wire. The behavior of electrical conductors at increasing frequency has been described as the skin effect. The skin effect causes the effective resistance of the conductor to increase with the frequency of the current.
In the following example, the current density J in an infinitely thick plane conductor decreases exponentially with depth 6 from the surface, as follows:
J=JSe−δ/d (1)
where d is a constant called the skin depth. This is defined as the depth below the surface of the conductor at which the current is 1/e (about 0.37) times the current at the surface (JS). It can be calculated as follows:
where
ρ=resistance of the conductor
ω=angular frequency of the current=2π×frequency
μ=absolute magnetic permeability of the conductor
The resistance of a flat slab (much thicker than d) to alternating current is essentially equal to the resistance of a plate of thickness d to direct current. For long, thin conductors such as wires, the resistance is approximately that of a hollow tube with wall thickness d carrying direct current. For example, for a round wire, the AC resistance is approximately:
where
L=length of conductor
D=diameter of conductor
The final approximation above is accurate if D>>d.
A convenient formula (attributed to F.E. Terman) for the diameter DW (mm) of a wire of circular cross-section whose resistance will increase by 10% at frequency f (hertz) is:
Below, the approximate skin depth at various frequencies is shown for a copper wire.
Thus, for a given cross-sectional area of wire, the flow of current at increasing frequency occurs at a smaller distance from the wire surface. Using the skin effect, it is possible to reduce the metal content of a metal bond wire because, as the frequency increases, less of the cross-sectional area of the wire is relevant to the effective resistance of the bond wire. For example, a wire made to operate at a 100 KHz could be constructed using about 0.21 mm of copper surrounding an inner core of lower conductivity material.
With respect to bond wires used in the packaging of high performance semiconductor device and constructed from a precious metal, such as gold, the present invention has been found useful in reducing the metal content of bond wires. At high frequencies, it is possible to construct a bond wire having a core of lower conductivity material surrounded by a predetermined thickness of higher conductivity metal. The thickness of higher conductivity metal can be made relatively thin for higher frequency applications or thicker for lower frequency applications.
Turning now to the figures,
Die 108 is mounted on substrate 112 and is electrically connected to pads on the substrate using bond wire 110. The integrated circuit arrangement depicted in
The characteristics (e.g., conductivity and flexibility) of the inner portion of the bond wire can be controlled using different methods. A first method involves selecting a material that exhibits the desired characteristics and forming the inner portion from the material. Thus, conductive materials (such as copper, aluminum, nickel, and silver) as well as insulating materials (such as ceramics) can be used to form the inner portion. The outer portion of the bond wire is formed from a material that meets the electrical requirements of the application as determined by the signal frequency and conductivity requirements.
A second method involves mixing a lower conductivity material with a higher conductivity material. This mixture forms the inner portion of the bond wire. In a specific example, the lower conductivity material is submicron ceramic particles, and the higher conductivity material is a metal, such as gold. The outer portion is formed from either a pure form of the higher cost material or from a mixture that has an increased ratio of higher conductivity material to lower conductivity material (as compared to the inner portion). Example submicron ceramic particles include materials, such as oxides, carbides, borides or nitrides. Other, specific examples of ceramic particles include alumina, beryllia or steatite. Alternatively, conductive submicron particles can be used.
In another embodiment, the bond wire of
The resulting mixture is formed into wires, as shown by block 306. In a specific example of forming wires, the mixture is “drawn” or “pulled” to the desired wire diameter, however, other wire formation techniques are also envisioned. The wire is then optionally coated with one or more layers of higher conductivity material as shown in block 308. Thus, the additional layers can be constructed to meet more stringent electrical characteristics (e.g., conductivity for higher frequencies). After the final layer is added, the bond wire is used in the integrated circuit as shown by block 310.
The various embodiments described above and shown in the figures are provided by way of illustration only and should not be construed to limit the invention. Based on the above discussion and illustrations, those skilled in the art will readily recognize that various modifications and changes may be made to the present invention without strictly following the exemplary embodiments and applications illustrated and described herein. For instance, applications other than metal and ceramic bond-wires may be amenable to implementation using similar approaches. Such modifications and changes do not depart from the true scope of the present invention that is set forth in the following claims.
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/IB07/51972 | 5/25/2007 | WO | 00 | 7/17/2009 |
| Number | Date | Country | |
|---|---|---|---|
| 60808587 | May 2006 | US |
