Patent Application
20060186519
1. Field of the Invention
The present invention relates to a semiconductor device and a unit equipped with the same, and in particular, it relates to a semiconductor device useful for pitch reduction, as well as a unit equipped with the same.
2. Description of the Related Technology
The structure of a semiconductor device, just as represented by a chip size package (CSP), has been configured to form the shape closer to a bare chip, as the miniaturization of the integrated circuit has been required. Consequently, a technique of joining this semiconductor device to a wiring substrate by flip chip mounting method has gained the attention.
The joining of the semiconductor device to the wiring substrate by the above-described flip chip mounting method is conducted by interposing bumps disposed on a main surface side of the semiconductor substrate comprising the semiconductor device. In order to arrange the bumps with small pitches therebetween, the volume of each of the bumps must be reduced to avoid adjacent bumps from contacting each other.
However, when the volume of each of the bumps is reduced, a gap between the semiconductor substrate and the wiring substrate is decreased. Therefore, underfilling, by which a resin is filled in the gap for stable joining and to improve or ensure the connection reliability, becomes difficult.
Consequently, in order to ensure the above-described gap, a joint bump using a post-shaped metal column has been proposed. Semiconductor devices using this type of post-shaped joint bump and methods of mounting them have been disclosed, for example, in Japanese Unexamined Patent Application Publications No. 5-136201 and No. 2002-313993, and U.S. Pat. No. 6,592,019.
A technique of forming a joint bump having a metal column formed by a wire bonding method is disclosed in the paragraph 0020 and FIG. 1 of the Japanese Unexamined Patent Application Publication No. 5-136201.
A technique of forming a joint bump in which a metal column is formed by a plating method and a solder ball is disposed on the top surface of the metal column is disclosed in the paragraphs 0002 to 0007 and FIGS. 18 to 24 of the Japanese Unexamined Patent Application Publication No. 2002-313993.
A technique in which a metal column and a solder layer disposed thereon are formed by a plating method, and the solder layer is joined to a wiring substrate, and a technique in which the solder layer is temporarily formed into a ball by reflow and is joined to a wiring substrate are disclosed in the column 7 lines 16 to 54 and FIGS. 1 to 3 of the U.S. Pat. No. 6,592,019.
However, in the technique disclosed in the Japanese Unexamined Patent Application Publication No. 5-136201, a wire bump should be formed on a terminal basis. Therefore, application to a semiconductor device having a lot of input and output terminals becomes difficult. In addition, it is difficult to make the heights of individual bumps uniform. Consequently, the application to a recent high-pin-count, narrow-pitch type semiconductor device is considered to be difficult.
In the technique disclosed in the Japanese Unexamined Patent Application Publication No. 2002-313993, as shown in the paragraph 0007 and FIG. 22 thereof, a process to cover the top surfaces of the metal columns is necessary. Therefore, the metal columns must be polished to be in the state shown in FIG. 23 before the solder balls are formed. In addition, there is a problem that a gap for underfilling cannot be ensured since the semiconductor device is constructed while the metal columns are embedded in the resin.
On the other hand, in the technique disclosed in the U.S. Pat. No. 6,592,019, metal columns and solder layers are formed by plating, and mounting them onto a wiring substrate is conducted while the metal columns are exposed. Therefore, this technique is considered to be excellent from the viewpoint of making the heights of individual bumps uniform and ensuring an underfill gap.
However, as is clear from the column 7 lines 47 to 53 in the U.S. Pat. No. 6,592,019, various problems which occur where the solder ball is formed temporarily by reflow of the solder layer disposed on the top surface of the metal layer are not described. Therefore, further study is required in order to precisely form a solder ball on the metal column.
Accordingly, it is an object of the present invention to provide a semiconductor device useful for forming a joint bump with a solder ball on the top surface of a columnar portion, as well as a unit equipped with the same.
In order to achieve the above-described object, a semiconductor device according to a first aspect of the present invention is characterized by comprising a plurality of columnar electrodes disposed on a semiconductor substrate, the above-described columnar electrode including a columnar portion made of an electrically conductive material and a metal ball portion made of an electrically conductive material having a melting point lower than that of the above-described columnar portion and joined to the top surface of the above-described columnar portion, wherein the above-described columnar electrode satisfies the relationship represented by A−E≦1.3×B1.5, where the volume of the above-described metal ball portion is represented by A, the area of the top surface of the above-described columnar portion is represented by B, and the volume of an projecting portion disposed on the top surface of the above-described columnar portion is represented by E.
As described above, the volume of the metal ball portion is controlled to be equal to or smaller than a predetermined volume determined by the area of the top surface of the columnar portion and the projecting portion disposed on the top surface. Consequently, the tension generated at the surface in contact with the columnar portion becomes larger than the gravity applied to the metal ball portion and, thereby, when the metal ball portion is formed by reflow of a low-melting point material, the low-melting point material is prevented from trickling on a side surface of the columnar portion.
Here, the projecting portion disposed on the top surface of the columnar portion refers to an projecting portion protruded from a horizontal line when the horizontal line intersecting the side surface of the columnar portion at a right angle is drawn at the top end of the columnar portion. Such a projecting portion may be formed naturally in the plating step or be formed intentionally. The low-melting point material can be prevented from trickling on a side surface of the columnar portion by taking the volume of this projecting portion into consideration.
When these structures are adopted, the surface area of a portion in contact with the low-melting point layer is taken as the above-described area B of the top surface of the columnar portion. Therefore, when these structures are adopted, the volume of the low-melting point layer can be increased since a wide contact area between the low-melting point layer and the columnar portion can be ensured.
As a result, the heights of individual columnar electrodes can be made uniform. Consequently, the joining precision of each electrode relative to the wiring substrate is improved and a structure in which the electrode pitch is minimized while the underfill gap is ensured can be realized.
Furthermore, according to the present technique, the metal ball portion joined to the top surface of the columnar portion can be formed without conducting additional treatment of the side surface of the columnar portion. Therefore, a semiconductor device provided with columnar electrodes having a simple structure and high reliability is produced. However, the present invention does not exclude the treatment of the side surface of the columnar portion. The treatment of the side surface of the columnar portion may be conducted to more reliably prevent the low-melting point material from trickling on the side surface of the columnar portion.
Here, it is desirable that the columnar portion is formed from a material having a low electrical resistance and a high melting point such as copper. It is desirable that the metal ball portion is formed from a material having a low melting point and high conformability to a material constituting the columnar portion such as solder. The columnar portion may be formed from an electrically conductive material, for example, nickel, aluminum, or titanium.
In the semiconductor device according to the first aspect of the present invention, preferably, each of the above-described columnar electrodes satisfies the relationship represented by D<C, where one-half of the pitch between the individual above-described columnar electrodes is represented by C and the height of the above-described metal ball portion is represented by D.
Contact between adjacent columnar electrodes can be avoided during the reflow conducted when the present semiconductor device is mounted on the wiring substrate by further controlling the relationship between the pitch of the columnar electrodes and the height of the metal ball portion, as described above.
A unit equipped with a semiconductor device according to a second aspect of the present invention is characterized in that the semiconductor device includes a plurality of columnar electrodes disposed on a semiconductor substrate and the semiconductor device is mounted on a wiring substrate with the individual columnar electrodes therebetween, the above-described columnar electrode including a columnar portion made of an electrically conductive material and a low-melting point metal layer made of an electrically conductive material having a melting point lower than that of the above-described columnar portion and joined to the top surface of the above-described columnar portion, wherein the above-described columnar electrode satisfies the relationship represented by A−E≦1.3×B1.5, where the volume of the above-described low-melting point metal layer is represented by A, the area of the top surface of the above-described columnar portion is represented by B, and the volume of an projecting portion disposed on the top surface of the above-described columnar portion is represented by E.
As described above, the volume of the metal ball portion is controlled to be smaller than or equal to a predetermined volume determined by the area of the top surface of the columnar portion and the projecting portion disposed on the top surface. Consequently, the semiconductor device can be mounted on the wiring substrate while the low-melting point metal layer is prevented from trickling on a side surface of the columnar portion and, thereby, the heights of individual columnar electrodes can be made uniform. As a result, the joining precision of each electrode relative to the wiring substrate is improved and a structure in which the electrode pitch is minimized while the underfill gap is ensured can be realized.
In the unit equipped with a semiconductor device according to the second aspect of the present invention, preferably, an underfill filled in between the above-described semiconductor device and the above-described wiring substrate while being in direct contact with side surfaces of the above-described columnar portions is provided.
Semiconductor devices can be mounted at narrow pitches while the underfill gap is ensured suitably by adopting such a configuration.
A semiconductor device according to a third aspect of the present invention is characterized by including a plurality of columnar electrodes disposed on a semiconductor substrate, the above-described columnar electrode including a first columnar portion and a second columnar portion both made of an electrically conductive material and a metal ball portion made of an electrically conductive material having a melting point lower than that of the above-described columnar portions and joined to the top surface of the above-described second columnar portion, wherein the above-described second columnar portion includes a section having a diameter smaller than the diameter of the first columnar portion and is interposed between the above-described metal ball portion and the above-described first columnar portion.
As described above, a columnar portion having a small diameter is disposed on a columnar portion having a large diameter and the metal ball portion is disposed on the columnar portion having a small diameter. Consequently, when the metal ball portion is formed by reflow of a low-melting point material, the low-melting point material is prevented from trickling on at least a side surface of the columnar portion having a large diameter.
As a result, even when the low-melting point material trickles on the side surface of the columnar portion having the small diameter, the trickling is stopped on the top surface of the columnar portion having the large diameter. Consequently, the heights of individual columnar electrodes can be made uniform, the joining precision of each electrode relative to the wiring substrate is improved, and a structure in which the electrode pitch is minimized while the underfill gap is ensured can be realized.
Furthermore, according to the present technique, the metal ball portion joined to only the top surface of the columnar portion can also be formed without conducting additional treatment of the side surface of the columnar portion. Therefore, a semiconductor device provided with columnar electrodes having a simple structure and high reliability is produced. However, the present invention does not exclude the treatment of the side surface of the columnar portion. The treatment of the side surface of the columnar portion may be conducted to further prevent the low-melting point material from trickling on the side surface of the columnar portion. In order to prevent trickling more reliably, it is effective to conduct a treatment to prevent trickling on the side surface.
The aspect ratio of an opening disposed in a resist when forming the columnar portion through plating can reduced by forming the columnar portion in two stages, the first and the second stages, as described above. Consequently, electrodes arranged at narrower pitches can be formed.
As described above, according to the present invention, columnar electrodes including ball portions joined to only the top surfaces of columnar portions can be formed.
Certain embodiments of the present invention will be described below in detail with reference to the attached drawings. The present invention is not limited to the embodiments described below, and appropriate modifications can be made.
The semiconductor device 10 is composed of a semiconductor substrate 12 made of silicon, a plurality of aluminum electrode pads 14 disposed on the main surface side of the semiconductor substrate 12, and a passivation film 16 disposed in such a way that each of the electrode pads is partially exposed.
Each columnar electrode 20 is composed of a columnar portion 22 made of copper and disposed on the exposed portion of each of the above-described electrode pads 14 and a low-melting point layer 24 made of solder and disposed on the top surface of the columnar portion 22. It is desirable that the columnar portion is disposed having a height of 15 μm or more.
The wiring substrate 30 is composed of a multilayer substrate 32 including various pattern layers and a wiring pattern 34 disposed on a surface of the multilayer substrate 32.
Electrical connection between the semiconductor device 10 and the wiring substrate 30 is conducted by melting the low-melting point layers 24 located at front end portions of the columnar electrodes 20 on the wiring pattern 34, and an underfill 40 is applied in between the semiconductor device 10 and the wiring substrate 30, so that the joining state through each of the columnar electrodes 20 is protected.
As shown in
As shown in
In order to prevent occurrence of this state in the present invention, a technique described below is applied to the step of forming the ball-shaped low-melting point layers 24 shown in
When the low-melting point layers 24 in this state are heated, the gravity is applied downward to the melted low-melting point layers 24. However, since the amount of the low-melting point layer 24 has been controlled in consideration of the area of the top surface of the columnar portion 22, the low-melting point layers 24 is processed into the shape of a ball while being kept from contact with the side surface of the columnar portion 22.
In the case where the top surface takes a shape such as shown in
When these structures are adopted, the above-described area B of the top surface of the columnar portion 22 is defined as the total surface area of the columnar portion in contact with the low-melting point layer 24. Therefore, since a wide contact area between the low-melting point layer 24 and the columnar portion 22 is ensured by adopting these structures, the volume of the low-melting point layer can be increased.
The semiconductor device 10 is composed of a semiconductor substrate 12 made of Si, GaAs, GaN, SiGe, or the like, a plurality of aluminum electrode pads 14 disposed on the main surface side of the semiconductor substrate 12, and a passivation film 16 disposed in such a way that each of the electrode pads 14 is partially exposed.
Each columnar electrode 20 is composed of columnar portions 22-1 and 22-2, each made of a high-melting point material, e.g., copper, nickel, or electrically conductive paste, and disposed on the exposed portion of each of the above-described electrode pads 14 and a low-melting point layer 24 made of solder or the like and disposed on the top surface of the columnar portion 22-2. It is desirable that the columnar portions together have a height of 15 μm or more.
Here, the columnar portions 22-1 and 22-2 are formed into shapes having mutually different diameters, and these are stacked to constitute one columnar portion. The columnar portion 22-2 has an outer diameter smaller than that of the columnar portion 22-1, and a low-melting point layer 24 is disposed on the surface having the small diameter. That is, the columnar portion is constructed from a plurality of stages, and has a configuration in which the diameter of the columnar portion is decreased stepwise or continuously in a direction from the semiconductor substrate 12 toward the low-melting point metal layer 24. Consequently, the low-melting point metal layer 24 is prevented from trickling on the side surface of the columnar portion in the formation of the ball-shaped low-melting point metal layer 24 by reflow or the like.
The wiring substrate 30 is composed of a multilayer substrate 32 including various pattern layers and a wiring pattern 34 disposed on a surface of the multilayer substrate 32.
Electrical connection between the semiconductor device 10 and the wiring substrate 30 is conducted by melting the low-melting point layers 24, which is located at front end portions of the columnar electrodes 20, on the wiring pattern 34, and an underfill 40 is applied in between the semiconductor device 10 and the wiring substrate 30, so that the joining state through each of the columnar electrodes 20 is protected.
As shown in
As shown in
As shown in
In order to prevent occurrence of this state in the present invention, as shown in
According to the present invention, columnar electrodes including ball-shaped low-melting point layers joined to only the top surfaces of columnar portions can be formed. Therefore, it can be applied to a semiconductor device, where miniaturization and pitch reduction are required.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2005-012839 | Jan 2005 | JP | national |
