Claims
- 1. A method of manufacturing a semiconductor device, the method comprising the steps of:arranging a semiconductor element on a surface of a substrate having an electrode pattern; connecting said semiconductor element and said electrode pattern electrically; forming a mask on said surface of said substrate, the mask having an interconnection hole at a position corresponding to said electrode pattern, introducing a conductive material into said interconnection hole to form an electrical interconnecting portion on the surface of said electrode pattern; removing said mask; and forming a resin on said surface of said substrate after removing said mask so as to seal said semiconductor element and a part of said interconnecting portion, the other part of said interconnecting portion being exposed outward.
- 2. The method as claimed in claim 1, further comprising forming a bump on the exposed part of said interconnecting portion.
- 3. The method as claimed in claim 1, further comprising mounting a shield on the exposed part of said interconnecting portion.
- 4. The method as claimed in claim 1, further comprising mounting an antenna on the exposed part of said interconnecting portion.
- 5. The method as claimed in claim 1, further comprising mounting an electronic component on the exposed part of said interconnecting portion.
- 6. The method as claimed in claim 1, wherein conductive material comprises copper metal.
Priority Claims (1)
Number |
Date |
Country |
Kind |
2000-368910 |
Dec 2000 |
JP |
|
Parent Case Info
The present application is a divisional application of U.S. Ser. No. 09/843,912, filed Apr. 30, 2001, now U.S. Pat. No. 6,489,676.
US Referenced Citations (9)
Foreign Referenced Citations (1)
Number |
Date |
Country |
04133451 |
May 1992 |
JP |