SEMICONDUCTOR DEVICE HAVING STACKED STRUCTURE AND METHOD OF MANUFACTURING THE SAME

Abstract

A semiconductor device comprises a main circuit substrate and a plurality of sub-circuit substrates on which a semiconductor element mounted and which are stacked on the main circuit substrate so that mounting surfaces thereof face the main circuit substrate. Each of the sub-circuit substrates has a size larger than a size of the semiconductor element mounted thereon. The semiconductor device comprises a flip chip bonding portion formed between the sub-circuit substrate and the semiconductor element mounted thereon and further comprises adhesive material layers formed between the main circuit substrate and the semiconductor element of a first stage of the sub-circuit substrates and between the semiconductor element of a second or subsequent stage of the sub-circuit substrates and the sub-circuit substrate facing the semiconductor element of the second or subsequent stage of the sub-circuit substrates.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional side view showing a conventional two-stage stacked semiconductor device using PoP;

FIG. 2 is a cross-sectional side view explanatory of a conventional internally stacked semiconductor device;

FIG. 3 is a cross-sectional side view explanatory of a two-stage stacked semiconductor device using PiP;

FIG. 4 is a top view showing a sub-circuit substrate according to a first embodiment of the present invention;

FIG. 5 is a bottom view of the sub-circuit substrate according to the first embodiment of the present invention;

FIG. 6 is a side view of the sub-circuit substrate according to the first embodiment of the present invention;

FIG. 7 is an enlarged cross-sectional view showing a flip chip connection portion between the sub-circuit substrate and a semiconductor element according to the first embodiment of the present invention;

FIG. 8 is a cross-sectional side view showing a semiconductor device having a two-stage stacked structure according to the first embodiment of the present invention; and

FIG. 9 is a cross-sectional side view showing a semiconductor device having a passive component according to a second embodiment of the present invention.

Claims

1. A semiconductor device comprising a main circuit substrate and a plurality of sub-circuit substrates on which a semiconductor element mounted and which are stacked on said main circuit substrate, each of said sub-circuit substrates having a size larger than a size of said semiconductor element mounted thereon and including a mounting surface on which said semiconductor element is mounted and a non-mounting surface opposite to said mounting surface of each of said sub-circuit substrates, said mounting surface facing said main circuit substrate, the semiconductor device comprising: a flip chip bonding portion formed between said sub-circuit substrate and said semiconductor element mounted thereon; andadhesive material layers formed between said main circuit substrate and said semiconductor element of a first stage of said sub-circuit substrates and between said semiconductor element of a second or subsequent stage of said sub-circuit substrates and said sub-circuit substrate facing said semiconductor element of said second or subsequent stage of said sub-circuit substrates.

2. The semiconductor device as recited in claim 1, wherein each of said sub-circuit substrates includes a sub-circuit substrate terminal for connection with a gold wire, which is formed in an area located outside of said semiconductor element on said non-mounting surface of each of said sub-circuit substrates, and wherein said main circuit substrate includes:a mounting surface on which said plurality of sub-circuit substrates are stacked;a non-mounting surface opposite to said mounting surface of said main circuit substrate; andmain circuit substrate terminals provided on said mounting surface of said main circuit substrate and connected to said sub-circuit substrate terminals of said sub-circuit substrates by the gold wires.

3. The semiconductor device as recited in claim 2, further comprising: a solder ball provided on said non-mounting surface of said main circuit substrate; anda passive component mounted on said non-mounting surface of said main circuit substrate.

4. The semiconductor device as recited in claim 1, further comprising a sealing resin for molding an entire stack of said sub-circuit substrates on said main circuit substrate.

5. A method of manufacturing a semiconductor device, said method comprising: mounting a first semiconductor element on a mounting surface of a first sub-circuit substrate having a size larger than the first semiconductor element by flip chip bonding;arranging the first sub-circuit substrate so that the mounting surface of the first sub-circuit substrate faces a main circuit substrate;bonding the first semiconductor element to the main circuit substrate by an adhesive material;connecting the mounted first sub-circuit substrate to the main circuit substrate by gold wires;mounting a second semiconductor element on a mounting surface of a second sub-circuit substrate having a size larger than the second semiconductor element by flip chip bonding;arranging the second sub-circuit substrate so that the mounting surface of the second sub-circuit substrate faces the main circuit substrate;bonding the second semiconductor element mounted on the second sub-circuit substrate to a non-mounting surface of the first sub-circuit substrate facing the second semiconductor element by an adhesive material, the non-mounting surface of the first sub-circuit substrate being opposite to the mounting surface of the second sub-circuit substrate; andconnecting the stacked second sub-circuit substrate to the main circuit substrate by gold wires.

6. The method as recited in claim 5, wherein said connecting of said first and second sub-circuit substrates to the main circuit substrate by the gold wires comprises connecting sub-circuit substrate terminals formed in areas located outside of said first and second semiconductor elements on said non-mounting surfaces of the first and second sub-circuit substrates to main circuit substrate terminals provided on a mounting surface of said main circuit substrate on which said first and second sub-circuit substrates are stacked.